efm32tg11b540_pac/cmu/
dbgclksel.rs

1#[doc = "Register `DBGCLKSEL` reader"]
2pub struct R(crate::R<DBGCLKSEL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DBGCLKSEL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DBGCLKSEL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DBGCLKSEL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DBGCLKSEL` writer"]
17pub struct W(crate::W<DBGCLKSEL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DBGCLKSEL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DBGCLKSEL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DBGCLKSEL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Debug Trace Clock\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum DBG_A {
41    #[doc = "0: AUXHFRCO is the debug trace clock"]
42    AUXHFRCO = 0,
43    #[doc = "1: HFCLK is the debug trace clock"]
44    HFCLK = 1,
45    #[doc = "2: HFRCO divided by 2 is the debug trace clock"]
46    HFRCODIV2 = 2,
47}
48impl From<DBG_A> for u8 {
49    #[inline(always)]
50    fn from(variant: DBG_A) -> Self {
51        variant as _
52    }
53}
54#[doc = "Field `DBG` reader - Debug Trace Clock"]
55pub type DBG_R = crate::FieldReader<u8, DBG_A>;
56impl DBG_R {
57    #[doc = "Get enumerated values variant"]
58    #[inline(always)]
59    pub fn variant(&self) -> Option<DBG_A> {
60        match self.bits {
61            0 => Some(DBG_A::AUXHFRCO),
62            1 => Some(DBG_A::HFCLK),
63            2 => Some(DBG_A::HFRCODIV2),
64            _ => None,
65        }
66    }
67    #[doc = "Checks if the value of the field is `AUXHFRCO`"]
68    #[inline(always)]
69    pub fn is_auxhfrco(&self) -> bool {
70        *self == DBG_A::AUXHFRCO
71    }
72    #[doc = "Checks if the value of the field is `HFCLK`"]
73    #[inline(always)]
74    pub fn is_hfclk(&self) -> bool {
75        *self == DBG_A::HFCLK
76    }
77    #[doc = "Checks if the value of the field is `HFRCODIV2`"]
78    #[inline(always)]
79    pub fn is_hfrcodiv2(&self) -> bool {
80        *self == DBG_A::HFRCODIV2
81    }
82}
83#[doc = "Field `DBG` writer - Debug Trace Clock"]
84pub type DBG_W<'a> = crate::FieldWriter<'a, u32, DBGCLKSEL_SPEC, u8, DBG_A, 2, 0>;
85impl<'a> DBG_W<'a> {
86    #[doc = "AUXHFRCO is the debug trace clock"]
87    #[inline(always)]
88    pub fn auxhfrco(self) -> &'a mut W {
89        self.variant(DBG_A::AUXHFRCO)
90    }
91    #[doc = "HFCLK is the debug trace clock"]
92    #[inline(always)]
93    pub fn hfclk(self) -> &'a mut W {
94        self.variant(DBG_A::HFCLK)
95    }
96    #[doc = "HFRCO divided by 2 is the debug trace clock"]
97    #[inline(always)]
98    pub fn hfrcodiv2(self) -> &'a mut W {
99        self.variant(DBG_A::HFRCODIV2)
100    }
101}
102impl R {
103    #[doc = "Bits 0:1 - Debug Trace Clock"]
104    #[inline(always)]
105    pub fn dbg(&self) -> DBG_R {
106        DBG_R::new((self.bits & 3) as u8)
107    }
108}
109impl W {
110    #[doc = "Bits 0:1 - Debug Trace Clock"]
111    #[inline(always)]
112    pub fn dbg(&mut self) -> DBG_W {
113        DBG_W::new(self)
114    }
115    #[doc = "Writes raw bits to the register."]
116    #[inline(always)]
117    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
118        self.0.bits(bits);
119        self
120    }
121}
122#[doc = "Debug Trace Clock Select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dbgclksel](index.html) module"]
123pub struct DBGCLKSEL_SPEC;
124impl crate::RegisterSpec for DBGCLKSEL_SPEC {
125    type Ux = u32;
126}
127#[doc = "`read()` method returns [dbgclksel::R](R) reader structure"]
128impl crate::Readable for DBGCLKSEL_SPEC {
129    type Reader = R;
130}
131#[doc = "`write(|w| ..)` method takes [dbgclksel::W](W) writer structure"]
132impl crate::Writable for DBGCLKSEL_SPEC {
133    type Writer = W;
134}
135#[doc = "`reset()` method sets DBGCLKSEL to value 0"]
136impl crate::Resettable for DBGCLKSEL_SPEC {
137    #[inline(always)]
138    fn reset_value() -> Self::Ux {
139        0
140    }
141}
efm32tg11b540_pac/cmu/dbgclksel.rs

efm32tg11b540_pac/cmu/
dbgclksel.rs
