efm32tg11b540_pac/adc0/
singlectrlx.rs

1#[doc = "Register `SINGLECTRLX` reader"]
2pub struct R(crate::R<SINGLECTRLX_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SINGLECTRLX_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SINGLECTRLX_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SINGLECTRLX_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SINGLECTRLX` writer"]
17pub struct W(crate::W<SINGLECTRLX_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SINGLECTRLX_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SINGLECTRLX_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SINGLECTRLX_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Single Channel Reference Selection\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum VREFSEL_A {
41    #[doc = "0: Internal 0.83V Bandgap reference"]
42    VBGR = 0,
43    #[doc = "1: Scaled AVDD: AVDD*(the VREF attenuation factor)"]
44    VDDXWATT = 1,
45    #[doc = "2: Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
46    VREFPWATT = 2,
47    #[doc = "3: Raw single ended external Vref: ADCn_EXTP"]
48    VREFP = 3,
49    #[doc = "4: Special mode used to generate ENTROPY."]
50    VENTROPY = 4,
51    #[doc = "5: Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
52    VREFPNWATT = 5,
53    #[doc = "6: Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
54    VREFPN = 6,
55    #[doc = "7: Internal Bandgap reference at low setting 0.78V"]
56    VBGRLOW = 7,
57}
58impl From<VREFSEL_A> for u8 {
59    #[inline(always)]
60    fn from(variant: VREFSEL_A) -> Self {
61        variant as _
62    }
63}
64#[doc = "Field `VREFSEL` reader - Single Channel Reference Selection"]
65pub type VREFSEL_R = crate::FieldReader<u8, VREFSEL_A>;
66impl VREFSEL_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> VREFSEL_A {
70        match self.bits {
71            0 => VREFSEL_A::VBGR,
72            1 => VREFSEL_A::VDDXWATT,
73            2 => VREFSEL_A::VREFPWATT,
74            3 => VREFSEL_A::VREFP,
75            4 => VREFSEL_A::VENTROPY,
76            5 => VREFSEL_A::VREFPNWATT,
77            6 => VREFSEL_A::VREFPN,
78            7 => VREFSEL_A::VBGRLOW,
79            _ => unreachable!(),
80        }
81    }
82    #[doc = "Checks if the value of the field is `VBGR`"]
83    #[inline(always)]
84    pub fn is_vbgr(&self) -> bool {
85        *self == VREFSEL_A::VBGR
86    }
87    #[doc = "Checks if the value of the field is `VDDXWATT`"]
88    #[inline(always)]
89    pub fn is_vddxwatt(&self) -> bool {
90        *self == VREFSEL_A::VDDXWATT
91    }
92    #[doc = "Checks if the value of the field is `VREFPWATT`"]
93    #[inline(always)]
94    pub fn is_vrefpwatt(&self) -> bool {
95        *self == VREFSEL_A::VREFPWATT
96    }
97    #[doc = "Checks if the value of the field is `VREFP`"]
98    #[inline(always)]
99    pub fn is_vrefp(&self) -> bool {
100        *self == VREFSEL_A::VREFP
101    }
102    #[doc = "Checks if the value of the field is `VENTROPY`"]
103    #[inline(always)]
104    pub fn is_ventropy(&self) -> bool {
105        *self == VREFSEL_A::VENTROPY
106    }
107    #[doc = "Checks if the value of the field is `VREFPNWATT`"]
108    #[inline(always)]
109    pub fn is_vrefpnwatt(&self) -> bool {
110        *self == VREFSEL_A::VREFPNWATT
111    }
112    #[doc = "Checks if the value of the field is `VREFPN`"]
113    #[inline(always)]
114    pub fn is_vrefpn(&self) -> bool {
115        *self == VREFSEL_A::VREFPN
116    }
117    #[doc = "Checks if the value of the field is `VBGRLOW`"]
118    #[inline(always)]
119    pub fn is_vbgrlow(&self) -> bool {
120        *self == VREFSEL_A::VBGRLOW
121    }
122}
123#[doc = "Field `VREFSEL` writer - Single Channel Reference Selection"]
124pub type VREFSEL_W<'a> = crate::FieldWriterSafe<'a, u32, SINGLECTRLX_SPEC, u8, VREFSEL_A, 3, 0>;
125impl<'a> VREFSEL_W<'a> {
126    #[doc = "Internal 0.83V Bandgap reference"]
127    #[inline(always)]
128    pub fn vbgr(self) -> &'a mut W {
129        self.variant(VREFSEL_A::VBGR)
130    }
131    #[doc = "Scaled AVDD: AVDD*(the VREF attenuation factor)"]
132    #[inline(always)]
133    pub fn vddxwatt(self) -> &'a mut W {
134        self.variant(VREFSEL_A::VDDXWATT)
135    }
136    #[doc = "Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
137    #[inline(always)]
138    pub fn vrefpwatt(self) -> &'a mut W {
139        self.variant(VREFSEL_A::VREFPWATT)
140    }
141    #[doc = "Raw single ended external Vref: ADCn_EXTP"]
142    #[inline(always)]
143    pub fn vrefp(self) -> &'a mut W {
144        self.variant(VREFSEL_A::VREFP)
145    }
146    #[doc = "Special mode used to generate ENTROPY."]
147    #[inline(always)]
148    pub fn ventropy(self) -> &'a mut W {
149        self.variant(VREFSEL_A::VENTROPY)
150    }
151    #[doc = "Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
152    #[inline(always)]
153    pub fn vrefpnwatt(self) -> &'a mut W {
154        self.variant(VREFSEL_A::VREFPNWATT)
155    }
156    #[doc = "Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
157    #[inline(always)]
158    pub fn vrefpn(self) -> &'a mut W {
159        self.variant(VREFSEL_A::VREFPN)
160    }
161    #[doc = "Internal Bandgap reference at low setting 0.78V"]
162    #[inline(always)]
163    pub fn vbgrlow(self) -> &'a mut W {
164        self.variant(VREFSEL_A::VBGRLOW)
165    }
166}
167#[doc = "Field `VREFATTFIX` reader - Enable Fixed Scaling on VREF"]
168pub type VREFATTFIX_R = crate::BitReader<bool>;
169#[doc = "Field `VREFATTFIX` writer - Enable Fixed Scaling on VREF"]
170pub type VREFATTFIX_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 3>;
171#[doc = "Field `VREFATT` reader - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
172pub type VREFATT_R = crate::FieldReader<u8, u8>;
173#[doc = "Field `VREFATT` writer - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
174pub type VREFATT_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 4, 4>;
175#[doc = "Field `VINATT` reader - Code for VIN Attenuation Factor"]
176pub type VINATT_R = crate::FieldReader<u8, u8>;
177#[doc = "Field `VINATT` writer - Code for VIN Attenuation Factor"]
178pub type VINATT_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 4, 8>;
179#[doc = "Field `DVL` reader - Single Channel DV Level Select"]
180pub type DVL_R = crate::FieldReader<u8, u8>;
181#[doc = "Field `DVL` writer - Single Channel DV Level Select"]
182pub type DVL_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 2, 12>;
183#[doc = "Field `FIFOOFACT` reader - Single Channel FIFO Overflow Action"]
184pub type FIFOOFACT_R = crate::BitReader<bool>;
185#[doc = "Field `FIFOOFACT` writer - Single Channel FIFO Overflow Action"]
186pub type FIFOOFACT_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 14>;
187#[doc = "Field `PRSMODE` reader - Single Channel PRS Trigger Mode"]
188pub type PRSMODE_R = crate::BitReader<bool>;
189#[doc = "Field `PRSMODE` writer - Single Channel PRS Trigger Mode"]
190pub type PRSMODE_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 16>;
191#[doc = "Single Channel PRS Trigger Select\n\nValue on reset: 0"]
192#[derive(Clone, Copy, Debug, PartialEq)]
193#[repr(u8)]
194pub enum PRSSEL_A {
195    #[doc = "0: PRS ch 0 triggers single channel"]
196    PRSCH0 = 0,
197    #[doc = "1: PRS ch 1 triggers single channel"]
198    PRSCH1 = 1,
199    #[doc = "2: PRS ch 2 triggers single channel"]
200    PRSCH2 = 2,
201    #[doc = "3: PRS ch 3 triggers single channel"]
202    PRSCH3 = 3,
203    #[doc = "4: PRS ch 4 triggers single channel"]
204    PRSCH4 = 4,
205    #[doc = "5: PRS ch 5 triggers single channel"]
206    PRSCH5 = 5,
207    #[doc = "6: PRS ch 6 triggers single channel"]
208    PRSCH6 = 6,
209    #[doc = "7: PRS ch 7 triggers single channel"]
210    PRSCH7 = 7,
211}
212impl From<PRSSEL_A> for u8 {
213    #[inline(always)]
214    fn from(variant: PRSSEL_A) -> Self {
215        variant as _
216    }
217}
218#[doc = "Field `PRSSEL` reader - Single Channel PRS Trigger Select"]
219pub type PRSSEL_R = crate::FieldReader<u8, PRSSEL_A>;
220impl PRSSEL_R {
221    #[doc = "Get enumerated values variant"]
222    #[inline(always)]
223    pub fn variant(&self) -> PRSSEL_A {
224        match self.bits {
225            0 => PRSSEL_A::PRSCH0,
226            1 => PRSSEL_A::PRSCH1,
227            2 => PRSSEL_A::PRSCH2,
228            3 => PRSSEL_A::PRSCH3,
229            4 => PRSSEL_A::PRSCH4,
230            5 => PRSSEL_A::PRSCH5,
231            6 => PRSSEL_A::PRSCH6,
232            7 => PRSSEL_A::PRSCH7,
233            _ => unreachable!(),
234        }
235    }
236    #[doc = "Checks if the value of the field is `PRSCH0`"]
237    #[inline(always)]
238    pub fn is_prsch0(&self) -> bool {
239        *self == PRSSEL_A::PRSCH0
240    }
241    #[doc = "Checks if the value of the field is `PRSCH1`"]
242    #[inline(always)]
243    pub fn is_prsch1(&self) -> bool {
244        *self == PRSSEL_A::PRSCH1
245    }
246    #[doc = "Checks if the value of the field is `PRSCH2`"]
247    #[inline(always)]
248    pub fn is_prsch2(&self) -> bool {
249        *self == PRSSEL_A::PRSCH2
250    }
251    #[doc = "Checks if the value of the field is `PRSCH3`"]
252    #[inline(always)]
253    pub fn is_prsch3(&self) -> bool {
254        *self == PRSSEL_A::PRSCH3
255    }
256    #[doc = "Checks if the value of the field is `PRSCH4`"]
257    #[inline(always)]
258    pub fn is_prsch4(&self) -> bool {
259        *self == PRSSEL_A::PRSCH4
260    }
261    #[doc = "Checks if the value of the field is `PRSCH5`"]
262    #[inline(always)]
263    pub fn is_prsch5(&self) -> bool {
264        *self == PRSSEL_A::PRSCH5
265    }
266    #[doc = "Checks if the value of the field is `PRSCH6`"]
267    #[inline(always)]
268    pub fn is_prsch6(&self) -> bool {
269        *self == PRSSEL_A::PRSCH6
270    }
271    #[doc = "Checks if the value of the field is `PRSCH7`"]
272    #[inline(always)]
273    pub fn is_prsch7(&self) -> bool {
274        *self == PRSSEL_A::PRSCH7
275    }
276}
277#[doc = "Field `PRSSEL` writer - Single Channel PRS Trigger Select"]
278pub type PRSSEL_W<'a> = crate::FieldWriterSafe<'a, u32, SINGLECTRLX_SPEC, u8, PRSSEL_A, 3, 17>;
279impl<'a> PRSSEL_W<'a> {
280    #[doc = "PRS ch 0 triggers single channel"]
281    #[inline(always)]
282    pub fn prsch0(self) -> &'a mut W {
283        self.variant(PRSSEL_A::PRSCH0)
284    }
285    #[doc = "PRS ch 1 triggers single channel"]
286    #[inline(always)]
287    pub fn prsch1(self) -> &'a mut W {
288        self.variant(PRSSEL_A::PRSCH1)
289    }
290    #[doc = "PRS ch 2 triggers single channel"]
291    #[inline(always)]
292    pub fn prsch2(self) -> &'a mut W {
293        self.variant(PRSSEL_A::PRSCH2)
294    }
295    #[doc = "PRS ch 3 triggers single channel"]
296    #[inline(always)]
297    pub fn prsch3(self) -> &'a mut W {
298        self.variant(PRSSEL_A::PRSCH3)
299    }
300    #[doc = "PRS ch 4 triggers single channel"]
301    #[inline(always)]
302    pub fn prsch4(self) -> &'a mut W {
303        self.variant(PRSSEL_A::PRSCH4)
304    }
305    #[doc = "PRS ch 5 triggers single channel"]
306    #[inline(always)]
307    pub fn prsch5(self) -> &'a mut W {
308        self.variant(PRSSEL_A::PRSCH5)
309    }
310    #[doc = "PRS ch 6 triggers single channel"]
311    #[inline(always)]
312    pub fn prsch6(self) -> &'a mut W {
313        self.variant(PRSSEL_A::PRSCH6)
314    }
315    #[doc = "PRS ch 7 triggers single channel"]
316    #[inline(always)]
317    pub fn prsch7(self) -> &'a mut W {
318        self.variant(PRSSEL_A::PRSCH7)
319    }
320}
321#[doc = "Field `CONVSTARTDELAY` reader - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
322pub type CONVSTARTDELAY_R = crate::FieldReader<u8, u8>;
323#[doc = "Field `CONVSTARTDELAY` writer - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
324pub type CONVSTARTDELAY_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 5, 22>;
325#[doc = "Field `CONVSTARTDELAYEN` reader - Enable Delaying Next Conversion Start"]
326pub type CONVSTARTDELAYEN_R = crate::BitReader<bool>;
327#[doc = "Field `CONVSTARTDELAYEN` writer - Enable Delaying Next Conversion Start"]
328pub type CONVSTARTDELAYEN_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 27>;
329#[doc = "REPDELAY Select for SINGLE REP Mode\n\nValue on reset: 0"]
330#[derive(Clone, Copy, Debug, PartialEq)]
331#[repr(u8)]
332pub enum REPDELAY_A {
333    #[doc = "0: No delay"]
334    NODELAY = 0,
335    #[doc = "1: 4 conversion clock cycles"]
336    _4CYCLES = 1,
337    #[doc = "2: 8 conversion clock cycles"]
338    _8CYCLES = 2,
339    #[doc = "3: 16 conversion clock cycles"]
340    _16CYCLES = 3,
341    #[doc = "4: 32 conversion clock cycles"]
342    _32CYCLES = 4,
343    #[doc = "5: 64 conversion clock cycles"]
344    _64CYCLES = 5,
345    #[doc = "6: 128 conversion clock cycles"]
346    _128CYCLES = 6,
347    #[doc = "7: 256 conversion clock cycles"]
348    _256CYCLES = 7,
349}
350impl From<REPDELAY_A> for u8 {
351    #[inline(always)]
352    fn from(variant: REPDELAY_A) -> Self {
353        variant as _
354    }
355}
356#[doc = "Field `REPDELAY` reader - REPDELAY Select for SINGLE REP Mode"]
357pub type REPDELAY_R = crate::FieldReader<u8, REPDELAY_A>;
358impl REPDELAY_R {
359    #[doc = "Get enumerated values variant"]
360    #[inline(always)]
361    pub fn variant(&self) -> REPDELAY_A {
362        match self.bits {
363            0 => REPDELAY_A::NODELAY,
364            1 => REPDELAY_A::_4CYCLES,
365            2 => REPDELAY_A::_8CYCLES,
366            3 => REPDELAY_A::_16CYCLES,
367            4 => REPDELAY_A::_32CYCLES,
368            5 => REPDELAY_A::_64CYCLES,
369            6 => REPDELAY_A::_128CYCLES,
370            7 => REPDELAY_A::_256CYCLES,
371            _ => unreachable!(),
372        }
373    }
374    #[doc = "Checks if the value of the field is `NODELAY`"]
375    #[inline(always)]
376    pub fn is_nodelay(&self) -> bool {
377        *self == REPDELAY_A::NODELAY
378    }
379    #[doc = "Checks if the value of the field is `_4CYCLES`"]
380    #[inline(always)]
381    pub fn is_4cycles(&self) -> bool {
382        *self == REPDELAY_A::_4CYCLES
383    }
384    #[doc = "Checks if the value of the field is `_8CYCLES`"]
385    #[inline(always)]
386    pub fn is_8cycles(&self) -> bool {
387        *self == REPDELAY_A::_8CYCLES
388    }
389    #[doc = "Checks if the value of the field is `_16CYCLES`"]
390    #[inline(always)]
391    pub fn is_16cycles(&self) -> bool {
392        *self == REPDELAY_A::_16CYCLES
393    }
394    #[doc = "Checks if the value of the field is `_32CYCLES`"]
395    #[inline(always)]
396    pub fn is_32cycles(&self) -> bool {
397        *self == REPDELAY_A::_32CYCLES
398    }
399    #[doc = "Checks if the value of the field is `_64CYCLES`"]
400    #[inline(always)]
401    pub fn is_64cycles(&self) -> bool {
402        *self == REPDELAY_A::_64CYCLES
403    }
404    #[doc = "Checks if the value of the field is `_128CYCLES`"]
405    #[inline(always)]
406    pub fn is_128cycles(&self) -> bool {
407        *self == REPDELAY_A::_128CYCLES
408    }
409    #[doc = "Checks if the value of the field is `_256CYCLES`"]
410    #[inline(always)]
411    pub fn is_256cycles(&self) -> bool {
412        *self == REPDELAY_A::_256CYCLES
413    }
414}
415#[doc = "Field `REPDELAY` writer - REPDELAY Select for SINGLE REP Mode"]
416pub type REPDELAY_W<'a> = crate::FieldWriterSafe<'a, u32, SINGLECTRLX_SPEC, u8, REPDELAY_A, 3, 29>;
417impl<'a> REPDELAY_W<'a> {
418    #[doc = "No delay"]
419    #[inline(always)]
420    pub fn nodelay(self) -> &'a mut W {
421        self.variant(REPDELAY_A::NODELAY)
422    }
423    #[doc = "4 conversion clock cycles"]
424    #[inline(always)]
425    pub fn _4cycles(self) -> &'a mut W {
426        self.variant(REPDELAY_A::_4CYCLES)
427    }
428    #[doc = "8 conversion clock cycles"]
429    #[inline(always)]
430    pub fn _8cycles(self) -> &'a mut W {
431        self.variant(REPDELAY_A::_8CYCLES)
432    }
433    #[doc = "16 conversion clock cycles"]
434    #[inline(always)]
435    pub fn _16cycles(self) -> &'a mut W {
436        self.variant(REPDELAY_A::_16CYCLES)
437    }
438    #[doc = "32 conversion clock cycles"]
439    #[inline(always)]
440    pub fn _32cycles(self) -> &'a mut W {
441        self.variant(REPDELAY_A::_32CYCLES)
442    }
443    #[doc = "64 conversion clock cycles"]
444    #[inline(always)]
445    pub fn _64cycles(self) -> &'a mut W {
446        self.variant(REPDELAY_A::_64CYCLES)
447    }
448    #[doc = "128 conversion clock cycles"]
449    #[inline(always)]
450    pub fn _128cycles(self) -> &'a mut W {
451        self.variant(REPDELAY_A::_128CYCLES)
452    }
453    #[doc = "256 conversion clock cycles"]
454    #[inline(always)]
455    pub fn _256cycles(self) -> &'a mut W {
456        self.variant(REPDELAY_A::_256CYCLES)
457    }
458}
459impl R {
460    #[doc = "Bits 0:2 - Single Channel Reference Selection"]
461    #[inline(always)]
462    pub fn vrefsel(&self) -> VREFSEL_R {
463        VREFSEL_R::new((self.bits & 7) as u8)
464    }
465    #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
466    #[inline(always)]
467    pub fn vrefattfix(&self) -> VREFATTFIX_R {
468        VREFATTFIX_R::new(((self.bits >> 3) & 1) != 0)
469    }
470    #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
471    #[inline(always)]
472    pub fn vrefatt(&self) -> VREFATT_R {
473        VREFATT_R::new(((self.bits >> 4) & 0x0f) as u8)
474    }
475    #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
476    #[inline(always)]
477    pub fn vinatt(&self) -> VINATT_R {
478        VINATT_R::new(((self.bits >> 8) & 0x0f) as u8)
479    }
480    #[doc = "Bits 12:13 - Single Channel DV Level Select"]
481    #[inline(always)]
482    pub fn dvl(&self) -> DVL_R {
483        DVL_R::new(((self.bits >> 12) & 3) as u8)
484    }
485    #[doc = "Bit 14 - Single Channel FIFO Overflow Action"]
486    #[inline(always)]
487    pub fn fifoofact(&self) -> FIFOOFACT_R {
488        FIFOOFACT_R::new(((self.bits >> 14) & 1) != 0)
489    }
490    #[doc = "Bit 16 - Single Channel PRS Trigger Mode"]
491    #[inline(always)]
492    pub fn prsmode(&self) -> PRSMODE_R {
493        PRSMODE_R::new(((self.bits >> 16) & 1) != 0)
494    }
495    #[doc = "Bits 17:19 - Single Channel PRS Trigger Select"]
496    #[inline(always)]
497    pub fn prssel(&self) -> PRSSEL_R {
498        PRSSEL_R::new(((self.bits >> 17) & 7) as u8)
499    }
500    #[doc = "Bits 22:26 - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
501    #[inline(always)]
502    pub fn convstartdelay(&self) -> CONVSTARTDELAY_R {
503        CONVSTARTDELAY_R::new(((self.bits >> 22) & 0x1f) as u8)
504    }
505    #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
506    #[inline(always)]
507    pub fn convstartdelayen(&self) -> CONVSTARTDELAYEN_R {
508        CONVSTARTDELAYEN_R::new(((self.bits >> 27) & 1) != 0)
509    }
510    #[doc = "Bits 29:31 - REPDELAY Select for SINGLE REP Mode"]
511    #[inline(always)]
512    pub fn repdelay(&self) -> REPDELAY_R {
513        REPDELAY_R::new(((self.bits >> 29) & 7) as u8)
514    }
515}
516impl W {
517    #[doc = "Bits 0:2 - Single Channel Reference Selection"]
518    #[inline(always)]
519    pub fn vrefsel(&mut self) -> VREFSEL_W {
520        VREFSEL_W::new(self)
521    }
522    #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
523    #[inline(always)]
524    pub fn vrefattfix(&mut self) -> VREFATTFIX_W {
525        VREFATTFIX_W::new(self)
526    }
527    #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
528    #[inline(always)]
529    pub fn vrefatt(&mut self) -> VREFATT_W {
530        VREFATT_W::new(self)
531    }
532    #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
533    #[inline(always)]
534    pub fn vinatt(&mut self) -> VINATT_W {
535        VINATT_W::new(self)
536    }
537    #[doc = "Bits 12:13 - Single Channel DV Level Select"]
538    #[inline(always)]
539    pub fn dvl(&mut self) -> DVL_W {
540        DVL_W::new(self)
541    }
542    #[doc = "Bit 14 - Single Channel FIFO Overflow Action"]
543    #[inline(always)]
544    pub fn fifoofact(&mut self) -> FIFOOFACT_W {
545        FIFOOFACT_W::new(self)
546    }
547    #[doc = "Bit 16 - Single Channel PRS Trigger Mode"]
548    #[inline(always)]
549    pub fn prsmode(&mut self) -> PRSMODE_W {
550        PRSMODE_W::new(self)
551    }
552    #[doc = "Bits 17:19 - Single Channel PRS Trigger Select"]
553    #[inline(always)]
554    pub fn prssel(&mut self) -> PRSSEL_W {
555        PRSSEL_W::new(self)
556    }
557    #[doc = "Bits 22:26 - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
558    #[inline(always)]
559    pub fn convstartdelay(&mut self) -> CONVSTARTDELAY_W {
560        CONVSTARTDELAY_W::new(self)
561    }
562    #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
563    #[inline(always)]
564    pub fn convstartdelayen(&mut self) -> CONVSTARTDELAYEN_W {
565        CONVSTARTDELAYEN_W::new(self)
566    }
567    #[doc = "Bits 29:31 - REPDELAY Select for SINGLE REP Mode"]
568    #[inline(always)]
569    pub fn repdelay(&mut self) -> REPDELAY_W {
570        REPDELAY_W::new(self)
571    }
572    #[doc = "Writes raw bits to the register."]
573    #[inline(always)]
574    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
575        self.0.bits(bits);
576        self
577    }
578}
579#[doc = "Single Channel Control Register Continued\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [singlectrlx](index.html) module"]
580pub struct SINGLECTRLX_SPEC;
581impl crate::RegisterSpec for SINGLECTRLX_SPEC {
582    type Ux = u32;
583}
584#[doc = "`read()` method returns [singlectrlx::R](R) reader structure"]
585impl crate::Readable for SINGLECTRLX_SPEC {
586    type Reader = R;
587}
588#[doc = "`write(|w| ..)` method takes [singlectrlx::W](W) writer structure"]
589impl crate::Writable for SINGLECTRLX_SPEC {
590    type Writer = W;
591}
592#[doc = "`reset()` method sets SINGLECTRLX to value 0"]
593impl crate::Resettable for SINGLECTRLX_SPEC {
594    #[inline(always)]
595    fn reset_value() -> Self::Ux {
596        0
597    }
598}
efm32tg11b540_pac/adc0/singlectrlx.rs

efm32tg11b540_pac/adc0/
singlectrlx.rs
