efm32tg11b520_pac/i2c0/
ifc.rs1#[doc = "Register `IFC` writer"]
2pub struct W(crate::W<IFC_SPEC>);
3impl core::ops::Deref for W {
4 type Target = crate::W<IFC_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl core::ops::DerefMut for W {
11 #[inline(always)]
12 fn deref_mut(&mut self) -> &mut Self::Target {
13 &mut self.0
14 }
15}
16impl From<crate::W<IFC_SPEC>> for W {
17 #[inline(always)]
18 fn from(writer: crate::W<IFC_SPEC>) -> Self {
19 W(writer)
20 }
21}
22#[doc = "Field `START` writer - Clear START Interrupt Flag"]
23pub type START_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 0>;
24#[doc = "Field `RSTART` writer - Clear RSTART Interrupt Flag"]
25pub type RSTART_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 1>;
26#[doc = "Field `ADDR` writer - Clear ADDR Interrupt Flag"]
27pub type ADDR_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 2>;
28#[doc = "Field `TXC` writer - Clear TXC Interrupt Flag"]
29pub type TXC_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 3>;
30#[doc = "Field `ACK` writer - Clear ACK Interrupt Flag"]
31pub type ACK_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 6>;
32#[doc = "Field `NACK` writer - Clear NACK Interrupt Flag"]
33pub type NACK_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 7>;
34#[doc = "Field `MSTOP` writer - Clear MSTOP Interrupt Flag"]
35pub type MSTOP_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 8>;
36#[doc = "Field `ARBLOST` writer - Clear ARBLOST Interrupt Flag"]
37pub type ARBLOST_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 9>;
38#[doc = "Field `BUSERR` writer - Clear BUSERR Interrupt Flag"]
39pub type BUSERR_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 10>;
40#[doc = "Field `BUSHOLD` writer - Clear BUSHOLD Interrupt Flag"]
41pub type BUSHOLD_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 11>;
42#[doc = "Field `TXOF` writer - Clear TXOF Interrupt Flag"]
43pub type TXOF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 12>;
44#[doc = "Field `RXUF` writer - Clear RXUF Interrupt Flag"]
45pub type RXUF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 13>;
46#[doc = "Field `BITO` writer - Clear BITO Interrupt Flag"]
47pub type BITO_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 14>;
48#[doc = "Field `CLTO` writer - Clear CLTO Interrupt Flag"]
49pub type CLTO_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 15>;
50#[doc = "Field `SSTOP` writer - Clear SSTOP Interrupt Flag"]
51pub type SSTOP_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 16>;
52#[doc = "Field `RXFULL` writer - Clear RXFULL Interrupt Flag"]
53pub type RXFULL_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 17>;
54#[doc = "Field `CLERR` writer - Clear CLERR Interrupt Flag"]
55pub type CLERR_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 18>;
56impl W {
57 #[doc = "Bit 0 - Clear START Interrupt Flag"]
58 #[inline(always)]
59 pub fn start(&mut self) -> START_W {
60 START_W::new(self)
61 }
62 #[doc = "Bit 1 - Clear RSTART Interrupt Flag"]
63 #[inline(always)]
64 pub fn rstart(&mut self) -> RSTART_W {
65 RSTART_W::new(self)
66 }
67 #[doc = "Bit 2 - Clear ADDR Interrupt Flag"]
68 #[inline(always)]
69 pub fn addr(&mut self) -> ADDR_W {
70 ADDR_W::new(self)
71 }
72 #[doc = "Bit 3 - Clear TXC Interrupt Flag"]
73 #[inline(always)]
74 pub fn txc(&mut self) -> TXC_W {
75 TXC_W::new(self)
76 }
77 #[doc = "Bit 6 - Clear ACK Interrupt Flag"]
78 #[inline(always)]
79 pub fn ack(&mut self) -> ACK_W {
80 ACK_W::new(self)
81 }
82 #[doc = "Bit 7 - Clear NACK Interrupt Flag"]
83 #[inline(always)]
84 pub fn nack(&mut self) -> NACK_W {
85 NACK_W::new(self)
86 }
87 #[doc = "Bit 8 - Clear MSTOP Interrupt Flag"]
88 #[inline(always)]
89 pub fn mstop(&mut self) -> MSTOP_W {
90 MSTOP_W::new(self)
91 }
92 #[doc = "Bit 9 - Clear ARBLOST Interrupt Flag"]
93 #[inline(always)]
94 pub fn arblost(&mut self) -> ARBLOST_W {
95 ARBLOST_W::new(self)
96 }
97 #[doc = "Bit 10 - Clear BUSERR Interrupt Flag"]
98 #[inline(always)]
99 pub fn buserr(&mut self) -> BUSERR_W {
100 BUSERR_W::new(self)
101 }
102 #[doc = "Bit 11 - Clear BUSHOLD Interrupt Flag"]
103 #[inline(always)]
104 pub fn bushold(&mut self) -> BUSHOLD_W {
105 BUSHOLD_W::new(self)
106 }
107 #[doc = "Bit 12 - Clear TXOF Interrupt Flag"]
108 #[inline(always)]
109 pub fn txof(&mut self) -> TXOF_W {
110 TXOF_W::new(self)
111 }
112 #[doc = "Bit 13 - Clear RXUF Interrupt Flag"]
113 #[inline(always)]
114 pub fn rxuf(&mut self) -> RXUF_W {
115 RXUF_W::new(self)
116 }
117 #[doc = "Bit 14 - Clear BITO Interrupt Flag"]
118 #[inline(always)]
119 pub fn bito(&mut self) -> BITO_W {
120 BITO_W::new(self)
121 }
122 #[doc = "Bit 15 - Clear CLTO Interrupt Flag"]
123 #[inline(always)]
124 pub fn clto(&mut self) -> CLTO_W {
125 CLTO_W::new(self)
126 }
127 #[doc = "Bit 16 - Clear SSTOP Interrupt Flag"]
128 #[inline(always)]
129 pub fn sstop(&mut self) -> SSTOP_W {
130 SSTOP_W::new(self)
131 }
132 #[doc = "Bit 17 - Clear RXFULL Interrupt Flag"]
133 #[inline(always)]
134 pub fn rxfull(&mut self) -> RXFULL_W {
135 RXFULL_W::new(self)
136 }
137 #[doc = "Bit 18 - Clear CLERR Interrupt Flag"]
138 #[inline(always)]
139 pub fn clerr(&mut self) -> CLERR_W {
140 CLERR_W::new(self)
141 }
142 #[doc = "Writes raw bits to the register."]
143 #[inline(always)]
144 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
145 self.0.bits(bits);
146 self
147 }
148}
149#[doc = "Interrupt Flag Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifc](index.html) module"]
150pub struct IFC_SPEC;
151impl crate::RegisterSpec for IFC_SPEC {
152 type Ux = u32;
153}
154#[doc = "`write(|w| ..)` method takes [ifc::W](W) writer structure"]
155impl crate::Writable for IFC_SPEC {
156 type Writer = W;
157}
158#[doc = "`reset()` method sets IFC to value 0"]
159impl crate::Resettable for IFC_SPEC {
160 #[inline(always)]
161 fn reset_value() -> Self::Ux {
162 0
163 }
164}