efm32tg11b520_pac/gpio/
pd_ctrl.rs

1#[doc = "Register `PD_CTRL` reader"]
2pub struct R(crate::R<PD_CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PD_CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PD_CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PD_CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PD_CTRL` writer"]
17pub struct W(crate::W<PD_CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PD_CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PD_CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PD_CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DRIVESTRENGTH` reader - Drive Strength for Port"]
38pub type DRIVESTRENGTH_R = crate::BitReader<bool>;
39#[doc = "Field `DRIVESTRENGTH` writer - Drive Strength for Port"]
40pub type DRIVESTRENGTH_W<'a> = crate::BitWriter<'a, u32, PD_CTRL_SPEC, bool, 0>;
41#[doc = "Field `SLEWRATE` reader - Slewrate Limit for Port"]
42pub type SLEWRATE_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `SLEWRATE` writer - Slewrate Limit for Port"]
44pub type SLEWRATE_W<'a> = crate::FieldWriter<'a, u32, PD_CTRL_SPEC, u8, u8, 3, 4>;
45#[doc = "Field `DINDIS` reader - Data in Disable"]
46pub type DINDIS_R = crate::BitReader<bool>;
47#[doc = "Field `DINDIS` writer - Data in Disable"]
48pub type DINDIS_W<'a> = crate::BitWriter<'a, u32, PD_CTRL_SPEC, bool, 12>;
49#[doc = "Field `DRIVESTRENGTHALT` reader - Alternate Drive Strength for Port"]
50pub type DRIVESTRENGTHALT_R = crate::BitReader<bool>;
51#[doc = "Field `DRIVESTRENGTHALT` writer - Alternate Drive Strength for Port"]
52pub type DRIVESTRENGTHALT_W<'a> = crate::BitWriter<'a, u32, PD_CTRL_SPEC, bool, 16>;
53#[doc = "Field `SLEWRATEALT` reader - Alternate Slewrate Limit for Port"]
54pub type SLEWRATEALT_R = crate::FieldReader<u8, u8>;
55#[doc = "Field `SLEWRATEALT` writer - Alternate Slewrate Limit for Port"]
56pub type SLEWRATEALT_W<'a> = crate::FieldWriter<'a, u32, PD_CTRL_SPEC, u8, u8, 3, 20>;
57#[doc = "Field `DINDISALT` reader - Alternate Data in Disable"]
58pub type DINDISALT_R = crate::BitReader<bool>;
59#[doc = "Field `DINDISALT` writer - Alternate Data in Disable"]
60pub type DINDISALT_W<'a> = crate::BitWriter<'a, u32, PD_CTRL_SPEC, bool, 28>;
61impl R {
62    #[doc = "Bit 0 - Drive Strength for Port"]
63    #[inline(always)]
64    pub fn drivestrength(&self) -> DRIVESTRENGTH_R {
65        DRIVESTRENGTH_R::new((self.bits & 1) != 0)
66    }
67    #[doc = "Bits 4:6 - Slewrate Limit for Port"]
68    #[inline(always)]
69    pub fn slewrate(&self) -> SLEWRATE_R {
70        SLEWRATE_R::new(((self.bits >> 4) & 7) as u8)
71    }
72    #[doc = "Bit 12 - Data in Disable"]
73    #[inline(always)]
74    pub fn dindis(&self) -> DINDIS_R {
75        DINDIS_R::new(((self.bits >> 12) & 1) != 0)
76    }
77    #[doc = "Bit 16 - Alternate Drive Strength for Port"]
78    #[inline(always)]
79    pub fn drivestrengthalt(&self) -> DRIVESTRENGTHALT_R {
80        DRIVESTRENGTHALT_R::new(((self.bits >> 16) & 1) != 0)
81    }
82    #[doc = "Bits 20:22 - Alternate Slewrate Limit for Port"]
83    #[inline(always)]
84    pub fn slewratealt(&self) -> SLEWRATEALT_R {
85        SLEWRATEALT_R::new(((self.bits >> 20) & 7) as u8)
86    }
87    #[doc = "Bit 28 - Alternate Data in Disable"]
88    #[inline(always)]
89    pub fn dindisalt(&self) -> DINDISALT_R {
90        DINDISALT_R::new(((self.bits >> 28) & 1) != 0)
91    }
92}
93impl W {
94    #[doc = "Bit 0 - Drive Strength for Port"]
95    #[inline(always)]
96    pub fn drivestrength(&mut self) -> DRIVESTRENGTH_W {
97        DRIVESTRENGTH_W::new(self)
98    }
99    #[doc = "Bits 4:6 - Slewrate Limit for Port"]
100    #[inline(always)]
101    pub fn slewrate(&mut self) -> SLEWRATE_W {
102        SLEWRATE_W::new(self)
103    }
104    #[doc = "Bit 12 - Data in Disable"]
105    #[inline(always)]
106    pub fn dindis(&mut self) -> DINDIS_W {
107        DINDIS_W::new(self)
108    }
109    #[doc = "Bit 16 - Alternate Drive Strength for Port"]
110    #[inline(always)]
111    pub fn drivestrengthalt(&mut self) -> DRIVESTRENGTHALT_W {
112        DRIVESTRENGTHALT_W::new(self)
113    }
114    #[doc = "Bits 20:22 - Alternate Slewrate Limit for Port"]
115    #[inline(always)]
116    pub fn slewratealt(&mut self) -> SLEWRATEALT_W {
117        SLEWRATEALT_W::new(self)
118    }
119    #[doc = "Bit 28 - Alternate Data in Disable"]
120    #[inline(always)]
121    pub fn dindisalt(&mut self) -> DINDISALT_W {
122        DINDISALT_W::new(self)
123    }
124    #[doc = "Writes raw bits to the register."]
125    #[inline(always)]
126    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
127        self.0.bits(bits);
128        self
129    }
130}
131#[doc = "Port Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pd_ctrl](index.html) module"]
132pub struct PD_CTRL_SPEC;
133impl crate::RegisterSpec for PD_CTRL_SPEC {
134    type Ux = u32;
135}
136#[doc = "`read()` method returns [pd_ctrl::R](R) reader structure"]
137impl crate::Readable for PD_CTRL_SPEC {
138    type Reader = R;
139}
140#[doc = "`write(|w| ..)` method takes [pd_ctrl::W](W) writer structure"]
141impl crate::Writable for PD_CTRL_SPEC {
142    type Writer = W;
143}
144#[doc = "`reset()` method sets PD_CTRL to value 0x0050_0050"]
145impl crate::Resettable for PD_CTRL_SPEC {
146    #[inline(always)]
147    fn reset_value() -> Self::Ux {
148        0x0050_0050
149    }
150}
efm32tg11b520_pac/gpio/pd_ctrl.rs

efm32tg11b520_pac/gpio/
pd_ctrl.rs
