efm32tg11b320_pac/uart0/
timecmp1.rs

1#[doc = "Register `TIMECMP1` reader"]
2pub struct R(crate::R<TIMECMP1_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<TIMECMP1_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<TIMECMP1_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<TIMECMP1_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `TIMECMP1` writer"]
17pub struct W(crate::W<TIMECMP1_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<TIMECMP1_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<TIMECMP1_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<TIMECMP1_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `TCMPVAL` reader - Timer Comparator 1"]
38pub type TCMPVAL_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `TCMPVAL` writer - Timer Comparator 1"]
40pub type TCMPVAL_W<'a> = crate::FieldWriter<'a, u32, TIMECMP1_SPEC, u8, u8, 8, 0>;
41#[doc = "Timer Start Source\n\nValue on reset: 0"]
42#[derive(Clone, Copy, Debug, PartialEq)]
43#[repr(u8)]
44pub enum TSTART_A {
45    #[doc = "0: Comparator 1 is disabled"]
46    DISABLE = 0,
47    #[doc = "1: Comparator 1 and timer are started at TX end of frame"]
48    TXEOF = 1,
49    #[doc = "2: Comparator 1 and timer are started at TX Complete"]
50    TXC = 2,
51    #[doc = "3: Comparator 1 and timer are started at RX going going Active (default: low)"]
52    RXACT = 3,
53    #[doc = "4: Comparator 1 and timer are started at RX end of frame"]
54    RXEOF = 4,
55}
56impl From<TSTART_A> for u8 {
57    #[inline(always)]
58    fn from(variant: TSTART_A) -> Self {
59        variant as _
60    }
61}
62#[doc = "Field `TSTART` reader - Timer Start Source"]
63pub type TSTART_R = crate::FieldReader<u8, TSTART_A>;
64impl TSTART_R {
65    #[doc = "Get enumerated values variant"]
66    #[inline(always)]
67    pub fn variant(&self) -> Option<TSTART_A> {
68        match self.bits {
69            0 => Some(TSTART_A::DISABLE),
70            1 => Some(TSTART_A::TXEOF),
71            2 => Some(TSTART_A::TXC),
72            3 => Some(TSTART_A::RXACT),
73            4 => Some(TSTART_A::RXEOF),
74            _ => None,
75        }
76    }
77    #[doc = "Checks if the value of the field is `DISABLE`"]
78    #[inline(always)]
79    pub fn is_disable(&self) -> bool {
80        *self == TSTART_A::DISABLE
81    }
82    #[doc = "Checks if the value of the field is `TXEOF`"]
83    #[inline(always)]
84    pub fn is_txeof(&self) -> bool {
85        *self == TSTART_A::TXEOF
86    }
87    #[doc = "Checks if the value of the field is `TXC`"]
88    #[inline(always)]
89    pub fn is_txc(&self) -> bool {
90        *self == TSTART_A::TXC
91    }
92    #[doc = "Checks if the value of the field is `RXACT`"]
93    #[inline(always)]
94    pub fn is_rxact(&self) -> bool {
95        *self == TSTART_A::RXACT
96    }
97    #[doc = "Checks if the value of the field is `RXEOF`"]
98    #[inline(always)]
99    pub fn is_rxeof(&self) -> bool {
100        *self == TSTART_A::RXEOF
101    }
102}
103#[doc = "Field `TSTART` writer - Timer Start Source"]
104pub type TSTART_W<'a> = crate::FieldWriter<'a, u32, TIMECMP1_SPEC, u8, TSTART_A, 3, 16>;
105impl<'a> TSTART_W<'a> {
106    #[doc = "Comparator 1 is disabled"]
107    #[inline(always)]
108    pub fn disable(self) -> &'a mut W {
109        self.variant(TSTART_A::DISABLE)
110    }
111    #[doc = "Comparator 1 and timer are started at TX end of frame"]
112    #[inline(always)]
113    pub fn txeof(self) -> &'a mut W {
114        self.variant(TSTART_A::TXEOF)
115    }
116    #[doc = "Comparator 1 and timer are started at TX Complete"]
117    #[inline(always)]
118    pub fn txc(self) -> &'a mut W {
119        self.variant(TSTART_A::TXC)
120    }
121    #[doc = "Comparator 1 and timer are started at RX going going Active (default: low)"]
122    #[inline(always)]
123    pub fn rxact(self) -> &'a mut W {
124        self.variant(TSTART_A::RXACT)
125    }
126    #[doc = "Comparator 1 and timer are started at RX end of frame"]
127    #[inline(always)]
128    pub fn rxeof(self) -> &'a mut W {
129        self.variant(TSTART_A::RXEOF)
130    }
131}
132#[doc = "Source Used to Disable Comparator 1\n\nValue on reset: 0"]
133#[derive(Clone, Copy, Debug, PartialEq)]
134#[repr(u8)]
135pub enum TSTOP_A {
136    #[doc = "0: Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event"]
137    TCMP1 = 0,
138    #[doc = "1: Comparator 1 is disabled at TX start TX Engine"]
139    TXST = 1,
140    #[doc = "2: Comparator 1 is disabled on RX going going Active (default: low)"]
141    RXACT = 2,
142    #[doc = "3: Comparator 1 is disabled on RX going Inactive"]
143    RXACTN = 3,
144}
145impl From<TSTOP_A> for u8 {
146    #[inline(always)]
147    fn from(variant: TSTOP_A) -> Self {
148        variant as _
149    }
150}
151#[doc = "Field `TSTOP` reader - Source Used to Disable Comparator 1"]
152pub type TSTOP_R = crate::FieldReader<u8, TSTOP_A>;
153impl TSTOP_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> Option<TSTOP_A> {
157        match self.bits {
158            0 => Some(TSTOP_A::TCMP1),
159            1 => Some(TSTOP_A::TXST),
160            2 => Some(TSTOP_A::RXACT),
161            3 => Some(TSTOP_A::RXACTN),
162            _ => None,
163        }
164    }
165    #[doc = "Checks if the value of the field is `TCMP1`"]
166    #[inline(always)]
167    pub fn is_tcmp1(&self) -> bool {
168        *self == TSTOP_A::TCMP1
169    }
170    #[doc = "Checks if the value of the field is `TXST`"]
171    #[inline(always)]
172    pub fn is_txst(&self) -> bool {
173        *self == TSTOP_A::TXST
174    }
175    #[doc = "Checks if the value of the field is `RXACT`"]
176    #[inline(always)]
177    pub fn is_rxact(&self) -> bool {
178        *self == TSTOP_A::RXACT
179    }
180    #[doc = "Checks if the value of the field is `RXACTN`"]
181    #[inline(always)]
182    pub fn is_rxactn(&self) -> bool {
183        *self == TSTOP_A::RXACTN
184    }
185}
186#[doc = "Field `TSTOP` writer - Source Used to Disable Comparator 1"]
187pub type TSTOP_W<'a> = crate::FieldWriter<'a, u32, TIMECMP1_SPEC, u8, TSTOP_A, 3, 20>;
188impl<'a> TSTOP_W<'a> {
189    #[doc = "Comparator 1 is disabled when the counter equals TCMPVAL and triggers a TCMP1 event"]
190    #[inline(always)]
191    pub fn tcmp1(self) -> &'a mut W {
192        self.variant(TSTOP_A::TCMP1)
193    }
194    #[doc = "Comparator 1 is disabled at TX start TX Engine"]
195    #[inline(always)]
196    pub fn txst(self) -> &'a mut W {
197        self.variant(TSTOP_A::TXST)
198    }
199    #[doc = "Comparator 1 is disabled on RX going going Active (default: low)"]
200    #[inline(always)]
201    pub fn rxact(self) -> &'a mut W {
202        self.variant(TSTOP_A::RXACT)
203    }
204    #[doc = "Comparator 1 is disabled on RX going Inactive"]
205    #[inline(always)]
206    pub fn rxactn(self) -> &'a mut W {
207        self.variant(TSTOP_A::RXACTN)
208    }
209}
210#[doc = "Field `RESTARTEN` reader - Restart Timer on TCMP1"]
211pub type RESTARTEN_R = crate::BitReader<bool>;
212#[doc = "Field `RESTARTEN` writer - Restart Timer on TCMP1"]
213pub type RESTARTEN_W<'a> = crate::BitWriter<'a, u32, TIMECMP1_SPEC, bool, 24>;
214impl R {
215    #[doc = "Bits 0:7 - Timer Comparator 1"]
216    #[inline(always)]
217    pub fn tcmpval(&self) -> TCMPVAL_R {
218        TCMPVAL_R::new((self.bits & 0xff) as u8)
219    }
220    #[doc = "Bits 16:18 - Timer Start Source"]
221    #[inline(always)]
222    pub fn tstart(&self) -> TSTART_R {
223        TSTART_R::new(((self.bits >> 16) & 7) as u8)
224    }
225    #[doc = "Bits 20:22 - Source Used to Disable Comparator 1"]
226    #[inline(always)]
227    pub fn tstop(&self) -> TSTOP_R {
228        TSTOP_R::new(((self.bits >> 20) & 7) as u8)
229    }
230    #[doc = "Bit 24 - Restart Timer on TCMP1"]
231    #[inline(always)]
232    pub fn restarten(&self) -> RESTARTEN_R {
233        RESTARTEN_R::new(((self.bits >> 24) & 1) != 0)
234    }
235}
236impl W {
237    #[doc = "Bits 0:7 - Timer Comparator 1"]
238    #[inline(always)]
239    pub fn tcmpval(&mut self) -> TCMPVAL_W {
240        TCMPVAL_W::new(self)
241    }
242    #[doc = "Bits 16:18 - Timer Start Source"]
243    #[inline(always)]
244    pub fn tstart(&mut self) -> TSTART_W {
245        TSTART_W::new(self)
246    }
247    #[doc = "Bits 20:22 - Source Used to Disable Comparator 1"]
248    #[inline(always)]
249    pub fn tstop(&mut self) -> TSTOP_W {
250        TSTOP_W::new(self)
251    }
252    #[doc = "Bit 24 - Restart Timer on TCMP1"]
253    #[inline(always)]
254    pub fn restarten(&mut self) -> RESTARTEN_W {
255        RESTARTEN_W::new(self)
256    }
257    #[doc = "Writes raw bits to the register."]
258    #[inline(always)]
259    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
260        self.0.bits(bits);
261        self
262    }
263}
264#[doc = "Used to Generate Interrupts and Various Delays\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [timecmp1](index.html) module"]
265pub struct TIMECMP1_SPEC;
266impl crate::RegisterSpec for TIMECMP1_SPEC {
267    type Ux = u32;
268}
269#[doc = "`read()` method returns [timecmp1::R](R) reader structure"]
270impl crate::Readable for TIMECMP1_SPEC {
271    type Reader = R;
272}
273#[doc = "`write(|w| ..)` method takes [timecmp1::W](W) writer structure"]
274impl crate::Writable for TIMECMP1_SPEC {
275    type Writer = W;
276}
277#[doc = "`reset()` method sets TIMECMP1 to value 0"]
278impl crate::Resettable for TIMECMP1_SPEC {
279    #[inline(always)]
280    fn reset_value() -> Self::Ux {
281        0
282    }
283}
efm32tg11b320_pac/uart0/timecmp1.rs

efm32tg11b320_pac/uart0/
timecmp1.rs
