efm32tg11b_pac/efm32tg11b540/usart2/
ctrlx.rs

1#[doc = "Register `CTRLX` reader"]
2pub struct R(crate::R<CTRLX_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRLX_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRLX_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRLX_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRLX` writer"]
17pub struct W(crate::W<CTRLX_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRLX_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRLX_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRLX_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DBGHALT` reader - Debug Halt"]
38pub type DBGHALT_R = crate::BitReader<bool>;
39#[doc = "Field `DBGHALT` writer - Debug Halt"]
40pub type DBGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, bool, O>;
41#[doc = "Field `CTSINV` reader - CTS Pin Inversion"]
42pub type CTSINV_R = crate::BitReader<bool>;
43#[doc = "Field `CTSINV` writer - CTS Pin Inversion"]
44pub type CTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, bool, O>;
45#[doc = "Field `CTSEN` reader - CTS Function Enabled"]
46pub type CTSEN_R = crate::BitReader<bool>;
47#[doc = "Field `CTSEN` writer - CTS Function Enabled"]
48pub type CTSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, bool, O>;
49#[doc = "Field `RTSINV` reader - RTS Pin Inversion"]
50pub type RTSINV_R = crate::BitReader<bool>;
51#[doc = "Field `RTSINV` writer - RTS Pin Inversion"]
52pub type RTSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRLX_SPEC, bool, O>;
53impl R {
54    #[doc = "Bit 0 - Debug Halt"]
55    #[inline(always)]
56    pub fn dbghalt(&self) -> DBGHALT_R {
57        DBGHALT_R::new((self.bits & 1) != 0)
58    }
59    #[doc = "Bit 1 - CTS Pin Inversion"]
60    #[inline(always)]
61    pub fn ctsinv(&self) -> CTSINV_R {
62        CTSINV_R::new(((self.bits >> 1) & 1) != 0)
63    }
64    #[doc = "Bit 2 - CTS Function Enabled"]
65    #[inline(always)]
66    pub fn ctsen(&self) -> CTSEN_R {
67        CTSEN_R::new(((self.bits >> 2) & 1) != 0)
68    }
69    #[doc = "Bit 3 - RTS Pin Inversion"]
70    #[inline(always)]
71    pub fn rtsinv(&self) -> RTSINV_R {
72        RTSINV_R::new(((self.bits >> 3) & 1) != 0)
73    }
74}
75impl W {
76    #[doc = "Bit 0 - Debug Halt"]
77    #[inline(always)]
78    #[must_use]
79    pub fn dbghalt(&mut self) -> DBGHALT_W<0> {
80        DBGHALT_W::new(self)
81    }
82    #[doc = "Bit 1 - CTS Pin Inversion"]
83    #[inline(always)]
84    #[must_use]
85    pub fn ctsinv(&mut self) -> CTSINV_W<1> {
86        CTSINV_W::new(self)
87    }
88    #[doc = "Bit 2 - CTS Function Enabled"]
89    #[inline(always)]
90    #[must_use]
91    pub fn ctsen(&mut self) -> CTSEN_W<2> {
92        CTSEN_W::new(self)
93    }
94    #[doc = "Bit 3 - RTS Pin Inversion"]
95    #[inline(always)]
96    #[must_use]
97    pub fn rtsinv(&mut self) -> RTSINV_W<3> {
98        RTSINV_W::new(self)
99    }
100    #[doc = "Writes raw bits to the register."]
101    #[inline(always)]
102    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
103        self.0.bits(bits);
104        self
105    }
106}
107#[doc = "Control Register Extended\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrlx](index.html) module"]
108pub struct CTRLX_SPEC;
109impl crate::RegisterSpec for CTRLX_SPEC {
110    type Ux = u32;
111}
112#[doc = "`read()` method returns [ctrlx::R](R) reader structure"]
113impl crate::Readable for CTRLX_SPEC {
114    type Reader = R;
115}
116#[doc = "`write(|w| ..)` method takes [ctrlx::W](W) writer structure"]
117impl crate::Writable for CTRLX_SPEC {
118    type Writer = W;
119    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
120    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
121}
122#[doc = "`reset()` method sets CTRLX to value 0"]
123impl crate::Resettable for CTRLX_SPEC {
124    const RESET_VALUE: Self::Ux = 0;
125}
efm32tg11b_pac/efm32tg11b540/usart2/ctrlx.rs

efm32tg11b_pac/efm32tg11b540/usart2/
ctrlx.rs
