efm32tg11b_pac/efm32tg11b540/pcnt0/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `MODE` reader - Mode Select"]
38pub type MODE_R = crate::FieldReader<u8, MODE_A>;
39#[doc = "Mode Select\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum MODE_A {
43    #[doc = "0: The module is disabled."]
44    DISABLE = 0,
45    #[doc = "1: Single input LFACLK oversampling mode (available in EM0-EM3)."]
46    OVSSINGLE = 1,
47    #[doc = "2: Externally clocked single input counter mode (available in EM0-EM3)."]
48    EXTCLKSINGLE = 2,
49    #[doc = "3: Externally clocked quadrature decoder mode (available in EM0-EM3)."]
50    EXTCLKQUAD = 3,
51    #[doc = "4: LFACLK oversampling quadrature decoder 1X mode (available in EM0-EM3)."]
52    OVSQUAD1X = 4,
53    #[doc = "5: LFACLK oversampling quadrature decoder 2X mode (available in EM0-EM3)."]
54    OVSQUAD2X = 5,
55    #[doc = "6: LFACLK oversampling quadrature decoder 4X mode (available in EM0-EM3)."]
56    OVSQUAD4X = 6,
57}
58impl From<MODE_A> for u8 {
59    #[inline(always)]
60    fn from(variant: MODE_A) -> Self {
61        variant as _
62    }
63}
64impl MODE_R {
65    #[doc = "Get enumerated values variant"]
66    #[inline(always)]
67    pub fn variant(&self) -> Option<MODE_A> {
68        match self.bits {
69            0 => Some(MODE_A::DISABLE),
70            1 => Some(MODE_A::OVSSINGLE),
71            2 => Some(MODE_A::EXTCLKSINGLE),
72            3 => Some(MODE_A::EXTCLKQUAD),
73            4 => Some(MODE_A::OVSQUAD1X),
74            5 => Some(MODE_A::OVSQUAD2X),
75            6 => Some(MODE_A::OVSQUAD4X),
76            _ => None,
77        }
78    }
79    #[doc = "Checks if the value of the field is `DISABLE`"]
80    #[inline(always)]
81    pub fn is_disable(&self) -> bool {
82        *self == MODE_A::DISABLE
83    }
84    #[doc = "Checks if the value of the field is `OVSSINGLE`"]
85    #[inline(always)]
86    pub fn is_ovssingle(&self) -> bool {
87        *self == MODE_A::OVSSINGLE
88    }
89    #[doc = "Checks if the value of the field is `EXTCLKSINGLE`"]
90    #[inline(always)]
91    pub fn is_extclksingle(&self) -> bool {
92        *self == MODE_A::EXTCLKSINGLE
93    }
94    #[doc = "Checks if the value of the field is `EXTCLKQUAD`"]
95    #[inline(always)]
96    pub fn is_extclkquad(&self) -> bool {
97        *self == MODE_A::EXTCLKQUAD
98    }
99    #[doc = "Checks if the value of the field is `OVSQUAD1X`"]
100    #[inline(always)]
101    pub fn is_ovsquad1x(&self) -> bool {
102        *self == MODE_A::OVSQUAD1X
103    }
104    #[doc = "Checks if the value of the field is `OVSQUAD2X`"]
105    #[inline(always)]
106    pub fn is_ovsquad2x(&self) -> bool {
107        *self == MODE_A::OVSQUAD2X
108    }
109    #[doc = "Checks if the value of the field is `OVSQUAD4X`"]
110    #[inline(always)]
111    pub fn is_ovsquad4x(&self) -> bool {
112        *self == MODE_A::OVSQUAD4X
113    }
114}
115#[doc = "Field `MODE` writer - Mode Select"]
116pub type MODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, MODE_A, 3, O>;
117impl<'a, const O: u8> MODE_W<'a, O> {
118    #[doc = "The module is disabled."]
119    #[inline(always)]
120    pub fn disable(self) -> &'a mut W {
121        self.variant(MODE_A::DISABLE)
122    }
123    #[doc = "Single input LFACLK oversampling mode (available in EM0-EM3)."]
124    #[inline(always)]
125    pub fn ovssingle(self) -> &'a mut W {
126        self.variant(MODE_A::OVSSINGLE)
127    }
128    #[doc = "Externally clocked single input counter mode (available in EM0-EM3)."]
129    #[inline(always)]
130    pub fn extclksingle(self) -> &'a mut W {
131        self.variant(MODE_A::EXTCLKSINGLE)
132    }
133    #[doc = "Externally clocked quadrature decoder mode (available in EM0-EM3)."]
134    #[inline(always)]
135    pub fn extclkquad(self) -> &'a mut W {
136        self.variant(MODE_A::EXTCLKQUAD)
137    }
138    #[doc = "LFACLK oversampling quadrature decoder 1X mode (available in EM0-EM3)."]
139    #[inline(always)]
140    pub fn ovsquad1x(self) -> &'a mut W {
141        self.variant(MODE_A::OVSQUAD1X)
142    }
143    #[doc = "LFACLK oversampling quadrature decoder 2X mode (available in EM0-EM3)."]
144    #[inline(always)]
145    pub fn ovsquad2x(self) -> &'a mut W {
146        self.variant(MODE_A::OVSQUAD2X)
147    }
148    #[doc = "LFACLK oversampling quadrature decoder 4X mode (available in EM0-EM3)."]
149    #[inline(always)]
150    pub fn ovsquad4x(self) -> &'a mut W {
151        self.variant(MODE_A::OVSQUAD4X)
152    }
153}
154#[doc = "Field `FILT` reader - Enable Digital Pulse Width Filter"]
155pub type FILT_R = crate::BitReader<bool>;
156#[doc = "Field `FILT` writer - Enable Digital Pulse Width Filter"]
157pub type FILT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
158#[doc = "Field `RSTEN` reader - Enable PCNT Clock Domain Reset"]
159pub type RSTEN_R = crate::BitReader<bool>;
160#[doc = "Field `RSTEN` writer - Enable PCNT Clock Domain Reset"]
161pub type RSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
162#[doc = "Field `CNTRSTEN` reader - Enable CNT Reset"]
163pub type CNTRSTEN_R = crate::BitReader<bool>;
164#[doc = "Field `CNTRSTEN` writer - Enable CNT Reset"]
165pub type CNTRSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
166#[doc = "Field `AUXCNTRSTEN` reader - Enable AUXCNT Reset"]
167pub type AUXCNTRSTEN_R = crate::BitReader<bool>;
168#[doc = "Field `AUXCNTRSTEN` writer - Enable AUXCNT Reset"]
169pub type AUXCNTRSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
170#[doc = "Field `DEBUGHALT` reader - Debug Mode Halt Enable"]
171pub type DEBUGHALT_R = crate::BitReader<bool>;
172#[doc = "Field `DEBUGHALT` writer - Debug Mode Halt Enable"]
173pub type DEBUGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
174#[doc = "Field `HYST` reader - Enable Hysteresis"]
175pub type HYST_R = crate::BitReader<bool>;
176#[doc = "Field `HYST` writer - Enable Hysteresis"]
177pub type HYST_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
178#[doc = "Field `S1CDIR` reader - Count Direction Determined By S1"]
179pub type S1CDIR_R = crate::BitReader<bool>;
180#[doc = "Field `S1CDIR` writer - Count Direction Determined By S1"]
181pub type S1CDIR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
182#[doc = "Field `CNTEV` reader - Controls When the Counter Counts"]
183pub type CNTEV_R = crate::FieldReader<u8, CNTEV_A>;
184#[doc = "Controls When the Counter Counts\n\nValue on reset: 0"]
185#[derive(Clone, Copy, Debug, PartialEq, Eq)]
186#[repr(u8)]
187pub enum CNTEV_A {
188    #[doc = "0: Counts up on up-count and down on down-count events."]
189    BOTH = 0,
190    #[doc = "1: Only counts up on up-count events."]
191    UP = 1,
192    #[doc = "2: Only counts down on down-count events."]
193    DOWN = 2,
194    #[doc = "3: Never counts."]
195    NONE = 3,
196}
197impl From<CNTEV_A> for u8 {
198    #[inline(always)]
199    fn from(variant: CNTEV_A) -> Self {
200        variant as _
201    }
202}
203impl CNTEV_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> CNTEV_A {
207        match self.bits {
208            0 => CNTEV_A::BOTH,
209            1 => CNTEV_A::UP,
210            2 => CNTEV_A::DOWN,
211            3 => CNTEV_A::NONE,
212            _ => unreachable!(),
213        }
214    }
215    #[doc = "Checks if the value of the field is `BOTH`"]
216    #[inline(always)]
217    pub fn is_both(&self) -> bool {
218        *self == CNTEV_A::BOTH
219    }
220    #[doc = "Checks if the value of the field is `UP`"]
221    #[inline(always)]
222    pub fn is_up(&self) -> bool {
223        *self == CNTEV_A::UP
224    }
225    #[doc = "Checks if the value of the field is `DOWN`"]
226    #[inline(always)]
227    pub fn is_down(&self) -> bool {
228        *self == CNTEV_A::DOWN
229    }
230    #[doc = "Checks if the value of the field is `NONE`"]
231    #[inline(always)]
232    pub fn is_none(&self) -> bool {
233        *self == CNTEV_A::NONE
234    }
235}
236#[doc = "Field `CNTEV` writer - Controls When the Counter Counts"]
237pub type CNTEV_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, CNTEV_A, 2, O>;
238impl<'a, const O: u8> CNTEV_W<'a, O> {
239    #[doc = "Counts up on up-count and down on down-count events."]
240    #[inline(always)]
241    pub fn both(self) -> &'a mut W {
242        self.variant(CNTEV_A::BOTH)
243    }
244    #[doc = "Only counts up on up-count events."]
245    #[inline(always)]
246    pub fn up(self) -> &'a mut W {
247        self.variant(CNTEV_A::UP)
248    }
249    #[doc = "Only counts down on down-count events."]
250    #[inline(always)]
251    pub fn down(self) -> &'a mut W {
252        self.variant(CNTEV_A::DOWN)
253    }
254    #[doc = "Never counts."]
255    #[inline(always)]
256    pub fn none(self) -> &'a mut W {
257        self.variant(CNTEV_A::NONE)
258    }
259}
260#[doc = "Field `AUXCNTEV` reader - Controls When the Auxiliary Counter Counts"]
261pub type AUXCNTEV_R = crate::FieldReader<u8, AUXCNTEV_A>;
262#[doc = "Controls When the Auxiliary Counter Counts\n\nValue on reset: 0"]
263#[derive(Clone, Copy, Debug, PartialEq, Eq)]
264#[repr(u8)]
265pub enum AUXCNTEV_A {
266    #[doc = "0: Never counts."]
267    NONE = 0,
268    #[doc = "1: Counts up on up-count events."]
269    UP = 1,
270    #[doc = "2: Counts up on down-count events."]
271    DOWN = 2,
272    #[doc = "3: Counts up on both up-count and down-count events."]
273    BOTH = 3,
274}
275impl From<AUXCNTEV_A> for u8 {
276    #[inline(always)]
277    fn from(variant: AUXCNTEV_A) -> Self {
278        variant as _
279    }
280}
281impl AUXCNTEV_R {
282    #[doc = "Get enumerated values variant"]
283    #[inline(always)]
284    pub fn variant(&self) -> AUXCNTEV_A {
285        match self.bits {
286            0 => AUXCNTEV_A::NONE,
287            1 => AUXCNTEV_A::UP,
288            2 => AUXCNTEV_A::DOWN,
289            3 => AUXCNTEV_A::BOTH,
290            _ => unreachable!(),
291        }
292    }
293    #[doc = "Checks if the value of the field is `NONE`"]
294    #[inline(always)]
295    pub fn is_none(&self) -> bool {
296        *self == AUXCNTEV_A::NONE
297    }
298    #[doc = "Checks if the value of the field is `UP`"]
299    #[inline(always)]
300    pub fn is_up(&self) -> bool {
301        *self == AUXCNTEV_A::UP
302    }
303    #[doc = "Checks if the value of the field is `DOWN`"]
304    #[inline(always)]
305    pub fn is_down(&self) -> bool {
306        *self == AUXCNTEV_A::DOWN
307    }
308    #[doc = "Checks if the value of the field is `BOTH`"]
309    #[inline(always)]
310    pub fn is_both(&self) -> bool {
311        *self == AUXCNTEV_A::BOTH
312    }
313}
314#[doc = "Field `AUXCNTEV` writer - Controls When the Auxiliary Counter Counts"]
315pub type AUXCNTEV_W<'a, const O: u8> =
316    crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, AUXCNTEV_A, 2, O>;
317impl<'a, const O: u8> AUXCNTEV_W<'a, O> {
318    #[doc = "Never counts."]
319    #[inline(always)]
320    pub fn none(self) -> &'a mut W {
321        self.variant(AUXCNTEV_A::NONE)
322    }
323    #[doc = "Counts up on up-count events."]
324    #[inline(always)]
325    pub fn up(self) -> &'a mut W {
326        self.variant(AUXCNTEV_A::UP)
327    }
328    #[doc = "Counts up on down-count events."]
329    #[inline(always)]
330    pub fn down(self) -> &'a mut W {
331        self.variant(AUXCNTEV_A::DOWN)
332    }
333    #[doc = "Counts up on both up-count and down-count events."]
334    #[inline(always)]
335    pub fn both(self) -> &'a mut W {
336        self.variant(AUXCNTEV_A::BOTH)
337    }
338}
339#[doc = "Field `CNTDIR` reader - Non-Quadrature Mode Counter Direction Control"]
340pub type CNTDIR_R = crate::BitReader<bool>;
341#[doc = "Field `CNTDIR` writer - Non-Quadrature Mode Counter Direction Control"]
342pub type CNTDIR_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
343#[doc = "Field `EDGE` reader - Edge Select"]
344pub type EDGE_R = crate::BitReader<bool>;
345#[doc = "Field `EDGE` writer - Edge Select"]
346pub type EDGE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
347#[doc = "Field `TCCMODE` reader - Sets the Mode for Triggered Compare and Clear"]
348pub type TCCMODE_R = crate::FieldReader<u8, TCCMODE_A>;
349#[doc = "Sets the Mode for Triggered Compare and Clear\n\nValue on reset: 0"]
350#[derive(Clone, Copy, Debug, PartialEq, Eq)]
351#[repr(u8)]
352pub enum TCCMODE_A {
353    #[doc = "0: Triggered compare and clear not enabled."]
354    DISABLED = 0,
355    #[doc = "1: Compare and clear performed on each (optionally prescaled) LFA clock cycle."]
356    LFA = 1,
357    #[doc = "2: Compare and clear performed on positive PRS edges."]
358    PRS = 2,
359}
360impl From<TCCMODE_A> for u8 {
361    #[inline(always)]
362    fn from(variant: TCCMODE_A) -> Self {
363        variant as _
364    }
365}
366impl TCCMODE_R {
367    #[doc = "Get enumerated values variant"]
368    #[inline(always)]
369    pub fn variant(&self) -> Option<TCCMODE_A> {
370        match self.bits {
371            0 => Some(TCCMODE_A::DISABLED),
372            1 => Some(TCCMODE_A::LFA),
373            2 => Some(TCCMODE_A::PRS),
374            _ => None,
375        }
376    }
377    #[doc = "Checks if the value of the field is `DISABLED`"]
378    #[inline(always)]
379    pub fn is_disabled(&self) -> bool {
380        *self == TCCMODE_A::DISABLED
381    }
382    #[doc = "Checks if the value of the field is `LFA`"]
383    #[inline(always)]
384    pub fn is_lfa(&self) -> bool {
385        *self == TCCMODE_A::LFA
386    }
387    #[doc = "Checks if the value of the field is `PRS`"]
388    #[inline(always)]
389    pub fn is_prs(&self) -> bool {
390        *self == TCCMODE_A::PRS
391    }
392}
393#[doc = "Field `TCCMODE` writer - Sets the Mode for Triggered Compare and Clear"]
394pub type TCCMODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, TCCMODE_A, 2, O>;
395impl<'a, const O: u8> TCCMODE_W<'a, O> {
396    #[doc = "Triggered compare and clear not enabled."]
397    #[inline(always)]
398    pub fn disabled(self) -> &'a mut W {
399        self.variant(TCCMODE_A::DISABLED)
400    }
401    #[doc = "Compare and clear performed on each (optionally prescaled) LFA clock cycle."]
402    #[inline(always)]
403    pub fn lfa(self) -> &'a mut W {
404        self.variant(TCCMODE_A::LFA)
405    }
406    #[doc = "Compare and clear performed on positive PRS edges."]
407    #[inline(always)]
408    pub fn prs(self) -> &'a mut W {
409        self.variant(TCCMODE_A::PRS)
410    }
411}
412#[doc = "Field `TCCPRESC` reader - Set the LFA Prescaler for Triggered Compare and Clear"]
413pub type TCCPRESC_R = crate::FieldReader<u8, TCCPRESC_A>;
414#[doc = "Set the LFA Prescaler for Triggered Compare and Clear\n\nValue on reset: 0"]
415#[derive(Clone, Copy, Debug, PartialEq, Eq)]
416#[repr(u8)]
417pub enum TCCPRESC_A {
418    #[doc = "0: Compare and clear event each LFA cycle."]
419    DIV1 = 0,
420    #[doc = "1: Compare and clear performed on every other LFA cycle."]
421    DIV2 = 1,
422    #[doc = "2: Compare and clear performed on every 4th LFA cycle."]
423    DIV4 = 2,
424    #[doc = "3: Compare and clear performed on every 8th LFA cycle."]
425    DIV8 = 3,
426}
427impl From<TCCPRESC_A> for u8 {
428    #[inline(always)]
429    fn from(variant: TCCPRESC_A) -> Self {
430        variant as _
431    }
432}
433impl TCCPRESC_R {
434    #[doc = "Get enumerated values variant"]
435    #[inline(always)]
436    pub fn variant(&self) -> TCCPRESC_A {
437        match self.bits {
438            0 => TCCPRESC_A::DIV1,
439            1 => TCCPRESC_A::DIV2,
440            2 => TCCPRESC_A::DIV4,
441            3 => TCCPRESC_A::DIV8,
442            _ => unreachable!(),
443        }
444    }
445    #[doc = "Checks if the value of the field is `DIV1`"]
446    #[inline(always)]
447    pub fn is_div1(&self) -> bool {
448        *self == TCCPRESC_A::DIV1
449    }
450    #[doc = "Checks if the value of the field is `DIV2`"]
451    #[inline(always)]
452    pub fn is_div2(&self) -> bool {
453        *self == TCCPRESC_A::DIV2
454    }
455    #[doc = "Checks if the value of the field is `DIV4`"]
456    #[inline(always)]
457    pub fn is_div4(&self) -> bool {
458        *self == TCCPRESC_A::DIV4
459    }
460    #[doc = "Checks if the value of the field is `DIV8`"]
461    #[inline(always)]
462    pub fn is_div8(&self) -> bool {
463        *self == TCCPRESC_A::DIV8
464    }
465}
466#[doc = "Field `TCCPRESC` writer - Set the LFA Prescaler for Triggered Compare and Clear"]
467pub type TCCPRESC_W<'a, const O: u8> =
468    crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, TCCPRESC_A, 2, O>;
469impl<'a, const O: u8> TCCPRESC_W<'a, O> {
470    #[doc = "Compare and clear event each LFA cycle."]
471    #[inline(always)]
472    pub fn div1(self) -> &'a mut W {
473        self.variant(TCCPRESC_A::DIV1)
474    }
475    #[doc = "Compare and clear performed on every other LFA cycle."]
476    #[inline(always)]
477    pub fn div2(self) -> &'a mut W {
478        self.variant(TCCPRESC_A::DIV2)
479    }
480    #[doc = "Compare and clear performed on every 4th LFA cycle."]
481    #[inline(always)]
482    pub fn div4(self) -> &'a mut W {
483        self.variant(TCCPRESC_A::DIV4)
484    }
485    #[doc = "Compare and clear performed on every 8th LFA cycle."]
486    #[inline(always)]
487    pub fn div8(self) -> &'a mut W {
488        self.variant(TCCPRESC_A::DIV8)
489    }
490}
491#[doc = "Field `TCCCOMP` reader - Triggered Compare and Clear Compare Mode"]
492pub type TCCCOMP_R = crate::FieldReader<u8, TCCCOMP_A>;
493#[doc = "Triggered Compare and Clear Compare Mode\n\nValue on reset: 0"]
494#[derive(Clone, Copy, Debug, PartialEq, Eq)]
495#[repr(u8)]
496pub enum TCCCOMP_A {
497    #[doc = "0: Compare match if PCNT_CNT is less than, or equal to PCNT_TOP."]
498    LTOE = 0,
499    #[doc = "1: Compare match if PCNT_CNT is greater than or equal to PCNT_TOP."]
500    GTOE = 1,
501    #[doc = "2: Compare match if PCNT_CNT is less than, or equal to PCNT_TOP\\[15:8\\]\\], and greater than, or equal to PCNT_TOP\\[7:0\\]."]
502    RANGE = 2,
503}
504impl From<TCCCOMP_A> for u8 {
505    #[inline(always)]
506    fn from(variant: TCCCOMP_A) -> Self {
507        variant as _
508    }
509}
510impl TCCCOMP_R {
511    #[doc = "Get enumerated values variant"]
512    #[inline(always)]
513    pub fn variant(&self) -> Option<TCCCOMP_A> {
514        match self.bits {
515            0 => Some(TCCCOMP_A::LTOE),
516            1 => Some(TCCCOMP_A::GTOE),
517            2 => Some(TCCCOMP_A::RANGE),
518            _ => None,
519        }
520    }
521    #[doc = "Checks if the value of the field is `LTOE`"]
522    #[inline(always)]
523    pub fn is_ltoe(&self) -> bool {
524        *self == TCCCOMP_A::LTOE
525    }
526    #[doc = "Checks if the value of the field is `GTOE`"]
527    #[inline(always)]
528    pub fn is_gtoe(&self) -> bool {
529        *self == TCCCOMP_A::GTOE
530    }
531    #[doc = "Checks if the value of the field is `RANGE`"]
532    #[inline(always)]
533    pub fn is_range(&self) -> bool {
534        *self == TCCCOMP_A::RANGE
535    }
536}
537#[doc = "Field `TCCCOMP` writer - Triggered Compare and Clear Compare Mode"]
538pub type TCCCOMP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, TCCCOMP_A, 2, O>;
539impl<'a, const O: u8> TCCCOMP_W<'a, O> {
540    #[doc = "Compare match if PCNT_CNT is less than, or equal to PCNT_TOP."]
541    #[inline(always)]
542    pub fn ltoe(self) -> &'a mut W {
543        self.variant(TCCCOMP_A::LTOE)
544    }
545    #[doc = "Compare match if PCNT_CNT is greater than or equal to PCNT_TOP."]
546    #[inline(always)]
547    pub fn gtoe(self) -> &'a mut W {
548        self.variant(TCCCOMP_A::GTOE)
549    }
550    #[doc = "Compare match if PCNT_CNT is less than, or equal to PCNT_TOP\\[15:8\\]\\], and greater than, or equal to PCNT_TOP\\[7:0\\]."]
551    #[inline(always)]
552    pub fn range(self) -> &'a mut W {
553        self.variant(TCCCOMP_A::RANGE)
554    }
555}
556#[doc = "Field `PRSGATEEN` reader - PRS Gate Enable"]
557pub type PRSGATEEN_R = crate::BitReader<bool>;
558#[doc = "Field `PRSGATEEN` writer - PRS Gate Enable"]
559pub type PRSGATEEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
560#[doc = "Field `TCCPRSPOL` reader - TCC PRS Polarity Select"]
561pub type TCCPRSPOL_R = crate::BitReader<bool>;
562#[doc = "Field `TCCPRSPOL` writer - TCC PRS Polarity Select"]
563pub type TCCPRSPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
564#[doc = "Field `TCCPRSSEL` reader - TCC PRS Channel Select"]
565pub type TCCPRSSEL_R = crate::FieldReader<u8, TCCPRSSEL_A>;
566#[doc = "TCC PRS Channel Select\n\nValue on reset: 0"]
567#[derive(Clone, Copy, Debug, PartialEq, Eq)]
568#[repr(u8)]
569pub enum TCCPRSSEL_A {
570    #[doc = "0: PRS Channel 0 selected."]
571    PRSCH0 = 0,
572    #[doc = "1: PRS Channel 1 selected."]
573    PRSCH1 = 1,
574    #[doc = "2: PRS Channel 2 selected."]
575    PRSCH2 = 2,
576    #[doc = "3: PRS Channel 3 selected."]
577    PRSCH3 = 3,
578    #[doc = "4: PRS Channel 4 selected."]
579    PRSCH4 = 4,
580    #[doc = "5: PRS Channel 5 selected."]
581    PRSCH5 = 5,
582    #[doc = "6: PRS Channel 6 selected."]
583    PRSCH6 = 6,
584    #[doc = "7: PRS Channel 7 selected."]
585    PRSCH7 = 7,
586}
587impl From<TCCPRSSEL_A> for u8 {
588    #[inline(always)]
589    fn from(variant: TCCPRSSEL_A) -> Self {
590        variant as _
591    }
592}
593impl TCCPRSSEL_R {
594    #[doc = "Get enumerated values variant"]
595    #[inline(always)]
596    pub fn variant(&self) -> TCCPRSSEL_A {
597        match self.bits {
598            0 => TCCPRSSEL_A::PRSCH0,
599            1 => TCCPRSSEL_A::PRSCH1,
600            2 => TCCPRSSEL_A::PRSCH2,
601            3 => TCCPRSSEL_A::PRSCH3,
602            4 => TCCPRSSEL_A::PRSCH4,
603            5 => TCCPRSSEL_A::PRSCH5,
604            6 => TCCPRSSEL_A::PRSCH6,
605            7 => TCCPRSSEL_A::PRSCH7,
606            _ => unreachable!(),
607        }
608    }
609    #[doc = "Checks if the value of the field is `PRSCH0`"]
610    #[inline(always)]
611    pub fn is_prsch0(&self) -> bool {
612        *self == TCCPRSSEL_A::PRSCH0
613    }
614    #[doc = "Checks if the value of the field is `PRSCH1`"]
615    #[inline(always)]
616    pub fn is_prsch1(&self) -> bool {
617        *self == TCCPRSSEL_A::PRSCH1
618    }
619    #[doc = "Checks if the value of the field is `PRSCH2`"]
620    #[inline(always)]
621    pub fn is_prsch2(&self) -> bool {
622        *self == TCCPRSSEL_A::PRSCH2
623    }
624    #[doc = "Checks if the value of the field is `PRSCH3`"]
625    #[inline(always)]
626    pub fn is_prsch3(&self) -> bool {
627        *self == TCCPRSSEL_A::PRSCH3
628    }
629    #[doc = "Checks if the value of the field is `PRSCH4`"]
630    #[inline(always)]
631    pub fn is_prsch4(&self) -> bool {
632        *self == TCCPRSSEL_A::PRSCH4
633    }
634    #[doc = "Checks if the value of the field is `PRSCH5`"]
635    #[inline(always)]
636    pub fn is_prsch5(&self) -> bool {
637        *self == TCCPRSSEL_A::PRSCH5
638    }
639    #[doc = "Checks if the value of the field is `PRSCH6`"]
640    #[inline(always)]
641    pub fn is_prsch6(&self) -> bool {
642        *self == TCCPRSSEL_A::PRSCH6
643    }
644    #[doc = "Checks if the value of the field is `PRSCH7`"]
645    #[inline(always)]
646    pub fn is_prsch7(&self) -> bool {
647        *self == TCCPRSSEL_A::PRSCH7
648    }
649}
650#[doc = "Field `TCCPRSSEL` writer - TCC PRS Channel Select"]
651pub type TCCPRSSEL_W<'a, const O: u8> =
652    crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, TCCPRSSEL_A, 3, O>;
653impl<'a, const O: u8> TCCPRSSEL_W<'a, O> {
654    #[doc = "PRS Channel 0 selected."]
655    #[inline(always)]
656    pub fn prsch0(self) -> &'a mut W {
657        self.variant(TCCPRSSEL_A::PRSCH0)
658    }
659    #[doc = "PRS Channel 1 selected."]
660    #[inline(always)]
661    pub fn prsch1(self) -> &'a mut W {
662        self.variant(TCCPRSSEL_A::PRSCH1)
663    }
664    #[doc = "PRS Channel 2 selected."]
665    #[inline(always)]
666    pub fn prsch2(self) -> &'a mut W {
667        self.variant(TCCPRSSEL_A::PRSCH2)
668    }
669    #[doc = "PRS Channel 3 selected."]
670    #[inline(always)]
671    pub fn prsch3(self) -> &'a mut W {
672        self.variant(TCCPRSSEL_A::PRSCH3)
673    }
674    #[doc = "PRS Channel 4 selected."]
675    #[inline(always)]
676    pub fn prsch4(self) -> &'a mut W {
677        self.variant(TCCPRSSEL_A::PRSCH4)
678    }
679    #[doc = "PRS Channel 5 selected."]
680    #[inline(always)]
681    pub fn prsch5(self) -> &'a mut W {
682        self.variant(TCCPRSSEL_A::PRSCH5)
683    }
684    #[doc = "PRS Channel 6 selected."]
685    #[inline(always)]
686    pub fn prsch6(self) -> &'a mut W {
687        self.variant(TCCPRSSEL_A::PRSCH6)
688    }
689    #[doc = "PRS Channel 7 selected."]
690    #[inline(always)]
691    pub fn prsch7(self) -> &'a mut W {
692        self.variant(TCCPRSSEL_A::PRSCH7)
693    }
694}
695#[doc = "Field `TOPBHFSEL` reader - TOPB High Frequency Value Select"]
696pub type TOPBHFSEL_R = crate::BitReader<bool>;
697#[doc = "Field `TOPBHFSEL` writer - TOPB High Frequency Value Select"]
698pub type TOPBHFSEL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
699impl R {
700    #[doc = "Bits 0:2 - Mode Select"]
701    #[inline(always)]
702    pub fn mode(&self) -> MODE_R {
703        MODE_R::new((self.bits & 7) as u8)
704    }
705    #[doc = "Bit 3 - Enable Digital Pulse Width Filter"]
706    #[inline(always)]
707    pub fn filt(&self) -> FILT_R {
708        FILT_R::new(((self.bits >> 3) & 1) != 0)
709    }
710    #[doc = "Bit 4 - Enable PCNT Clock Domain Reset"]
711    #[inline(always)]
712    pub fn rsten(&self) -> RSTEN_R {
713        RSTEN_R::new(((self.bits >> 4) & 1) != 0)
714    }
715    #[doc = "Bit 5 - Enable CNT Reset"]
716    #[inline(always)]
717    pub fn cntrsten(&self) -> CNTRSTEN_R {
718        CNTRSTEN_R::new(((self.bits >> 5) & 1) != 0)
719    }
720    #[doc = "Bit 6 - Enable AUXCNT Reset"]
721    #[inline(always)]
722    pub fn auxcntrsten(&self) -> AUXCNTRSTEN_R {
723        AUXCNTRSTEN_R::new(((self.bits >> 6) & 1) != 0)
724    }
725    #[doc = "Bit 7 - Debug Mode Halt Enable"]
726    #[inline(always)]
727    pub fn debughalt(&self) -> DEBUGHALT_R {
728        DEBUGHALT_R::new(((self.bits >> 7) & 1) != 0)
729    }
730    #[doc = "Bit 8 - Enable Hysteresis"]
731    #[inline(always)]
732    pub fn hyst(&self) -> HYST_R {
733        HYST_R::new(((self.bits >> 8) & 1) != 0)
734    }
735    #[doc = "Bit 9 - Count Direction Determined By S1"]
736    #[inline(always)]
737    pub fn s1cdir(&self) -> S1CDIR_R {
738        S1CDIR_R::new(((self.bits >> 9) & 1) != 0)
739    }
740    #[doc = "Bits 10:11 - Controls When the Counter Counts"]
741    #[inline(always)]
742    pub fn cntev(&self) -> CNTEV_R {
743        CNTEV_R::new(((self.bits >> 10) & 3) as u8)
744    }
745    #[doc = "Bits 12:13 - Controls When the Auxiliary Counter Counts"]
746    #[inline(always)]
747    pub fn auxcntev(&self) -> AUXCNTEV_R {
748        AUXCNTEV_R::new(((self.bits >> 12) & 3) as u8)
749    }
750    #[doc = "Bit 14 - Non-Quadrature Mode Counter Direction Control"]
751    #[inline(always)]
752    pub fn cntdir(&self) -> CNTDIR_R {
753        CNTDIR_R::new(((self.bits >> 14) & 1) != 0)
754    }
755    #[doc = "Bit 15 - Edge Select"]
756    #[inline(always)]
757    pub fn edge(&self) -> EDGE_R {
758        EDGE_R::new(((self.bits >> 15) & 1) != 0)
759    }
760    #[doc = "Bits 16:17 - Sets the Mode for Triggered Compare and Clear"]
761    #[inline(always)]
762    pub fn tccmode(&self) -> TCCMODE_R {
763        TCCMODE_R::new(((self.bits >> 16) & 3) as u8)
764    }
765    #[doc = "Bits 19:20 - Set the LFA Prescaler for Triggered Compare and Clear"]
766    #[inline(always)]
767    pub fn tccpresc(&self) -> TCCPRESC_R {
768        TCCPRESC_R::new(((self.bits >> 19) & 3) as u8)
769    }
770    #[doc = "Bits 22:23 - Triggered Compare and Clear Compare Mode"]
771    #[inline(always)]
772    pub fn tcccomp(&self) -> TCCCOMP_R {
773        TCCCOMP_R::new(((self.bits >> 22) & 3) as u8)
774    }
775    #[doc = "Bit 24 - PRS Gate Enable"]
776    #[inline(always)]
777    pub fn prsgateen(&self) -> PRSGATEEN_R {
778        PRSGATEEN_R::new(((self.bits >> 24) & 1) != 0)
779    }
780    #[doc = "Bit 25 - TCC PRS Polarity Select"]
781    #[inline(always)]
782    pub fn tccprspol(&self) -> TCCPRSPOL_R {
783        TCCPRSPOL_R::new(((self.bits >> 25) & 1) != 0)
784    }
785    #[doc = "Bits 26:28 - TCC PRS Channel Select"]
786    #[inline(always)]
787    pub fn tccprssel(&self) -> TCCPRSSEL_R {
788        TCCPRSSEL_R::new(((self.bits >> 26) & 7) as u8)
789    }
790    #[doc = "Bit 31 - TOPB High Frequency Value Select"]
791    #[inline(always)]
792    pub fn topbhfsel(&self) -> TOPBHFSEL_R {
793        TOPBHFSEL_R::new(((self.bits >> 31) & 1) != 0)
794    }
795}
796impl W {
797    #[doc = "Bits 0:2 - Mode Select"]
798    #[inline(always)]
799    #[must_use]
800    pub fn mode(&mut self) -> MODE_W<0> {
801        MODE_W::new(self)
802    }
803    #[doc = "Bit 3 - Enable Digital Pulse Width Filter"]
804    #[inline(always)]
805    #[must_use]
806    pub fn filt(&mut self) -> FILT_W<3> {
807        FILT_W::new(self)
808    }
809    #[doc = "Bit 4 - Enable PCNT Clock Domain Reset"]
810    #[inline(always)]
811    #[must_use]
812    pub fn rsten(&mut self) -> RSTEN_W<4> {
813        RSTEN_W::new(self)
814    }
815    #[doc = "Bit 5 - Enable CNT Reset"]
816    #[inline(always)]
817    #[must_use]
818    pub fn cntrsten(&mut self) -> CNTRSTEN_W<5> {
819        CNTRSTEN_W::new(self)
820    }
821    #[doc = "Bit 6 - Enable AUXCNT Reset"]
822    #[inline(always)]
823    #[must_use]
824    pub fn auxcntrsten(&mut self) -> AUXCNTRSTEN_W<6> {
825        AUXCNTRSTEN_W::new(self)
826    }
827    #[doc = "Bit 7 - Debug Mode Halt Enable"]
828    #[inline(always)]
829    #[must_use]
830    pub fn debughalt(&mut self) -> DEBUGHALT_W<7> {
831        DEBUGHALT_W::new(self)
832    }
833    #[doc = "Bit 8 - Enable Hysteresis"]
834    #[inline(always)]
835    #[must_use]
836    pub fn hyst(&mut self) -> HYST_W<8> {
837        HYST_W::new(self)
838    }
839    #[doc = "Bit 9 - Count Direction Determined By S1"]
840    #[inline(always)]
841    #[must_use]
842    pub fn s1cdir(&mut self) -> S1CDIR_W<9> {
843        S1CDIR_W::new(self)
844    }
845    #[doc = "Bits 10:11 - Controls When the Counter Counts"]
846    #[inline(always)]
847    #[must_use]
848    pub fn cntev(&mut self) -> CNTEV_W<10> {
849        CNTEV_W::new(self)
850    }
851    #[doc = "Bits 12:13 - Controls When the Auxiliary Counter Counts"]
852    #[inline(always)]
853    #[must_use]
854    pub fn auxcntev(&mut self) -> AUXCNTEV_W<12> {
855        AUXCNTEV_W::new(self)
856    }
857    #[doc = "Bit 14 - Non-Quadrature Mode Counter Direction Control"]
858    #[inline(always)]
859    #[must_use]
860    pub fn cntdir(&mut self) -> CNTDIR_W<14> {
861        CNTDIR_W::new(self)
862    }
863    #[doc = "Bit 15 - Edge Select"]
864    #[inline(always)]
865    #[must_use]
866    pub fn edge(&mut self) -> EDGE_W<15> {
867        EDGE_W::new(self)
868    }
869    #[doc = "Bits 16:17 - Sets the Mode for Triggered Compare and Clear"]
870    #[inline(always)]
871    #[must_use]
872    pub fn tccmode(&mut self) -> TCCMODE_W<16> {
873        TCCMODE_W::new(self)
874    }
875    #[doc = "Bits 19:20 - Set the LFA Prescaler for Triggered Compare and Clear"]
876    #[inline(always)]
877    #[must_use]
878    pub fn tccpresc(&mut self) -> TCCPRESC_W<19> {
879        TCCPRESC_W::new(self)
880    }
881    #[doc = "Bits 22:23 - Triggered Compare and Clear Compare Mode"]
882    #[inline(always)]
883    #[must_use]
884    pub fn tcccomp(&mut self) -> TCCCOMP_W<22> {
885        TCCCOMP_W::new(self)
886    }
887    #[doc = "Bit 24 - PRS Gate Enable"]
888    #[inline(always)]
889    #[must_use]
890    pub fn prsgateen(&mut self) -> PRSGATEEN_W<24> {
891        PRSGATEEN_W::new(self)
892    }
893    #[doc = "Bit 25 - TCC PRS Polarity Select"]
894    #[inline(always)]
895    #[must_use]
896    pub fn tccprspol(&mut self) -> TCCPRSPOL_W<25> {
897        TCCPRSPOL_W::new(self)
898    }
899    #[doc = "Bits 26:28 - TCC PRS Channel Select"]
900    #[inline(always)]
901    #[must_use]
902    pub fn tccprssel(&mut self) -> TCCPRSSEL_W<26> {
903        TCCPRSSEL_W::new(self)
904    }
905    #[doc = "Bit 31 - TOPB High Frequency Value Select"]
906    #[inline(always)]
907    #[must_use]
908    pub fn topbhfsel(&mut self) -> TOPBHFSEL_W<31> {
909        TOPBHFSEL_W::new(self)
910    }
911    #[doc = "Writes raw bits to the register."]
912    #[inline(always)]
913    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
914        self.0.bits(bits);
915        self
916    }
917}
918#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
919pub struct CTRL_SPEC;
920impl crate::RegisterSpec for CTRL_SPEC {
921    type Ux = u32;
922}
923#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
924impl crate::Readable for CTRL_SPEC {
925    type Reader = R;
926}
927#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
928impl crate::Writable for CTRL_SPEC {
929    type Writer = W;
930    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
931    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
932}
933#[doc = "`reset()` method sets CTRL to value 0"]
934impl crate::Resettable for CTRL_SPEC {
935    const RESET_VALUE: Self::Ux = 0;
936}
efm32tg11b_pac/efm32tg11b540/pcnt0/ctrl.rs

efm32tg11b_pac/efm32tg11b540/pcnt0/
ctrl.rs
