efm32tg11b_pac/efm32tg11b540/msc/
startup.rs

1#[doc = "Register `STARTUP` reader"]
2pub struct R(crate::R<STARTUP_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<STARTUP_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<STARTUP_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<STARTUP_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `STARTUP` writer"]
17pub struct W(crate::W<STARTUP_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<STARTUP_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<STARTUP_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<STARTUP_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `STDLY0` reader - Startup Delay 0"]
38pub type STDLY0_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `STDLY0` writer - Startup Delay 0"]
40pub type STDLY0_W<'a, const O: u8> = crate::FieldWriter<'a, u32, STARTUP_SPEC, u16, u16, 10, O>;
41#[doc = "Field `STDLY1` reader - Startup Delay 0"]
42pub type STDLY1_R = crate::FieldReader<u16, u16>;
43#[doc = "Field `STDLY1` writer - Startup Delay 0"]
44pub type STDLY1_W<'a, const O: u8> = crate::FieldWriter<'a, u32, STARTUP_SPEC, u16, u16, 10, O>;
45#[doc = "Field `ASTWAIT` reader - Active Startup Wait"]
46pub type ASTWAIT_R = crate::BitReader<bool>;
47#[doc = "Field `ASTWAIT` writer - Active Startup Wait"]
48pub type ASTWAIT_W<'a, const O: u8> = crate::BitWriter<'a, u32, STARTUP_SPEC, bool, O>;
49#[doc = "Field `STWSEN` reader - Startup Waitstates Enable"]
50pub type STWSEN_R = crate::BitReader<bool>;
51#[doc = "Field `STWSEN` writer - Startup Waitstates Enable"]
52pub type STWSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, STARTUP_SPEC, bool, O>;
53#[doc = "Field `STWSAEN` reader - Startup Waitstates Always Enable"]
54pub type STWSAEN_R = crate::BitReader<bool>;
55#[doc = "Field `STWSAEN` writer - Startup Waitstates Always Enable"]
56pub type STWSAEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, STARTUP_SPEC, bool, O>;
57#[doc = "Field `STWS` reader - Startup Waitstates"]
58pub type STWS_R = crate::FieldReader<u8, u8>;
59#[doc = "Field `STWS` writer - Startup Waitstates"]
60pub type STWS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, STARTUP_SPEC, u8, u8, 3, O>;
61impl R {
62    #[doc = "Bits 0:9 - Startup Delay 0"]
63    #[inline(always)]
64    pub fn stdly0(&self) -> STDLY0_R {
65        STDLY0_R::new((self.bits & 0x03ff) as u16)
66    }
67    #[doc = "Bits 12:21 - Startup Delay 0"]
68    #[inline(always)]
69    pub fn stdly1(&self) -> STDLY1_R {
70        STDLY1_R::new(((self.bits >> 12) & 0x03ff) as u16)
71    }
72    #[doc = "Bit 24 - Active Startup Wait"]
73    #[inline(always)]
74    pub fn astwait(&self) -> ASTWAIT_R {
75        ASTWAIT_R::new(((self.bits >> 24) & 1) != 0)
76    }
77    #[doc = "Bit 25 - Startup Waitstates Enable"]
78    #[inline(always)]
79    pub fn stwsen(&self) -> STWSEN_R {
80        STWSEN_R::new(((self.bits >> 25) & 1) != 0)
81    }
82    #[doc = "Bit 26 - Startup Waitstates Always Enable"]
83    #[inline(always)]
84    pub fn stwsaen(&self) -> STWSAEN_R {
85        STWSAEN_R::new(((self.bits >> 26) & 1) != 0)
86    }
87    #[doc = "Bits 28:30 - Startup Waitstates"]
88    #[inline(always)]
89    pub fn stws(&self) -> STWS_R {
90        STWS_R::new(((self.bits >> 28) & 7) as u8)
91    }
92}
93impl W {
94    #[doc = "Bits 0:9 - Startup Delay 0"]
95    #[inline(always)]
96    #[must_use]
97    pub fn stdly0(&mut self) -> STDLY0_W<0> {
98        STDLY0_W::new(self)
99    }
100    #[doc = "Bits 12:21 - Startup Delay 0"]
101    #[inline(always)]
102    #[must_use]
103    pub fn stdly1(&mut self) -> STDLY1_W<12> {
104        STDLY1_W::new(self)
105    }
106    #[doc = "Bit 24 - Active Startup Wait"]
107    #[inline(always)]
108    #[must_use]
109    pub fn astwait(&mut self) -> ASTWAIT_W<24> {
110        ASTWAIT_W::new(self)
111    }
112    #[doc = "Bit 25 - Startup Waitstates Enable"]
113    #[inline(always)]
114    #[must_use]
115    pub fn stwsen(&mut self) -> STWSEN_W<25> {
116        STWSEN_W::new(self)
117    }
118    #[doc = "Bit 26 - Startup Waitstates Always Enable"]
119    #[inline(always)]
120    #[must_use]
121    pub fn stwsaen(&mut self) -> STWSAEN_W<26> {
122        STWSAEN_W::new(self)
123    }
124    #[doc = "Bits 28:30 - Startup Waitstates"]
125    #[inline(always)]
126    #[must_use]
127    pub fn stws(&mut self) -> STWS_W<28> {
128        STWS_W::new(self)
129    }
130    #[doc = "Writes raw bits to the register."]
131    #[inline(always)]
132    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
133        self.0.bits(bits);
134        self
135    }
136}
137#[doc = "Startup Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [startup](index.html) module"]
138pub struct STARTUP_SPEC;
139impl crate::RegisterSpec for STARTUP_SPEC {
140    type Ux = u32;
141}
142#[doc = "`read()` method returns [startup::R](R) reader structure"]
143impl crate::Readable for STARTUP_SPEC {
144    type Reader = R;
145}
146#[doc = "`write(|w| ..)` method takes [startup::W](W) writer structure"]
147impl crate::Writable for STARTUP_SPEC {
148    type Writer = W;
149    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
150    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
151}
152#[doc = "`reset()` method sets STARTUP to value 0x1300_104d"]
153impl crate::Resettable for STARTUP_SPEC {
154    const RESET_VALUE: Self::Ux = 0x1300_104d;
155}
efm32tg11b_pac/efm32tg11b540/msc/startup.rs

efm32tg11b_pac/efm32tg11b540/msc/
startup.rs
