efm32tg11b_pac/efm32tg11b540/lesense/
perctrl.rs

1#[doc = "Register `PERCTRL` reader"]
2pub struct R(crate::R<PERCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PERCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PERCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PERCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PERCTRL` writer"]
17pub struct W(crate::W<PERCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PERCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PERCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PERCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DACCH0EN` reader - VDAC CH0 Enable"]
38pub type DACCH0EN_R = crate::BitReader<bool>;
39#[doc = "Field `DACCH0EN` writer - VDAC CH0 Enable"]
40pub type DACCH0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, O>;
41#[doc = "Field `DACCH1EN` reader - VDAC CH1 Enable"]
42pub type DACCH1EN_R = crate::BitReader<bool>;
43#[doc = "Field `DACCH1EN` writer - VDAC CH1 Enable"]
44pub type DACCH1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, O>;
45#[doc = "Field `DACCH0DATA` reader - VDAC CH0 Data Selection"]
46pub type DACCH0DATA_R = crate::BitReader<bool>;
47#[doc = "Field `DACCH0DATA` writer - VDAC CH0 Data Selection"]
48pub type DACCH0DATA_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, O>;
49#[doc = "Field `DACCH1DATA` reader - VDAC CH1 Data Selection"]
50pub type DACCH1DATA_R = crate::BitReader<bool>;
51#[doc = "Field `DACCH1DATA` writer - VDAC CH1 Data Selection"]
52pub type DACCH1DATA_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, O>;
53#[doc = "Field `DACSTARTUP` reader - VDAC Startup Configuration"]
54pub type DACSTARTUP_R = crate::BitReader<bool>;
55#[doc = "Field `DACSTARTUP` writer - VDAC Startup Configuration"]
56pub type DACSTARTUP_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, O>;
57#[doc = "Field `DACCONVTRIG` reader - VDAC Conversion Trigger Configuration"]
58pub type DACCONVTRIG_R = crate::BitReader<bool>;
59#[doc = "Field `DACCONVTRIG` writer - VDAC Conversion Trigger Configuration"]
60pub type DACCONVTRIG_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, O>;
61#[doc = "Field `ACMP0MODE` reader - ACMP0 Mode"]
62pub type ACMP0MODE_R = crate::FieldReader<u8, ACMP0MODE_A>;
63#[doc = "ACMP0 Mode\n\nValue on reset: 0"]
64#[derive(Clone, Copy, Debug, PartialEq, Eq)]
65#[repr(u8)]
66pub enum ACMP0MODE_A {
67    #[doc = "0: LESENSE does not control ACMP0"]
68    DISABLE = 0,
69    #[doc = "1: LESENSE controls the input mux (POSSEL) of ACMP0"]
70    MUX = 1,
71    #[doc = "2: LESENSE controls the input mux (POSSEL) and the threshold value (VDDLEVEL) of ACMP0"]
72    MUXTHRES = 2,
73}
74impl From<ACMP0MODE_A> for u8 {
75    #[inline(always)]
76    fn from(variant: ACMP0MODE_A) -> Self {
77        variant as _
78    }
79}
80impl ACMP0MODE_R {
81    #[doc = "Get enumerated values variant"]
82    #[inline(always)]
83    pub fn variant(&self) -> Option<ACMP0MODE_A> {
84        match self.bits {
85            0 => Some(ACMP0MODE_A::DISABLE),
86            1 => Some(ACMP0MODE_A::MUX),
87            2 => Some(ACMP0MODE_A::MUXTHRES),
88            _ => None,
89        }
90    }
91    #[doc = "Checks if the value of the field is `DISABLE`"]
92    #[inline(always)]
93    pub fn is_disable(&self) -> bool {
94        *self == ACMP0MODE_A::DISABLE
95    }
96    #[doc = "Checks if the value of the field is `MUX`"]
97    #[inline(always)]
98    pub fn is_mux(&self) -> bool {
99        *self == ACMP0MODE_A::MUX
100    }
101    #[doc = "Checks if the value of the field is `MUXTHRES`"]
102    #[inline(always)]
103    pub fn is_muxthres(&self) -> bool {
104        *self == ACMP0MODE_A::MUXTHRES
105    }
106}
107#[doc = "Field `ACMP0MODE` writer - ACMP0 Mode"]
108pub type ACMP0MODE_W<'a, const O: u8> =
109    crate::FieldWriter<'a, u32, PERCTRL_SPEC, u8, ACMP0MODE_A, 2, O>;
110impl<'a, const O: u8> ACMP0MODE_W<'a, O> {
111    #[doc = "LESENSE does not control ACMP0"]
112    #[inline(always)]
113    pub fn disable(self) -> &'a mut W {
114        self.variant(ACMP0MODE_A::DISABLE)
115    }
116    #[doc = "LESENSE controls the input mux (POSSEL) of ACMP0"]
117    #[inline(always)]
118    pub fn mux(self) -> &'a mut W {
119        self.variant(ACMP0MODE_A::MUX)
120    }
121    #[doc = "LESENSE controls the input mux (POSSEL) and the threshold value (VDDLEVEL) of ACMP0"]
122    #[inline(always)]
123    pub fn muxthres(self) -> &'a mut W {
124        self.variant(ACMP0MODE_A::MUXTHRES)
125    }
126}
127#[doc = "Field `ACMP1MODE` reader - ACMP1 Mode"]
128pub type ACMP1MODE_R = crate::FieldReader<u8, ACMP1MODE_A>;
129#[doc = "ACMP1 Mode\n\nValue on reset: 0"]
130#[derive(Clone, Copy, Debug, PartialEq, Eq)]
131#[repr(u8)]
132pub enum ACMP1MODE_A {
133    #[doc = "0: LESENSE does not control ACMP1"]
134    DISABLE = 0,
135    #[doc = "1: LESENSE controls the input mux (POSSEL) of ACMP1"]
136    MUX = 1,
137    #[doc = "2: LESENSE controls the input mux and the threshold value (VDDLEVEL) of ACMP1"]
138    MUXTHRES = 2,
139}
140impl From<ACMP1MODE_A> for u8 {
141    #[inline(always)]
142    fn from(variant: ACMP1MODE_A) -> Self {
143        variant as _
144    }
145}
146impl ACMP1MODE_R {
147    #[doc = "Get enumerated values variant"]
148    #[inline(always)]
149    pub fn variant(&self) -> Option<ACMP1MODE_A> {
150        match self.bits {
151            0 => Some(ACMP1MODE_A::DISABLE),
152            1 => Some(ACMP1MODE_A::MUX),
153            2 => Some(ACMP1MODE_A::MUXTHRES),
154            _ => None,
155        }
156    }
157    #[doc = "Checks if the value of the field is `DISABLE`"]
158    #[inline(always)]
159    pub fn is_disable(&self) -> bool {
160        *self == ACMP1MODE_A::DISABLE
161    }
162    #[doc = "Checks if the value of the field is `MUX`"]
163    #[inline(always)]
164    pub fn is_mux(&self) -> bool {
165        *self == ACMP1MODE_A::MUX
166    }
167    #[doc = "Checks if the value of the field is `MUXTHRES`"]
168    #[inline(always)]
169    pub fn is_muxthres(&self) -> bool {
170        *self == ACMP1MODE_A::MUXTHRES
171    }
172}
173#[doc = "Field `ACMP1MODE` writer - ACMP1 Mode"]
174pub type ACMP1MODE_W<'a, const O: u8> =
175    crate::FieldWriter<'a, u32, PERCTRL_SPEC, u8, ACMP1MODE_A, 2, O>;
176impl<'a, const O: u8> ACMP1MODE_W<'a, O> {
177    #[doc = "LESENSE does not control ACMP1"]
178    #[inline(always)]
179    pub fn disable(self) -> &'a mut W {
180        self.variant(ACMP1MODE_A::DISABLE)
181    }
182    #[doc = "LESENSE controls the input mux (POSSEL) of ACMP1"]
183    #[inline(always)]
184    pub fn mux(self) -> &'a mut W {
185        self.variant(ACMP1MODE_A::MUX)
186    }
187    #[doc = "LESENSE controls the input mux and the threshold value (VDDLEVEL) of ACMP1"]
188    #[inline(always)]
189    pub fn muxthres(self) -> &'a mut W {
190        self.variant(ACMP1MODE_A::MUXTHRES)
191    }
192}
193#[doc = "Field `ACMP0INV` reader - Invert Analog Comparator 0 Output"]
194pub type ACMP0INV_R = crate::BitReader<bool>;
195#[doc = "Field `ACMP0INV` writer - Invert Analog Comparator 0 Output"]
196pub type ACMP0INV_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, O>;
197#[doc = "Field `ACMP1INV` reader - Invert Analog Comparator 1 Output"]
198pub type ACMP1INV_R = crate::BitReader<bool>;
199#[doc = "Field `ACMP1INV` writer - Invert Analog Comparator 1 Output"]
200pub type ACMP1INV_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, O>;
201#[doc = "Field `ACMP0HYSTEN` reader - ACMP0 Hysteresis Enable"]
202pub type ACMP0HYSTEN_R = crate::BitReader<bool>;
203#[doc = "Field `ACMP0HYSTEN` writer - ACMP0 Hysteresis Enable"]
204pub type ACMP0HYSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, O>;
205#[doc = "Field `ACMP1HYSTEN` reader - ACMP1 Hysteresis Enable"]
206pub type ACMP1HYSTEN_R = crate::BitReader<bool>;
207#[doc = "Field `ACMP1HYSTEN` writer - ACMP1 Hysteresis Enable"]
208pub type ACMP1HYSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PERCTRL_SPEC, bool, O>;
209#[doc = "Field `WARMUPMODE` reader - ACMP and VDAC Duty Cycle Mode"]
210pub type WARMUPMODE_R = crate::FieldReader<u8, WARMUPMODE_A>;
211#[doc = "ACMP and VDAC Duty Cycle Mode\n\nValue on reset: 0"]
212#[derive(Clone, Copy, Debug, PartialEq, Eq)]
213#[repr(u8)]
214pub enum WARMUPMODE_A {
215    #[doc = "0: The analog comparators and VDAC are shut down when LESENSE is idle"]
216    NORMAL = 0,
217    #[doc = "1: The analog comparators are kept powered up when LESENSE is idle"]
218    KEEPACMPWARM = 1,
219    #[doc = "2: The VDAC is kept powered up when LESENSE is idle"]
220    KEEPDACWARM = 2,
221    #[doc = "3: The analog comparators and VDAC are kept powered up when LESENSE is idle"]
222    KEEPACMPDACWARM = 3,
223}
224impl From<WARMUPMODE_A> for u8 {
225    #[inline(always)]
226    fn from(variant: WARMUPMODE_A) -> Self {
227        variant as _
228    }
229}
230impl WARMUPMODE_R {
231    #[doc = "Get enumerated values variant"]
232    #[inline(always)]
233    pub fn variant(&self) -> WARMUPMODE_A {
234        match self.bits {
235            0 => WARMUPMODE_A::NORMAL,
236            1 => WARMUPMODE_A::KEEPACMPWARM,
237            2 => WARMUPMODE_A::KEEPDACWARM,
238            3 => WARMUPMODE_A::KEEPACMPDACWARM,
239            _ => unreachable!(),
240        }
241    }
242    #[doc = "Checks if the value of the field is `NORMAL`"]
243    #[inline(always)]
244    pub fn is_normal(&self) -> bool {
245        *self == WARMUPMODE_A::NORMAL
246    }
247    #[doc = "Checks if the value of the field is `KEEPACMPWARM`"]
248    #[inline(always)]
249    pub fn is_keepacmpwarm(&self) -> bool {
250        *self == WARMUPMODE_A::KEEPACMPWARM
251    }
252    #[doc = "Checks if the value of the field is `KEEPDACWARM`"]
253    #[inline(always)]
254    pub fn is_keepdacwarm(&self) -> bool {
255        *self == WARMUPMODE_A::KEEPDACWARM
256    }
257    #[doc = "Checks if the value of the field is `KEEPACMPDACWARM`"]
258    #[inline(always)]
259    pub fn is_keepacmpdacwarm(&self) -> bool {
260        *self == WARMUPMODE_A::KEEPACMPDACWARM
261    }
262}
263#[doc = "Field `WARMUPMODE` writer - ACMP and VDAC Duty Cycle Mode"]
264pub type WARMUPMODE_W<'a, const O: u8> =
265    crate::FieldWriterSafe<'a, u32, PERCTRL_SPEC, u8, WARMUPMODE_A, 2, O>;
266impl<'a, const O: u8> WARMUPMODE_W<'a, O> {
267    #[doc = "The analog comparators and VDAC are shut down when LESENSE is idle"]
268    #[inline(always)]
269    pub fn normal(self) -> &'a mut W {
270        self.variant(WARMUPMODE_A::NORMAL)
271    }
272    #[doc = "The analog comparators are kept powered up when LESENSE is idle"]
273    #[inline(always)]
274    pub fn keepacmpwarm(self) -> &'a mut W {
275        self.variant(WARMUPMODE_A::KEEPACMPWARM)
276    }
277    #[doc = "The VDAC is kept powered up when LESENSE is idle"]
278    #[inline(always)]
279    pub fn keepdacwarm(self) -> &'a mut W {
280        self.variant(WARMUPMODE_A::KEEPDACWARM)
281    }
282    #[doc = "The analog comparators and VDAC are kept powered up when LESENSE is idle"]
283    #[inline(always)]
284    pub fn keepacmpdacwarm(self) -> &'a mut W {
285        self.variant(WARMUPMODE_A::KEEPACMPDACWARM)
286    }
287}
288impl R {
289    #[doc = "Bit 0 - VDAC CH0 Enable"]
290    #[inline(always)]
291    pub fn dacch0en(&self) -> DACCH0EN_R {
292        DACCH0EN_R::new((self.bits & 1) != 0)
293    }
294    #[doc = "Bit 1 - VDAC CH1 Enable"]
295    #[inline(always)]
296    pub fn dacch1en(&self) -> DACCH1EN_R {
297        DACCH1EN_R::new(((self.bits >> 1) & 1) != 0)
298    }
299    #[doc = "Bit 2 - VDAC CH0 Data Selection"]
300    #[inline(always)]
301    pub fn dacch0data(&self) -> DACCH0DATA_R {
302        DACCH0DATA_R::new(((self.bits >> 2) & 1) != 0)
303    }
304    #[doc = "Bit 3 - VDAC CH1 Data Selection"]
305    #[inline(always)]
306    pub fn dacch1data(&self) -> DACCH1DATA_R {
307        DACCH1DATA_R::new(((self.bits >> 3) & 1) != 0)
308    }
309    #[doc = "Bit 6 - VDAC Startup Configuration"]
310    #[inline(always)]
311    pub fn dacstartup(&self) -> DACSTARTUP_R {
312        DACSTARTUP_R::new(((self.bits >> 6) & 1) != 0)
313    }
314    #[doc = "Bit 8 - VDAC Conversion Trigger Configuration"]
315    #[inline(always)]
316    pub fn dacconvtrig(&self) -> DACCONVTRIG_R {
317        DACCONVTRIG_R::new(((self.bits >> 8) & 1) != 0)
318    }
319    #[doc = "Bits 20:21 - ACMP0 Mode"]
320    #[inline(always)]
321    pub fn acmp0mode(&self) -> ACMP0MODE_R {
322        ACMP0MODE_R::new(((self.bits >> 20) & 3) as u8)
323    }
324    #[doc = "Bits 22:23 - ACMP1 Mode"]
325    #[inline(always)]
326    pub fn acmp1mode(&self) -> ACMP1MODE_R {
327        ACMP1MODE_R::new(((self.bits >> 22) & 3) as u8)
328    }
329    #[doc = "Bit 24 - Invert Analog Comparator 0 Output"]
330    #[inline(always)]
331    pub fn acmp0inv(&self) -> ACMP0INV_R {
332        ACMP0INV_R::new(((self.bits >> 24) & 1) != 0)
333    }
334    #[doc = "Bit 25 - Invert Analog Comparator 1 Output"]
335    #[inline(always)]
336    pub fn acmp1inv(&self) -> ACMP1INV_R {
337        ACMP1INV_R::new(((self.bits >> 25) & 1) != 0)
338    }
339    #[doc = "Bit 26 - ACMP0 Hysteresis Enable"]
340    #[inline(always)]
341    pub fn acmp0hysten(&self) -> ACMP0HYSTEN_R {
342        ACMP0HYSTEN_R::new(((self.bits >> 26) & 1) != 0)
343    }
344    #[doc = "Bit 27 - ACMP1 Hysteresis Enable"]
345    #[inline(always)]
346    pub fn acmp1hysten(&self) -> ACMP1HYSTEN_R {
347        ACMP1HYSTEN_R::new(((self.bits >> 27) & 1) != 0)
348    }
349    #[doc = "Bits 28:29 - ACMP and VDAC Duty Cycle Mode"]
350    #[inline(always)]
351    pub fn warmupmode(&self) -> WARMUPMODE_R {
352        WARMUPMODE_R::new(((self.bits >> 28) & 3) as u8)
353    }
354}
355impl W {
356    #[doc = "Bit 0 - VDAC CH0 Enable"]
357    #[inline(always)]
358    #[must_use]
359    pub fn dacch0en(&mut self) -> DACCH0EN_W<0> {
360        DACCH0EN_W::new(self)
361    }
362    #[doc = "Bit 1 - VDAC CH1 Enable"]
363    #[inline(always)]
364    #[must_use]
365    pub fn dacch1en(&mut self) -> DACCH1EN_W<1> {
366        DACCH1EN_W::new(self)
367    }
368    #[doc = "Bit 2 - VDAC CH0 Data Selection"]
369    #[inline(always)]
370    #[must_use]
371    pub fn dacch0data(&mut self) -> DACCH0DATA_W<2> {
372        DACCH0DATA_W::new(self)
373    }
374    #[doc = "Bit 3 - VDAC CH1 Data Selection"]
375    #[inline(always)]
376    #[must_use]
377    pub fn dacch1data(&mut self) -> DACCH1DATA_W<3> {
378        DACCH1DATA_W::new(self)
379    }
380    #[doc = "Bit 6 - VDAC Startup Configuration"]
381    #[inline(always)]
382    #[must_use]
383    pub fn dacstartup(&mut self) -> DACSTARTUP_W<6> {
384        DACSTARTUP_W::new(self)
385    }
386    #[doc = "Bit 8 - VDAC Conversion Trigger Configuration"]
387    #[inline(always)]
388    #[must_use]
389    pub fn dacconvtrig(&mut self) -> DACCONVTRIG_W<8> {
390        DACCONVTRIG_W::new(self)
391    }
392    #[doc = "Bits 20:21 - ACMP0 Mode"]
393    #[inline(always)]
394    #[must_use]
395    pub fn acmp0mode(&mut self) -> ACMP0MODE_W<20> {
396        ACMP0MODE_W::new(self)
397    }
398    #[doc = "Bits 22:23 - ACMP1 Mode"]
399    #[inline(always)]
400    #[must_use]
401    pub fn acmp1mode(&mut self) -> ACMP1MODE_W<22> {
402        ACMP1MODE_W::new(self)
403    }
404    #[doc = "Bit 24 - Invert Analog Comparator 0 Output"]
405    #[inline(always)]
406    #[must_use]
407    pub fn acmp0inv(&mut self) -> ACMP0INV_W<24> {
408        ACMP0INV_W::new(self)
409    }
410    #[doc = "Bit 25 - Invert Analog Comparator 1 Output"]
411    #[inline(always)]
412    #[must_use]
413    pub fn acmp1inv(&mut self) -> ACMP1INV_W<25> {
414        ACMP1INV_W::new(self)
415    }
416    #[doc = "Bit 26 - ACMP0 Hysteresis Enable"]
417    #[inline(always)]
418    #[must_use]
419    pub fn acmp0hysten(&mut self) -> ACMP0HYSTEN_W<26> {
420        ACMP0HYSTEN_W::new(self)
421    }
422    #[doc = "Bit 27 - ACMP1 Hysteresis Enable"]
423    #[inline(always)]
424    #[must_use]
425    pub fn acmp1hysten(&mut self) -> ACMP1HYSTEN_W<27> {
426        ACMP1HYSTEN_W::new(self)
427    }
428    #[doc = "Bits 28:29 - ACMP and VDAC Duty Cycle Mode"]
429    #[inline(always)]
430    #[must_use]
431    pub fn warmupmode(&mut self) -> WARMUPMODE_W<28> {
432        WARMUPMODE_W::new(self)
433    }
434    #[doc = "Writes raw bits to the register."]
435    #[inline(always)]
436    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
437        self.0.bits(bits);
438        self
439    }
440}
441#[doc = "Peripheral Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [perctrl](index.html) module"]
442pub struct PERCTRL_SPEC;
443impl crate::RegisterSpec for PERCTRL_SPEC {
444    type Ux = u32;
445}
446#[doc = "`read()` method returns [perctrl::R](R) reader structure"]
447impl crate::Readable for PERCTRL_SPEC {
448    type Reader = R;
449}
450#[doc = "`write(|w| ..)` method takes [perctrl::W](W) writer structure"]
451impl crate::Writable for PERCTRL_SPEC {
452    type Writer = W;
453    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
454    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
455}
456#[doc = "`reset()` method sets PERCTRL to value 0"]
457impl crate::Resettable for PERCTRL_SPEC {
458    const RESET_VALUE: Self::Ux = 0;
459}
efm32tg11b_pac/efm32tg11b540/lesense/perctrl.rs

efm32tg11b_pac/efm32tg11b540/lesense/
perctrl.rs
