efm32tg11b_pac/efm32tg11b540/cmu/
lfbpresc0.rs

1#[doc = "Register `LFBPRESC0` reader"]
2pub struct R(crate::R<LFBPRESC0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<LFBPRESC0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<LFBPRESC0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<LFBPRESC0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `LFBPRESC0` writer"]
17pub struct W(crate::W<LFBPRESC0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<LFBPRESC0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<LFBPRESC0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<LFBPRESC0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SYSTICK` reader - Prescaler"]
38pub type SYSTICK_R = crate::FieldReader<u8, SYSTICK_A>;
39#[doc = "Prescaler\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum SYSTICK_A {
43    #[doc = "0: LFBCLKSYSTICK = LFBCLK"]
44    DIV1 = 0,
45}
46impl From<SYSTICK_A> for u8 {
47    #[inline(always)]
48    fn from(variant: SYSTICK_A) -> Self {
49        variant as _
50    }
51}
52impl SYSTICK_R {
53    #[doc = "Get enumerated values variant"]
54    #[inline(always)]
55    pub fn variant(&self) -> Option<SYSTICK_A> {
56        match self.bits {
57            0 => Some(SYSTICK_A::DIV1),
58            _ => None,
59        }
60    }
61    #[doc = "Checks if the value of the field is `DIV1`"]
62    #[inline(always)]
63    pub fn is_div1(&self) -> bool {
64        *self == SYSTICK_A::DIV1
65    }
66}
67#[doc = "Field `LEUART0` reader - Low Energy UART 0 Prescaler"]
68pub type LEUART0_R = crate::FieldReader<u8, LEUART0_A>;
69#[doc = "Low Energy UART 0 Prescaler\n\nValue on reset: 0"]
70#[derive(Clone, Copy, Debug, PartialEq, Eq)]
71#[repr(u8)]
72pub enum LEUART0_A {
73    #[doc = "0: LFBCLKLEUART0 = LFBCLK"]
74    DIV1 = 0,
75    #[doc = "1: LFBCLKLEUART0 = LFBCLK/2"]
76    DIV2 = 1,
77    #[doc = "2: LFBCLKLEUART0 = LFBCLK/4"]
78    DIV4 = 2,
79    #[doc = "3: LFBCLKLEUART0 = LFBCLK/8"]
80    DIV8 = 3,
81}
82impl From<LEUART0_A> for u8 {
83    #[inline(always)]
84    fn from(variant: LEUART0_A) -> Self {
85        variant as _
86    }
87}
88impl LEUART0_R {
89    #[doc = "Get enumerated values variant"]
90    #[inline(always)]
91    pub fn variant(&self) -> LEUART0_A {
92        match self.bits {
93            0 => LEUART0_A::DIV1,
94            1 => LEUART0_A::DIV2,
95            2 => LEUART0_A::DIV4,
96            3 => LEUART0_A::DIV8,
97            _ => unreachable!(),
98        }
99    }
100    #[doc = "Checks if the value of the field is `DIV1`"]
101    #[inline(always)]
102    pub fn is_div1(&self) -> bool {
103        *self == LEUART0_A::DIV1
104    }
105    #[doc = "Checks if the value of the field is `DIV2`"]
106    #[inline(always)]
107    pub fn is_div2(&self) -> bool {
108        *self == LEUART0_A::DIV2
109    }
110    #[doc = "Checks if the value of the field is `DIV4`"]
111    #[inline(always)]
112    pub fn is_div4(&self) -> bool {
113        *self == LEUART0_A::DIV4
114    }
115    #[doc = "Checks if the value of the field is `DIV8`"]
116    #[inline(always)]
117    pub fn is_div8(&self) -> bool {
118        *self == LEUART0_A::DIV8
119    }
120}
121#[doc = "Field `LEUART0` writer - Low Energy UART 0 Prescaler"]
122pub type LEUART0_W<'a, const O: u8> =
123    crate::FieldWriterSafe<'a, u32, LFBPRESC0_SPEC, u8, LEUART0_A, 2, O>;
124impl<'a, const O: u8> LEUART0_W<'a, O> {
125    #[doc = "LFBCLKLEUART0 = LFBCLK"]
126    #[inline(always)]
127    pub fn div1(self) -> &'a mut W {
128        self.variant(LEUART0_A::DIV1)
129    }
130    #[doc = "LFBCLKLEUART0 = LFBCLK/2"]
131    #[inline(always)]
132    pub fn div2(self) -> &'a mut W {
133        self.variant(LEUART0_A::DIV2)
134    }
135    #[doc = "LFBCLKLEUART0 = LFBCLK/4"]
136    #[inline(always)]
137    pub fn div4(self) -> &'a mut W {
138        self.variant(LEUART0_A::DIV4)
139    }
140    #[doc = "LFBCLKLEUART0 = LFBCLK/8"]
141    #[inline(always)]
142    pub fn div8(self) -> &'a mut W {
143        self.variant(LEUART0_A::DIV8)
144    }
145}
146#[doc = "Field `CSEN` reader - Capacitive touch sense module Prescaler"]
147pub type CSEN_R = crate::FieldReader<u8, CSEN_A>;
148#[doc = "Capacitive touch sense module Prescaler\n\nValue on reset: 0"]
149#[derive(Clone, Copy, Debug, PartialEq, Eq)]
150#[repr(u8)]
151pub enum CSEN_A {
152    #[doc = "0: LFBCLKCSEN = LFBCLK/16"]
153    DIV16 = 0,
154    #[doc = "1: LFBCLKCSEN = LFBCLK/32"]
155    DIV32 = 1,
156    #[doc = "2: LFBCLKCSEN = LFBCLK/64"]
157    DIV64 = 2,
158    #[doc = "3: LFBCLKCSEN = LFBCLK/128"]
159    DIV128 = 3,
160}
161impl From<CSEN_A> for u8 {
162    #[inline(always)]
163    fn from(variant: CSEN_A) -> Self {
164        variant as _
165    }
166}
167impl CSEN_R {
168    #[doc = "Get enumerated values variant"]
169    #[inline(always)]
170    pub fn variant(&self) -> CSEN_A {
171        match self.bits {
172            0 => CSEN_A::DIV16,
173            1 => CSEN_A::DIV32,
174            2 => CSEN_A::DIV64,
175            3 => CSEN_A::DIV128,
176            _ => unreachable!(),
177        }
178    }
179    #[doc = "Checks if the value of the field is `DIV16`"]
180    #[inline(always)]
181    pub fn is_div16(&self) -> bool {
182        *self == CSEN_A::DIV16
183    }
184    #[doc = "Checks if the value of the field is `DIV32`"]
185    #[inline(always)]
186    pub fn is_div32(&self) -> bool {
187        *self == CSEN_A::DIV32
188    }
189    #[doc = "Checks if the value of the field is `DIV64`"]
190    #[inline(always)]
191    pub fn is_div64(&self) -> bool {
192        *self == CSEN_A::DIV64
193    }
194    #[doc = "Checks if the value of the field is `DIV128`"]
195    #[inline(always)]
196    pub fn is_div128(&self) -> bool {
197        *self == CSEN_A::DIV128
198    }
199}
200#[doc = "Field `CSEN` writer - Capacitive touch sense module Prescaler"]
201pub type CSEN_W<'a, const O: u8> =
202    crate::FieldWriterSafe<'a, u32, LFBPRESC0_SPEC, u8, CSEN_A, 2, O>;
203impl<'a, const O: u8> CSEN_W<'a, O> {
204    #[doc = "LFBCLKCSEN = LFBCLK/16"]
205    #[inline(always)]
206    pub fn div16(self) -> &'a mut W {
207        self.variant(CSEN_A::DIV16)
208    }
209    #[doc = "LFBCLKCSEN = LFBCLK/32"]
210    #[inline(always)]
211    pub fn div32(self) -> &'a mut W {
212        self.variant(CSEN_A::DIV32)
213    }
214    #[doc = "LFBCLKCSEN = LFBCLK/64"]
215    #[inline(always)]
216    pub fn div64(self) -> &'a mut W {
217        self.variant(CSEN_A::DIV64)
218    }
219    #[doc = "LFBCLKCSEN = LFBCLK/128"]
220    #[inline(always)]
221    pub fn div128(self) -> &'a mut W {
222        self.variant(CSEN_A::DIV128)
223    }
224}
225impl R {
226    #[doc = "Bits 0:3 - Prescaler"]
227    #[inline(always)]
228    pub fn systick(&self) -> SYSTICK_R {
229        SYSTICK_R::new((self.bits & 0x0f) as u8)
230    }
231    #[doc = "Bits 4:5 - Low Energy UART 0 Prescaler"]
232    #[inline(always)]
233    pub fn leuart0(&self) -> LEUART0_R {
234        LEUART0_R::new(((self.bits >> 4) & 3) as u8)
235    }
236    #[doc = "Bits 8:9 - Capacitive touch sense module Prescaler"]
237    #[inline(always)]
238    pub fn csen(&self) -> CSEN_R {
239        CSEN_R::new(((self.bits >> 8) & 3) as u8)
240    }
241}
242impl W {
243    #[doc = "Bits 4:5 - Low Energy UART 0 Prescaler"]
244    #[inline(always)]
245    #[must_use]
246    pub fn leuart0(&mut self) -> LEUART0_W<4> {
247        LEUART0_W::new(self)
248    }
249    #[doc = "Bits 8:9 - Capacitive touch sense module Prescaler"]
250    #[inline(always)]
251    #[must_use]
252    pub fn csen(&mut self) -> CSEN_W<8> {
253        CSEN_W::new(self)
254    }
255    #[doc = "Writes raw bits to the register."]
256    #[inline(always)]
257    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
258        self.0.bits(bits);
259        self
260    }
261}
262#[doc = "Low Frequency B Prescaler Register 0 (Async Reg)\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfbpresc0](index.html) module"]
263pub struct LFBPRESC0_SPEC;
264impl crate::RegisterSpec for LFBPRESC0_SPEC {
265    type Ux = u32;
266}
267#[doc = "`read()` method returns [lfbpresc0::R](R) reader structure"]
268impl crate::Readable for LFBPRESC0_SPEC {
269    type Reader = R;
270}
271#[doc = "`write(|w| ..)` method takes [lfbpresc0::W](W) writer structure"]
272impl crate::Writable for LFBPRESC0_SPEC {
273    type Writer = W;
274    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
275    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
276}
277#[doc = "`reset()` method sets LFBPRESC0 to value 0"]
278impl crate::Resettable for LFBPRESC0_SPEC {
279    const RESET_VALUE: Self::Ux = 0;
280}
efm32tg11b_pac/efm32tg11b540/cmu/lfbpresc0.rs

efm32tg11b_pac/efm32tg11b540/cmu/
lfbpresc0.rs
