efm32tg11b_pac/efm32tg11b540/cmu/
auxhfrcoctrl.rs

1#[doc = "Register `AUXHFRCOCTRL` reader"]
2pub struct R(crate::R<AUXHFRCOCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<AUXHFRCOCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<AUXHFRCOCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<AUXHFRCOCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `AUXHFRCOCTRL` writer"]
17pub struct W(crate::W<AUXHFRCOCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<AUXHFRCOCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<AUXHFRCOCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<AUXHFRCOCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `TUNING` reader - AUXHFRCO Tuning Value"]
38pub type TUNING_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `TUNING` writer - AUXHFRCO Tuning Value"]
40pub type TUNING_W<'a, const O: u8> = crate::FieldWriter<'a, u32, AUXHFRCOCTRL_SPEC, u8, u8, 7, O>;
41#[doc = "Field `FINETUNING` reader - AUXHFRCO Fine Tuning Value"]
42pub type FINETUNING_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `FINETUNING` writer - AUXHFRCO Fine Tuning Value"]
44pub type FINETUNING_W<'a, const O: u8> =
45    crate::FieldWriter<'a, u32, AUXHFRCOCTRL_SPEC, u8, u8, 6, O>;
46#[doc = "Field `FREQRANGE` reader - AUXHFRCO Frequency Range"]
47pub type FREQRANGE_R = crate::FieldReader<u8, u8>;
48#[doc = "Field `FREQRANGE` writer - AUXHFRCO Frequency Range"]
49pub type FREQRANGE_W<'a, const O: u8> =
50    crate::FieldWriter<'a, u32, AUXHFRCOCTRL_SPEC, u8, u8, 5, O>;
51#[doc = "Field `CMPBIAS` reader - AUXHFRCO Comparator Bias Current"]
52pub type CMPBIAS_R = crate::FieldReader<u8, u8>;
53#[doc = "Field `CMPBIAS` writer - AUXHFRCO Comparator Bias Current"]
54pub type CMPBIAS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, AUXHFRCOCTRL_SPEC, u8, u8, 3, O>;
55#[doc = "Field `LDOHP` reader - AUXHFRCO LDO High Power Mode"]
56pub type LDOHP_R = crate::BitReader<bool>;
57#[doc = "Field `LDOHP` writer - AUXHFRCO LDO High Power Mode"]
58pub type LDOHP_W<'a, const O: u8> = crate::BitWriter<'a, u32, AUXHFRCOCTRL_SPEC, bool, O>;
59#[doc = "Field `CLKDIV` reader - Locally Divide AUXHFRCO Clock Output"]
60pub type CLKDIV_R = crate::FieldReader<u8, CLKDIV_A>;
61#[doc = "Locally Divide AUXHFRCO Clock Output\n\nValue on reset: 0"]
62#[derive(Clone, Copy, Debug, PartialEq, Eq)]
63#[repr(u8)]
64pub enum CLKDIV_A {
65    #[doc = "0: Divide by 1."]
66    DIV1 = 0,
67    #[doc = "1: Divide by 2."]
68    DIV2 = 1,
69    #[doc = "2: Divide by 4."]
70    DIV4 = 2,
71}
72impl From<CLKDIV_A> for u8 {
73    #[inline(always)]
74    fn from(variant: CLKDIV_A) -> Self {
75        variant as _
76    }
77}
78impl CLKDIV_R {
79    #[doc = "Get enumerated values variant"]
80    #[inline(always)]
81    pub fn variant(&self) -> Option<CLKDIV_A> {
82        match self.bits {
83            0 => Some(CLKDIV_A::DIV1),
84            1 => Some(CLKDIV_A::DIV2),
85            2 => Some(CLKDIV_A::DIV4),
86            _ => None,
87        }
88    }
89    #[doc = "Checks if the value of the field is `DIV1`"]
90    #[inline(always)]
91    pub fn is_div1(&self) -> bool {
92        *self == CLKDIV_A::DIV1
93    }
94    #[doc = "Checks if the value of the field is `DIV2`"]
95    #[inline(always)]
96    pub fn is_div2(&self) -> bool {
97        *self == CLKDIV_A::DIV2
98    }
99    #[doc = "Checks if the value of the field is `DIV4`"]
100    #[inline(always)]
101    pub fn is_div4(&self) -> bool {
102        *self == CLKDIV_A::DIV4
103    }
104}
105#[doc = "Field `CLKDIV` writer - Locally Divide AUXHFRCO Clock Output"]
106pub type CLKDIV_W<'a, const O: u8> =
107    crate::FieldWriter<'a, u32, AUXHFRCOCTRL_SPEC, u8, CLKDIV_A, 2, O>;
108impl<'a, const O: u8> CLKDIV_W<'a, O> {
109    #[doc = "Divide by 1."]
110    #[inline(always)]
111    pub fn div1(self) -> &'a mut W {
112        self.variant(CLKDIV_A::DIV1)
113    }
114    #[doc = "Divide by 2."]
115    #[inline(always)]
116    pub fn div2(self) -> &'a mut W {
117        self.variant(CLKDIV_A::DIV2)
118    }
119    #[doc = "Divide by 4."]
120    #[inline(always)]
121    pub fn div4(self) -> &'a mut W {
122        self.variant(CLKDIV_A::DIV4)
123    }
124}
125#[doc = "Field `FINETUNINGEN` reader - Enable Reference for Fine Tuning"]
126pub type FINETUNINGEN_R = crate::BitReader<bool>;
127#[doc = "Field `FINETUNINGEN` writer - Enable Reference for Fine Tuning"]
128pub type FINETUNINGEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, AUXHFRCOCTRL_SPEC, bool, O>;
129#[doc = "Field `VREFTC` reader - AUXHFRCO Temperature Coefficient Trim on Comparator Reference"]
130pub type VREFTC_R = crate::FieldReader<u8, u8>;
131#[doc = "Field `VREFTC` writer - AUXHFRCO Temperature Coefficient Trim on Comparator Reference"]
132pub type VREFTC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, AUXHFRCOCTRL_SPEC, u8, u8, 4, O>;
133impl R {
134    #[doc = "Bits 0:6 - AUXHFRCO Tuning Value"]
135    #[inline(always)]
136    pub fn tuning(&self) -> TUNING_R {
137        TUNING_R::new((self.bits & 0x7f) as u8)
138    }
139    #[doc = "Bits 8:13 - AUXHFRCO Fine Tuning Value"]
140    #[inline(always)]
141    pub fn finetuning(&self) -> FINETUNING_R {
142        FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8)
143    }
144    #[doc = "Bits 16:20 - AUXHFRCO Frequency Range"]
145    #[inline(always)]
146    pub fn freqrange(&self) -> FREQRANGE_R {
147        FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8)
148    }
149    #[doc = "Bits 21:23 - AUXHFRCO Comparator Bias Current"]
150    #[inline(always)]
151    pub fn cmpbias(&self) -> CMPBIAS_R {
152        CMPBIAS_R::new(((self.bits >> 21) & 7) as u8)
153    }
154    #[doc = "Bit 24 - AUXHFRCO LDO High Power Mode"]
155    #[inline(always)]
156    pub fn ldohp(&self) -> LDOHP_R {
157        LDOHP_R::new(((self.bits >> 24) & 1) != 0)
158    }
159    #[doc = "Bits 25:26 - Locally Divide AUXHFRCO Clock Output"]
160    #[inline(always)]
161    pub fn clkdiv(&self) -> CLKDIV_R {
162        CLKDIV_R::new(((self.bits >> 25) & 3) as u8)
163    }
164    #[doc = "Bit 27 - Enable Reference for Fine Tuning"]
165    #[inline(always)]
166    pub fn finetuningen(&self) -> FINETUNINGEN_R {
167        FINETUNINGEN_R::new(((self.bits >> 27) & 1) != 0)
168    }
169    #[doc = "Bits 28:31 - AUXHFRCO Temperature Coefficient Trim on Comparator Reference"]
170    #[inline(always)]
171    pub fn vreftc(&self) -> VREFTC_R {
172        VREFTC_R::new(((self.bits >> 28) & 0x0f) as u8)
173    }
174}
175impl W {
176    #[doc = "Bits 0:6 - AUXHFRCO Tuning Value"]
177    #[inline(always)]
178    #[must_use]
179    pub fn tuning(&mut self) -> TUNING_W<0> {
180        TUNING_W::new(self)
181    }
182    #[doc = "Bits 8:13 - AUXHFRCO Fine Tuning Value"]
183    #[inline(always)]
184    #[must_use]
185    pub fn finetuning(&mut self) -> FINETUNING_W<8> {
186        FINETUNING_W::new(self)
187    }
188    #[doc = "Bits 16:20 - AUXHFRCO Frequency Range"]
189    #[inline(always)]
190    #[must_use]
191    pub fn freqrange(&mut self) -> FREQRANGE_W<16> {
192        FREQRANGE_W::new(self)
193    }
194    #[doc = "Bits 21:23 - AUXHFRCO Comparator Bias Current"]
195    #[inline(always)]
196    #[must_use]
197    pub fn cmpbias(&mut self) -> CMPBIAS_W<21> {
198        CMPBIAS_W::new(self)
199    }
200    #[doc = "Bit 24 - AUXHFRCO LDO High Power Mode"]
201    #[inline(always)]
202    #[must_use]
203    pub fn ldohp(&mut self) -> LDOHP_W<24> {
204        LDOHP_W::new(self)
205    }
206    #[doc = "Bits 25:26 - Locally Divide AUXHFRCO Clock Output"]
207    #[inline(always)]
208    #[must_use]
209    pub fn clkdiv(&mut self) -> CLKDIV_W<25> {
210        CLKDIV_W::new(self)
211    }
212    #[doc = "Bit 27 - Enable Reference for Fine Tuning"]
213    #[inline(always)]
214    #[must_use]
215    pub fn finetuningen(&mut self) -> FINETUNINGEN_W<27> {
216        FINETUNINGEN_W::new(self)
217    }
218    #[doc = "Bits 28:31 - AUXHFRCO Temperature Coefficient Trim on Comparator Reference"]
219    #[inline(always)]
220    #[must_use]
221    pub fn vreftc(&mut self) -> VREFTC_W<28> {
222        VREFTC_W::new(self)
223    }
224    #[doc = "Writes raw bits to the register."]
225    #[inline(always)]
226    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
227        self.0.bits(bits);
228        self
229    }
230}
231#[doc = "AUXHFRCO Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [auxhfrcoctrl](index.html) module"]
232pub struct AUXHFRCOCTRL_SPEC;
233impl crate::RegisterSpec for AUXHFRCOCTRL_SPEC {
234    type Ux = u32;
235}
236#[doc = "`read()` method returns [auxhfrcoctrl::R](R) reader structure"]
237impl crate::Readable for AUXHFRCOCTRL_SPEC {
238    type Reader = R;
239}
240#[doc = "`write(|w| ..)` method takes [auxhfrcoctrl::W](W) writer structure"]
241impl crate::Writable for AUXHFRCOCTRL_SPEC {
242    type Writer = W;
243    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
244    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
245}
246#[doc = "`reset()` method sets AUXHFRCOCTRL to value 0xb148_1f7f"]
247impl crate::Resettable for AUXHFRCOCTRL_SPEC {
248    const RESET_VALUE: Self::Ux = 0xb148_1f7f;
249}
efm32tg11b_pac/efm32tg11b540/cmu/auxhfrcoctrl.rs

efm32tg11b_pac/efm32tg11b540/cmu/
auxhfrcoctrl.rs
