efm32tg11b_pac/efm32tg11b540/adc0/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `WARMUPMODE` reader - Warm-up Mode"]
38pub type WARMUPMODE_R = crate::FieldReader<u8, WARMUPMODE_A>;
39#[doc = "Warm-up Mode\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum WARMUPMODE_A {
43    #[doc = "0: ADC is shut down after each conversion. 5us warmup time is used before each conversion."]
44    NORMAL = 0,
45    #[doc = "1: ADC is kept in standby mode between conversions. 1us warmup time is used before each conversion."]
46    KEEPINSTANDBY = 1,
47    #[doc = "2: ADC is kept in slow acquisition mode between conversions. 1us warmup time is used before each conversion."]
48    KEEPINSLOWACC = 2,
49    #[doc = "3: ADC is kept on after conversions, allowing for continuous conversion."]
50    KEEPADCWARM = 3,
51}
52impl From<WARMUPMODE_A> for u8 {
53    #[inline(always)]
54    fn from(variant: WARMUPMODE_A) -> Self {
55        variant as _
56    }
57}
58impl WARMUPMODE_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> WARMUPMODE_A {
62        match self.bits {
63            0 => WARMUPMODE_A::NORMAL,
64            1 => WARMUPMODE_A::KEEPINSTANDBY,
65            2 => WARMUPMODE_A::KEEPINSLOWACC,
66            3 => WARMUPMODE_A::KEEPADCWARM,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `NORMAL`"]
71    #[inline(always)]
72    pub fn is_normal(&self) -> bool {
73        *self == WARMUPMODE_A::NORMAL
74    }
75    #[doc = "Checks if the value of the field is `KEEPINSTANDBY`"]
76    #[inline(always)]
77    pub fn is_keepinstandby(&self) -> bool {
78        *self == WARMUPMODE_A::KEEPINSTANDBY
79    }
80    #[doc = "Checks if the value of the field is `KEEPINSLOWACC`"]
81    #[inline(always)]
82    pub fn is_keepinslowacc(&self) -> bool {
83        *self == WARMUPMODE_A::KEEPINSLOWACC
84    }
85    #[doc = "Checks if the value of the field is `KEEPADCWARM`"]
86    #[inline(always)]
87    pub fn is_keepadcwarm(&self) -> bool {
88        *self == WARMUPMODE_A::KEEPADCWARM
89    }
90}
91#[doc = "Field `WARMUPMODE` writer - Warm-up Mode"]
92pub type WARMUPMODE_W<'a, const O: u8> =
93    crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, WARMUPMODE_A, 2, O>;
94impl<'a, const O: u8> WARMUPMODE_W<'a, O> {
95    #[doc = "ADC is shut down after each conversion. 5us warmup time is used before each conversion."]
96    #[inline(always)]
97    pub fn normal(self) -> &'a mut W {
98        self.variant(WARMUPMODE_A::NORMAL)
99    }
100    #[doc = "ADC is kept in standby mode between conversions. 1us warmup time is used before each conversion."]
101    #[inline(always)]
102    pub fn keepinstandby(self) -> &'a mut W {
103        self.variant(WARMUPMODE_A::KEEPINSTANDBY)
104    }
105    #[doc = "ADC is kept in slow acquisition mode between conversions. 1us warmup time is used before each conversion."]
106    #[inline(always)]
107    pub fn keepinslowacc(self) -> &'a mut W {
108        self.variant(WARMUPMODE_A::KEEPINSLOWACC)
109    }
110    #[doc = "ADC is kept on after conversions, allowing for continuous conversion."]
111    #[inline(always)]
112    pub fn keepadcwarm(self) -> &'a mut W {
113        self.variant(WARMUPMODE_A::KEEPADCWARM)
114    }
115}
116#[doc = "Field `SINGLEDMAWU` reader - SINGLEFIFO DMA Wakeup"]
117pub type SINGLEDMAWU_R = crate::BitReader<bool>;
118#[doc = "Field `SINGLEDMAWU` writer - SINGLEFIFO DMA Wakeup"]
119pub type SINGLEDMAWU_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
120#[doc = "Field `SCANDMAWU` reader - SCANFIFO DMA Wakeup"]
121pub type SCANDMAWU_R = crate::BitReader<bool>;
122#[doc = "Field `SCANDMAWU` writer - SCANFIFO DMA Wakeup"]
123pub type SCANDMAWU_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
124#[doc = "Field `TAILGATE` reader - Conversion Tailgating"]
125pub type TAILGATE_R = crate::BitReader<bool>;
126#[doc = "Field `TAILGATE` writer - Conversion Tailgating"]
127pub type TAILGATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
128#[doc = "Field `ASYNCCLKEN` reader - Selects ASYNC CLK Enable Mode When ADCCLKMODE=1"]
129pub type ASYNCCLKEN_R = crate::BitReader<bool>;
130#[doc = "Field `ASYNCCLKEN` writer - Selects ASYNC CLK Enable Mode When ADCCLKMODE=1"]
131pub type ASYNCCLKEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
132#[doc = "Field `ADCCLKMODE` reader - ADC Clock Mode"]
133pub type ADCCLKMODE_R = crate::BitReader<bool>;
134#[doc = "Field `ADCCLKMODE` writer - ADC Clock Mode"]
135pub type ADCCLKMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
136#[doc = "Field `PRESC` reader - Prescalar Setting for ADC Sample and Conversion Clock"]
137pub type PRESC_R = crate::FieldReader<u8, PRESC_A>;
138#[doc = "Prescalar Setting for ADC Sample and Conversion Clock\n\nValue on reset: 0"]
139#[derive(Clone, Copy, Debug, PartialEq, Eq)]
140#[repr(u8)]
141pub enum PRESC_A {
142    #[doc = "0: `0`"]
143    NODIVISION = 0,
144}
145impl From<PRESC_A> for u8 {
146    #[inline(always)]
147    fn from(variant: PRESC_A) -> Self {
148        variant as _
149    }
150}
151impl PRESC_R {
152    #[doc = "Get enumerated values variant"]
153    #[inline(always)]
154    pub fn variant(&self) -> Option<PRESC_A> {
155        match self.bits {
156            0 => Some(PRESC_A::NODIVISION),
157            _ => None,
158        }
159    }
160    #[doc = "Checks if the value of the field is `NODIVISION`"]
161    #[inline(always)]
162    pub fn is_nodivision(&self) -> bool {
163        *self == PRESC_A::NODIVISION
164    }
165}
166#[doc = "Field `PRESC` writer - Prescalar Setting for ADC Sample and Conversion Clock"]
167pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, PRESC_A, 7, O>;
168impl<'a, const O: u8> PRESC_W<'a, O> {
169    #[doc = "`0`"]
170    #[inline(always)]
171    pub fn nodivision(self) -> &'a mut W {
172        self.variant(PRESC_A::NODIVISION)
173    }
174}
175#[doc = "Field `TIMEBASE` reader - 1us Time Base"]
176pub type TIMEBASE_R = crate::FieldReader<u8, u8>;
177#[doc = "Field `TIMEBASE` writer - 1us Time Base"]
178pub type TIMEBASE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 7, O>;
179#[doc = "Field `OVSRSEL` reader - Oversample Rate Select"]
180pub type OVSRSEL_R = crate::FieldReader<u8, OVSRSEL_A>;
181#[doc = "Oversample Rate Select\n\nValue on reset: 0"]
182#[derive(Clone, Copy, Debug, PartialEq, Eq)]
183#[repr(u8)]
184pub enum OVSRSEL_A {
185    #[doc = "0: 2 samples for each conversion result"]
186    X2 = 0,
187    #[doc = "1: 4 samples for each conversion result"]
188    X4 = 1,
189    #[doc = "2: 8 samples for each conversion result"]
190    X8 = 2,
191    #[doc = "3: 16 samples for each conversion result"]
192    X16 = 3,
193    #[doc = "4: 32 samples for each conversion result"]
194    X32 = 4,
195    #[doc = "5: 64 samples for each conversion result"]
196    X64 = 5,
197    #[doc = "6: 128 samples for each conversion result"]
198    X128 = 6,
199    #[doc = "7: 256 samples for each conversion result"]
200    X256 = 7,
201    #[doc = "8: 512 samples for each conversion result"]
202    X512 = 8,
203    #[doc = "9: 1024 samples for each conversion result"]
204    X1024 = 9,
205    #[doc = "10: 2048 samples for each conversion result"]
206    X2048 = 10,
207    #[doc = "11: 4096 samples for each conversion result"]
208    X4096 = 11,
209}
210impl From<OVSRSEL_A> for u8 {
211    #[inline(always)]
212    fn from(variant: OVSRSEL_A) -> Self {
213        variant as _
214    }
215}
216impl OVSRSEL_R {
217    #[doc = "Get enumerated values variant"]
218    #[inline(always)]
219    pub fn variant(&self) -> Option<OVSRSEL_A> {
220        match self.bits {
221            0 => Some(OVSRSEL_A::X2),
222            1 => Some(OVSRSEL_A::X4),
223            2 => Some(OVSRSEL_A::X8),
224            3 => Some(OVSRSEL_A::X16),
225            4 => Some(OVSRSEL_A::X32),
226            5 => Some(OVSRSEL_A::X64),
227            6 => Some(OVSRSEL_A::X128),
228            7 => Some(OVSRSEL_A::X256),
229            8 => Some(OVSRSEL_A::X512),
230            9 => Some(OVSRSEL_A::X1024),
231            10 => Some(OVSRSEL_A::X2048),
232            11 => Some(OVSRSEL_A::X4096),
233            _ => None,
234        }
235    }
236    #[doc = "Checks if the value of the field is `X2`"]
237    #[inline(always)]
238    pub fn is_x2(&self) -> bool {
239        *self == OVSRSEL_A::X2
240    }
241    #[doc = "Checks if the value of the field is `X4`"]
242    #[inline(always)]
243    pub fn is_x4(&self) -> bool {
244        *self == OVSRSEL_A::X4
245    }
246    #[doc = "Checks if the value of the field is `X8`"]
247    #[inline(always)]
248    pub fn is_x8(&self) -> bool {
249        *self == OVSRSEL_A::X8
250    }
251    #[doc = "Checks if the value of the field is `X16`"]
252    #[inline(always)]
253    pub fn is_x16(&self) -> bool {
254        *self == OVSRSEL_A::X16
255    }
256    #[doc = "Checks if the value of the field is `X32`"]
257    #[inline(always)]
258    pub fn is_x32(&self) -> bool {
259        *self == OVSRSEL_A::X32
260    }
261    #[doc = "Checks if the value of the field is `X64`"]
262    #[inline(always)]
263    pub fn is_x64(&self) -> bool {
264        *self == OVSRSEL_A::X64
265    }
266    #[doc = "Checks if the value of the field is `X128`"]
267    #[inline(always)]
268    pub fn is_x128(&self) -> bool {
269        *self == OVSRSEL_A::X128
270    }
271    #[doc = "Checks if the value of the field is `X256`"]
272    #[inline(always)]
273    pub fn is_x256(&self) -> bool {
274        *self == OVSRSEL_A::X256
275    }
276    #[doc = "Checks if the value of the field is `X512`"]
277    #[inline(always)]
278    pub fn is_x512(&self) -> bool {
279        *self == OVSRSEL_A::X512
280    }
281    #[doc = "Checks if the value of the field is `X1024`"]
282    #[inline(always)]
283    pub fn is_x1024(&self) -> bool {
284        *self == OVSRSEL_A::X1024
285    }
286    #[doc = "Checks if the value of the field is `X2048`"]
287    #[inline(always)]
288    pub fn is_x2048(&self) -> bool {
289        *self == OVSRSEL_A::X2048
290    }
291    #[doc = "Checks if the value of the field is `X4096`"]
292    #[inline(always)]
293    pub fn is_x4096(&self) -> bool {
294        *self == OVSRSEL_A::X4096
295    }
296}
297#[doc = "Field `OVSRSEL` writer - Oversample Rate Select"]
298pub type OVSRSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, OVSRSEL_A, 4, O>;
299impl<'a, const O: u8> OVSRSEL_W<'a, O> {
300    #[doc = "2 samples for each conversion result"]
301    #[inline(always)]
302    pub fn x2(self) -> &'a mut W {
303        self.variant(OVSRSEL_A::X2)
304    }
305    #[doc = "4 samples for each conversion result"]
306    #[inline(always)]
307    pub fn x4(self) -> &'a mut W {
308        self.variant(OVSRSEL_A::X4)
309    }
310    #[doc = "8 samples for each conversion result"]
311    #[inline(always)]
312    pub fn x8(self) -> &'a mut W {
313        self.variant(OVSRSEL_A::X8)
314    }
315    #[doc = "16 samples for each conversion result"]
316    #[inline(always)]
317    pub fn x16(self) -> &'a mut W {
318        self.variant(OVSRSEL_A::X16)
319    }
320    #[doc = "32 samples for each conversion result"]
321    #[inline(always)]
322    pub fn x32(self) -> &'a mut W {
323        self.variant(OVSRSEL_A::X32)
324    }
325    #[doc = "64 samples for each conversion result"]
326    #[inline(always)]
327    pub fn x64(self) -> &'a mut W {
328        self.variant(OVSRSEL_A::X64)
329    }
330    #[doc = "128 samples for each conversion result"]
331    #[inline(always)]
332    pub fn x128(self) -> &'a mut W {
333        self.variant(OVSRSEL_A::X128)
334    }
335    #[doc = "256 samples for each conversion result"]
336    #[inline(always)]
337    pub fn x256(self) -> &'a mut W {
338        self.variant(OVSRSEL_A::X256)
339    }
340    #[doc = "512 samples for each conversion result"]
341    #[inline(always)]
342    pub fn x512(self) -> &'a mut W {
343        self.variant(OVSRSEL_A::X512)
344    }
345    #[doc = "1024 samples for each conversion result"]
346    #[inline(always)]
347    pub fn x1024(self) -> &'a mut W {
348        self.variant(OVSRSEL_A::X1024)
349    }
350    #[doc = "2048 samples for each conversion result"]
351    #[inline(always)]
352    pub fn x2048(self) -> &'a mut W {
353        self.variant(OVSRSEL_A::X2048)
354    }
355    #[doc = "4096 samples for each conversion result"]
356    #[inline(always)]
357    pub fn x4096(self) -> &'a mut W {
358        self.variant(OVSRSEL_A::X4096)
359    }
360}
361#[doc = "Field `DBGHALT` reader - Debug Mode Halt Enable"]
362pub type DBGHALT_R = crate::BitReader<bool>;
363#[doc = "Field `DBGHALT` writer - Debug Mode Halt Enable"]
364pub type DBGHALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
365#[doc = "Field `CHCONMODE` reader - Channel Connect"]
366pub type CHCONMODE_R = crate::BitReader<bool>;
367#[doc = "Field `CHCONMODE` writer - Channel Connect"]
368pub type CHCONMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
369#[doc = "Field `CHCONREFWARMIDLE` reader - Channel Connect and Reference Warm Sel When ADC is IDLE"]
370pub type CHCONREFWARMIDLE_R = crate::FieldReader<u8, CHCONREFWARMIDLE_A>;
371#[doc = "Channel Connect and Reference Warm Sel When ADC is IDLE\n\nValue on reset: 0"]
372#[derive(Clone, Copy, Debug, PartialEq, Eq)]
373#[repr(u8)]
374pub enum CHCONREFWARMIDLE_A {
375    #[doc = "0: Keep scan reference warm and APORT switches for first scan channel closed if WARMUPMODE is not NORMAL"]
376    PREFSCAN = 0,
377    #[doc = "1: Keep single reference warm and keep APORT switches for single channel closed if WARMUPMODE is not NORMAL"]
378    PREFSINGLE = 1,
379    #[doc = "2: Keep last used reference warm and keep APORT switches for corresponding channel closed if WARMUPMODE is not NORMAL"]
380    KEEPPREV = 2,
381}
382impl From<CHCONREFWARMIDLE_A> for u8 {
383    #[inline(always)]
384    fn from(variant: CHCONREFWARMIDLE_A) -> Self {
385        variant as _
386    }
387}
388impl CHCONREFWARMIDLE_R {
389    #[doc = "Get enumerated values variant"]
390    #[inline(always)]
391    pub fn variant(&self) -> Option<CHCONREFWARMIDLE_A> {
392        match self.bits {
393            0 => Some(CHCONREFWARMIDLE_A::PREFSCAN),
394            1 => Some(CHCONREFWARMIDLE_A::PREFSINGLE),
395            2 => Some(CHCONREFWARMIDLE_A::KEEPPREV),
396            _ => None,
397        }
398    }
399    #[doc = "Checks if the value of the field is `PREFSCAN`"]
400    #[inline(always)]
401    pub fn is_prefscan(&self) -> bool {
402        *self == CHCONREFWARMIDLE_A::PREFSCAN
403    }
404    #[doc = "Checks if the value of the field is `PREFSINGLE`"]
405    #[inline(always)]
406    pub fn is_prefsingle(&self) -> bool {
407        *self == CHCONREFWARMIDLE_A::PREFSINGLE
408    }
409    #[doc = "Checks if the value of the field is `KEEPPREV`"]
410    #[inline(always)]
411    pub fn is_keepprev(&self) -> bool {
412        *self == CHCONREFWARMIDLE_A::KEEPPREV
413    }
414}
415#[doc = "Field `CHCONREFWARMIDLE` writer - Channel Connect and Reference Warm Sel When ADC is IDLE"]
416pub type CHCONREFWARMIDLE_W<'a, const O: u8> =
417    crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CHCONREFWARMIDLE_A, 2, O>;
418impl<'a, const O: u8> CHCONREFWARMIDLE_W<'a, O> {
419    #[doc = "Keep scan reference warm and APORT switches for first scan channel closed if WARMUPMODE is not NORMAL"]
420    #[inline(always)]
421    pub fn prefscan(self) -> &'a mut W {
422        self.variant(CHCONREFWARMIDLE_A::PREFSCAN)
423    }
424    #[doc = "Keep single reference warm and keep APORT switches for single channel closed if WARMUPMODE is not NORMAL"]
425    #[inline(always)]
426    pub fn prefsingle(self) -> &'a mut W {
427        self.variant(CHCONREFWARMIDLE_A::PREFSINGLE)
428    }
429    #[doc = "Keep last used reference warm and keep APORT switches for corresponding channel closed if WARMUPMODE is not NORMAL"]
430    #[inline(always)]
431    pub fn keepprev(self) -> &'a mut W {
432        self.variant(CHCONREFWARMIDLE_A::KEEPPREV)
433    }
434}
435impl R {
436    #[doc = "Bits 0:1 - Warm-up Mode"]
437    #[inline(always)]
438    pub fn warmupmode(&self) -> WARMUPMODE_R {
439        WARMUPMODE_R::new((self.bits & 3) as u8)
440    }
441    #[doc = "Bit 2 - SINGLEFIFO DMA Wakeup"]
442    #[inline(always)]
443    pub fn singledmawu(&self) -> SINGLEDMAWU_R {
444        SINGLEDMAWU_R::new(((self.bits >> 2) & 1) != 0)
445    }
446    #[doc = "Bit 3 - SCANFIFO DMA Wakeup"]
447    #[inline(always)]
448    pub fn scandmawu(&self) -> SCANDMAWU_R {
449        SCANDMAWU_R::new(((self.bits >> 3) & 1) != 0)
450    }
451    #[doc = "Bit 4 - Conversion Tailgating"]
452    #[inline(always)]
453    pub fn tailgate(&self) -> TAILGATE_R {
454        TAILGATE_R::new(((self.bits >> 4) & 1) != 0)
455    }
456    #[doc = "Bit 6 - Selects ASYNC CLK Enable Mode When ADCCLKMODE=1"]
457    #[inline(always)]
458    pub fn asyncclken(&self) -> ASYNCCLKEN_R {
459        ASYNCCLKEN_R::new(((self.bits >> 6) & 1) != 0)
460    }
461    #[doc = "Bit 7 - ADC Clock Mode"]
462    #[inline(always)]
463    pub fn adcclkmode(&self) -> ADCCLKMODE_R {
464        ADCCLKMODE_R::new(((self.bits >> 7) & 1) != 0)
465    }
466    #[doc = "Bits 8:14 - Prescalar Setting for ADC Sample and Conversion Clock"]
467    #[inline(always)]
468    pub fn presc(&self) -> PRESC_R {
469        PRESC_R::new(((self.bits >> 8) & 0x7f) as u8)
470    }
471    #[doc = "Bits 16:22 - 1us Time Base"]
472    #[inline(always)]
473    pub fn timebase(&self) -> TIMEBASE_R {
474        TIMEBASE_R::new(((self.bits >> 16) & 0x7f) as u8)
475    }
476    #[doc = "Bits 24:27 - Oversample Rate Select"]
477    #[inline(always)]
478    pub fn ovsrsel(&self) -> OVSRSEL_R {
479        OVSRSEL_R::new(((self.bits >> 24) & 0x0f) as u8)
480    }
481    #[doc = "Bit 28 - Debug Mode Halt Enable"]
482    #[inline(always)]
483    pub fn dbghalt(&self) -> DBGHALT_R {
484        DBGHALT_R::new(((self.bits >> 28) & 1) != 0)
485    }
486    #[doc = "Bit 29 - Channel Connect"]
487    #[inline(always)]
488    pub fn chconmode(&self) -> CHCONMODE_R {
489        CHCONMODE_R::new(((self.bits >> 29) & 1) != 0)
490    }
491    #[doc = "Bits 30:31 - Channel Connect and Reference Warm Sel When ADC is IDLE"]
492    #[inline(always)]
493    pub fn chconrefwarmidle(&self) -> CHCONREFWARMIDLE_R {
494        CHCONREFWARMIDLE_R::new(((self.bits >> 30) & 3) as u8)
495    }
496}
497impl W {
498    #[doc = "Bits 0:1 - Warm-up Mode"]
499    #[inline(always)]
500    #[must_use]
501    pub fn warmupmode(&mut self) -> WARMUPMODE_W<0> {
502        WARMUPMODE_W::new(self)
503    }
504    #[doc = "Bit 2 - SINGLEFIFO DMA Wakeup"]
505    #[inline(always)]
506    #[must_use]
507    pub fn singledmawu(&mut self) -> SINGLEDMAWU_W<2> {
508        SINGLEDMAWU_W::new(self)
509    }
510    #[doc = "Bit 3 - SCANFIFO DMA Wakeup"]
511    #[inline(always)]
512    #[must_use]
513    pub fn scandmawu(&mut self) -> SCANDMAWU_W<3> {
514        SCANDMAWU_W::new(self)
515    }
516    #[doc = "Bit 4 - Conversion Tailgating"]
517    #[inline(always)]
518    #[must_use]
519    pub fn tailgate(&mut self) -> TAILGATE_W<4> {
520        TAILGATE_W::new(self)
521    }
522    #[doc = "Bit 6 - Selects ASYNC CLK Enable Mode When ADCCLKMODE=1"]
523    #[inline(always)]
524    #[must_use]
525    pub fn asyncclken(&mut self) -> ASYNCCLKEN_W<6> {
526        ASYNCCLKEN_W::new(self)
527    }
528    #[doc = "Bit 7 - ADC Clock Mode"]
529    #[inline(always)]
530    #[must_use]
531    pub fn adcclkmode(&mut self) -> ADCCLKMODE_W<7> {
532        ADCCLKMODE_W::new(self)
533    }
534    #[doc = "Bits 8:14 - Prescalar Setting for ADC Sample and Conversion Clock"]
535    #[inline(always)]
536    #[must_use]
537    pub fn presc(&mut self) -> PRESC_W<8> {
538        PRESC_W::new(self)
539    }
540    #[doc = "Bits 16:22 - 1us Time Base"]
541    #[inline(always)]
542    #[must_use]
543    pub fn timebase(&mut self) -> TIMEBASE_W<16> {
544        TIMEBASE_W::new(self)
545    }
546    #[doc = "Bits 24:27 - Oversample Rate Select"]
547    #[inline(always)]
548    #[must_use]
549    pub fn ovsrsel(&mut self) -> OVSRSEL_W<24> {
550        OVSRSEL_W::new(self)
551    }
552    #[doc = "Bit 28 - Debug Mode Halt Enable"]
553    #[inline(always)]
554    #[must_use]
555    pub fn dbghalt(&mut self) -> DBGHALT_W<28> {
556        DBGHALT_W::new(self)
557    }
558    #[doc = "Bit 29 - Channel Connect"]
559    #[inline(always)]
560    #[must_use]
561    pub fn chconmode(&mut self) -> CHCONMODE_W<29> {
562        CHCONMODE_W::new(self)
563    }
564    #[doc = "Bits 30:31 - Channel Connect and Reference Warm Sel When ADC is IDLE"]
565    #[inline(always)]
566    #[must_use]
567    pub fn chconrefwarmidle(&mut self) -> CHCONREFWARMIDLE_W<30> {
568        CHCONREFWARMIDLE_W::new(self)
569    }
570    #[doc = "Writes raw bits to the register."]
571    #[inline(always)]
572    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
573        self.0.bits(bits);
574        self
575    }
576}
577#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
578pub struct CTRL_SPEC;
579impl crate::RegisterSpec for CTRL_SPEC {
580    type Ux = u32;
581}
582#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
583impl crate::Readable for CTRL_SPEC {
584    type Reader = R;
585}
586#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
587impl crate::Writable for CTRL_SPEC {
588    type Writer = W;
589    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
590    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
591}
592#[doc = "`reset()` method sets CTRL to value 0x001f_0000"]
593impl crate::Resettable for CTRL_SPEC {
594    const RESET_VALUE: Self::Ux = 0x001f_0000;
595}
efm32tg11b_pac/efm32tg11b540/adc0/ctrl.rs

efm32tg11b_pac/efm32tg11b540/adc0/
ctrl.rs
