efm32tg11b_pac/efm32tg11b120/wdog0/
pch1_prsctrl.rs

1#[doc = "Register `PCH1_PRSCTRL` reader"]
2pub struct R(crate::R<PCH1_PRSCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PCH1_PRSCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PCH1_PRSCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PCH1_PRSCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PCH1_PRSCTRL` writer"]
17pub struct W(crate::W<PCH1_PRSCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PCH1_PRSCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PCH1_PRSCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PCH1_PRSCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `PRSSEL` reader - PRS Channel PRS Select"]
38pub type PRSSEL_R = crate::FieldReader<u8, PRSSEL_A>;
39#[doc = "PRS Channel PRS Select\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum PRSSEL_A {
43    #[doc = "0: PRS Channel 0 selected as input"]
44    PRSCH0 = 0,
45    #[doc = "1: PRS Channel 1 selected as input"]
46    PRSCH1 = 1,
47    #[doc = "2: PRS Channel 2 selected as input"]
48    PRSCH2 = 2,
49    #[doc = "3: PRS Channel 3 selected as input"]
50    PRSCH3 = 3,
51    #[doc = "4: PRS Channel 4 selected as input"]
52    PRSCH4 = 4,
53    #[doc = "5: PRS Channel 5 selected as input"]
54    PRSCH5 = 5,
55    #[doc = "6: PRS Channel 6 selected as input"]
56    PRSCH6 = 6,
57    #[doc = "7: PRS Channel 7 selected as input"]
58    PRSCH7 = 7,
59}
60impl From<PRSSEL_A> for u8 {
61    #[inline(always)]
62    fn from(variant: PRSSEL_A) -> Self {
63        variant as _
64    }
65}
66impl PRSSEL_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> PRSSEL_A {
70        match self.bits {
71            0 => PRSSEL_A::PRSCH0,
72            1 => PRSSEL_A::PRSCH1,
73            2 => PRSSEL_A::PRSCH2,
74            3 => PRSSEL_A::PRSCH3,
75            4 => PRSSEL_A::PRSCH4,
76            5 => PRSSEL_A::PRSCH5,
77            6 => PRSSEL_A::PRSCH6,
78            7 => PRSSEL_A::PRSCH7,
79            _ => unreachable!(),
80        }
81    }
82    #[doc = "Checks if the value of the field is `PRSCH0`"]
83    #[inline(always)]
84    pub fn is_prsch0(&self) -> bool {
85        *self == PRSSEL_A::PRSCH0
86    }
87    #[doc = "Checks if the value of the field is `PRSCH1`"]
88    #[inline(always)]
89    pub fn is_prsch1(&self) -> bool {
90        *self == PRSSEL_A::PRSCH1
91    }
92    #[doc = "Checks if the value of the field is `PRSCH2`"]
93    #[inline(always)]
94    pub fn is_prsch2(&self) -> bool {
95        *self == PRSSEL_A::PRSCH2
96    }
97    #[doc = "Checks if the value of the field is `PRSCH3`"]
98    #[inline(always)]
99    pub fn is_prsch3(&self) -> bool {
100        *self == PRSSEL_A::PRSCH3
101    }
102    #[doc = "Checks if the value of the field is `PRSCH4`"]
103    #[inline(always)]
104    pub fn is_prsch4(&self) -> bool {
105        *self == PRSSEL_A::PRSCH4
106    }
107    #[doc = "Checks if the value of the field is `PRSCH5`"]
108    #[inline(always)]
109    pub fn is_prsch5(&self) -> bool {
110        *self == PRSSEL_A::PRSCH5
111    }
112    #[doc = "Checks if the value of the field is `PRSCH6`"]
113    #[inline(always)]
114    pub fn is_prsch6(&self) -> bool {
115        *self == PRSSEL_A::PRSCH6
116    }
117    #[doc = "Checks if the value of the field is `PRSCH7`"]
118    #[inline(always)]
119    pub fn is_prsch7(&self) -> bool {
120        *self == PRSSEL_A::PRSCH7
121    }
122}
123#[doc = "Field `PRSSEL` writer - PRS Channel PRS Select"]
124pub type PRSSEL_W<'a, const O: u8> =
125    crate::FieldWriterSafe<'a, u32, PCH1_PRSCTRL_SPEC, u8, PRSSEL_A, 3, O>;
126impl<'a, const O: u8> PRSSEL_W<'a, O> {
127    #[doc = "PRS Channel 0 selected as input"]
128    #[inline(always)]
129    pub fn prsch0(self) -> &'a mut W {
130        self.variant(PRSSEL_A::PRSCH0)
131    }
132    #[doc = "PRS Channel 1 selected as input"]
133    #[inline(always)]
134    pub fn prsch1(self) -> &'a mut W {
135        self.variant(PRSSEL_A::PRSCH1)
136    }
137    #[doc = "PRS Channel 2 selected as input"]
138    #[inline(always)]
139    pub fn prsch2(self) -> &'a mut W {
140        self.variant(PRSSEL_A::PRSCH2)
141    }
142    #[doc = "PRS Channel 3 selected as input"]
143    #[inline(always)]
144    pub fn prsch3(self) -> &'a mut W {
145        self.variant(PRSSEL_A::PRSCH3)
146    }
147    #[doc = "PRS Channel 4 selected as input"]
148    #[inline(always)]
149    pub fn prsch4(self) -> &'a mut W {
150        self.variant(PRSSEL_A::PRSCH4)
151    }
152    #[doc = "PRS Channel 5 selected as input"]
153    #[inline(always)]
154    pub fn prsch5(self) -> &'a mut W {
155        self.variant(PRSSEL_A::PRSCH5)
156    }
157    #[doc = "PRS Channel 6 selected as input"]
158    #[inline(always)]
159    pub fn prsch6(self) -> &'a mut W {
160        self.variant(PRSSEL_A::PRSCH6)
161    }
162    #[doc = "PRS Channel 7 selected as input"]
163    #[inline(always)]
164    pub fn prsch7(self) -> &'a mut W {
165        self.variant(PRSSEL_A::PRSCH7)
166    }
167}
168#[doc = "Field `PRSMISSRSTEN` reader - PRS Missing Event Will Trigger a Watchdog Reset"]
169pub type PRSMISSRSTEN_R = crate::BitReader<bool>;
170#[doc = "Field `PRSMISSRSTEN` writer - PRS Missing Event Will Trigger a Watchdog Reset"]
171pub type PRSMISSRSTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, PCH1_PRSCTRL_SPEC, bool, O>;
172impl R {
173    #[doc = "Bits 0:2 - PRS Channel PRS Select"]
174    #[inline(always)]
175    pub fn prssel(&self) -> PRSSEL_R {
176        PRSSEL_R::new((self.bits & 7) as u8)
177    }
178    #[doc = "Bit 8 - PRS Missing Event Will Trigger a Watchdog Reset"]
179    #[inline(always)]
180    pub fn prsmissrsten(&self) -> PRSMISSRSTEN_R {
181        PRSMISSRSTEN_R::new(((self.bits >> 8) & 1) != 0)
182    }
183}
184impl W {
185    #[doc = "Bits 0:2 - PRS Channel PRS Select"]
186    #[inline(always)]
187    #[must_use]
188    pub fn prssel(&mut self) -> PRSSEL_W<0> {
189        PRSSEL_W::new(self)
190    }
191    #[doc = "Bit 8 - PRS Missing Event Will Trigger a Watchdog Reset"]
192    #[inline(always)]
193    #[must_use]
194    pub fn prsmissrsten(&mut self) -> PRSMISSRSTEN_W<8> {
195        PRSMISSRSTEN_W::new(self)
196    }
197    #[doc = "Writes raw bits to the register."]
198    #[inline(always)]
199    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
200        self.0.bits(bits);
201        self
202    }
203}
204#[doc = "PRS Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [pch1_prsctrl](index.html) module"]
205pub struct PCH1_PRSCTRL_SPEC;
206impl crate::RegisterSpec for PCH1_PRSCTRL_SPEC {
207    type Ux = u32;
208}
209#[doc = "`read()` method returns [pch1_prsctrl::R](R) reader structure"]
210impl crate::Readable for PCH1_PRSCTRL_SPEC {
211    type Reader = R;
212}
213#[doc = "`write(|w| ..)` method takes [pch1_prsctrl::W](W) writer structure"]
214impl crate::Writable for PCH1_PRSCTRL_SPEC {
215    type Writer = W;
216    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
217    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
218}
219#[doc = "`reset()` method sets PCH1_PRSCTRL to value 0"]
220impl crate::Resettable for PCH1_PRSCTRL_SPEC {
221    const RESET_VALUE: Self::Ux = 0;
222}
efm32tg11b_pac/efm32tg11b120/wdog0/pch1_prsctrl.rs

efm32tg11b_pac/efm32tg11b120/wdog0/
pch1_prsctrl.rs
