efm32tg11b_pac/efm32tg11b120/vdac0/
ien.rs

1#[doc = "Register `IEN` reader"]
2pub struct R(crate::R<IEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `IEN` writer"]
17pub struct W(crate::W<IEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<IEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<IEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<IEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CH0CD` reader - CH0CD Interrupt Enable"]
38pub type CH0CD_R = crate::BitReader<bool>;
39#[doc = "Field `CH0CD` writer - CH0CD Interrupt Enable"]
40pub type CH0CD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
41#[doc = "Field `CH1CD` reader - CH1CD Interrupt Enable"]
42pub type CH1CD_R = crate::BitReader<bool>;
43#[doc = "Field `CH1CD` writer - CH1CD Interrupt Enable"]
44pub type CH1CD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
45#[doc = "Field `CH0OF` reader - CH0OF Interrupt Enable"]
46pub type CH0OF_R = crate::BitReader<bool>;
47#[doc = "Field `CH0OF` writer - CH0OF Interrupt Enable"]
48pub type CH0OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
49#[doc = "Field `CH1OF` reader - CH1OF Interrupt Enable"]
50pub type CH1OF_R = crate::BitReader<bool>;
51#[doc = "Field `CH1OF` writer - CH1OF Interrupt Enable"]
52pub type CH1OF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
53#[doc = "Field `CH0UF` reader - CH0UF Interrupt Enable"]
54pub type CH0UF_R = crate::BitReader<bool>;
55#[doc = "Field `CH0UF` writer - CH0UF Interrupt Enable"]
56pub type CH0UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
57#[doc = "Field `CH1UF` reader - CH1UF Interrupt Enable"]
58pub type CH1UF_R = crate::BitReader<bool>;
59#[doc = "Field `CH1UF` writer - CH1UF Interrupt Enable"]
60pub type CH1UF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
61#[doc = "Field `CH0BL` reader - CH0BL Interrupt Enable"]
62pub type CH0BL_R = crate::BitReader<bool>;
63#[doc = "Field `CH0BL` writer - CH0BL Interrupt Enable"]
64pub type CH0BL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
65#[doc = "Field `CH1BL` reader - CH1BL Interrupt Enable"]
66pub type CH1BL_R = crate::BitReader<bool>;
67#[doc = "Field `CH1BL` writer - CH1BL Interrupt Enable"]
68pub type CH1BL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
69#[doc = "Field `EM23ERR` reader - EM23ERR Interrupt Enable"]
70pub type EM23ERR_R = crate::BitReader<bool>;
71#[doc = "Field `EM23ERR` writer - EM23ERR Interrupt Enable"]
72pub type EM23ERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
73#[doc = "Field `OPA0APORTCONFLICT` reader - OPA0APORTCONFLICT Interrupt Enable"]
74pub type OPA0APORTCONFLICT_R = crate::BitReader<bool>;
75#[doc = "Field `OPA0APORTCONFLICT` writer - OPA0APORTCONFLICT Interrupt Enable"]
76pub type OPA0APORTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
77#[doc = "Field `OPA1APORTCONFLICT` reader - OPA1APORTCONFLICT Interrupt Enable"]
78pub type OPA1APORTCONFLICT_R = crate::BitReader<bool>;
79#[doc = "Field `OPA1APORTCONFLICT` writer - OPA1APORTCONFLICT Interrupt Enable"]
80pub type OPA1APORTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
81#[doc = "Field `OPA2APORTCONFLICT` reader - OPA2APORTCONFLICT Interrupt Enable"]
82pub type OPA2APORTCONFLICT_R = crate::BitReader<bool>;
83#[doc = "Field `OPA2APORTCONFLICT` writer - OPA2APORTCONFLICT Interrupt Enable"]
84pub type OPA2APORTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
85#[doc = "Field `OPA3APORTCONFLICT` reader - OPA3APORTCONFLICT Interrupt Enable"]
86pub type OPA3APORTCONFLICT_R = crate::BitReader<bool>;
87#[doc = "Field `OPA3APORTCONFLICT` writer - OPA3APORTCONFLICT Interrupt Enable"]
88pub type OPA3APORTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
89#[doc = "Field `OPA0PRSTIMEDERR` reader - OPA0PRSTIMEDERR Interrupt Enable"]
90pub type OPA0PRSTIMEDERR_R = crate::BitReader<bool>;
91#[doc = "Field `OPA0PRSTIMEDERR` writer - OPA0PRSTIMEDERR Interrupt Enable"]
92pub type OPA0PRSTIMEDERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
93#[doc = "Field `OPA1PRSTIMEDERR` reader - OPA1PRSTIMEDERR Interrupt Enable"]
94pub type OPA1PRSTIMEDERR_R = crate::BitReader<bool>;
95#[doc = "Field `OPA1PRSTIMEDERR` writer - OPA1PRSTIMEDERR Interrupt Enable"]
96pub type OPA1PRSTIMEDERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
97#[doc = "Field `OPA2PRSTIMEDERR` reader - OPA2PRSTIMEDERR Interrupt Enable"]
98pub type OPA2PRSTIMEDERR_R = crate::BitReader<bool>;
99#[doc = "Field `OPA2PRSTIMEDERR` writer - OPA2PRSTIMEDERR Interrupt Enable"]
100pub type OPA2PRSTIMEDERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
101#[doc = "Field `OPA3PRSTIMEDERR` reader - OPA3PRSTIMEDERR Interrupt Enable"]
102pub type OPA3PRSTIMEDERR_R = crate::BitReader<bool>;
103#[doc = "Field `OPA3PRSTIMEDERR` writer - OPA3PRSTIMEDERR Interrupt Enable"]
104pub type OPA3PRSTIMEDERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
105#[doc = "Field `OPA0OUTVALID` reader - OPA0OUTVALID Interrupt Enable"]
106pub type OPA0OUTVALID_R = crate::BitReader<bool>;
107#[doc = "Field `OPA0OUTVALID` writer - OPA0OUTVALID Interrupt Enable"]
108pub type OPA0OUTVALID_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
109#[doc = "Field `OPA1OUTVALID` reader - OPA1OUTVALID Interrupt Enable"]
110pub type OPA1OUTVALID_R = crate::BitReader<bool>;
111#[doc = "Field `OPA1OUTVALID` writer - OPA1OUTVALID Interrupt Enable"]
112pub type OPA1OUTVALID_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
113#[doc = "Field `OPA2OUTVALID` reader - OPA2OUTVALID Interrupt Enable"]
114pub type OPA2OUTVALID_R = crate::BitReader<bool>;
115#[doc = "Field `OPA2OUTVALID` writer - OPA2OUTVALID Interrupt Enable"]
116pub type OPA2OUTVALID_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
117#[doc = "Field `OPA3OUTVALID` reader - OPA3OUTVALID Interrupt Enable"]
118pub type OPA3OUTVALID_R = crate::BitReader<bool>;
119#[doc = "Field `OPA3OUTVALID` writer - OPA3OUTVALID Interrupt Enable"]
120pub type OPA3OUTVALID_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
121impl R {
122    #[doc = "Bit 0 - CH0CD Interrupt Enable"]
123    #[inline(always)]
124    pub fn ch0cd(&self) -> CH0CD_R {
125        CH0CD_R::new((self.bits & 1) != 0)
126    }
127    #[doc = "Bit 1 - CH1CD Interrupt Enable"]
128    #[inline(always)]
129    pub fn ch1cd(&self) -> CH1CD_R {
130        CH1CD_R::new(((self.bits >> 1) & 1) != 0)
131    }
132    #[doc = "Bit 2 - CH0OF Interrupt Enable"]
133    #[inline(always)]
134    pub fn ch0of(&self) -> CH0OF_R {
135        CH0OF_R::new(((self.bits >> 2) & 1) != 0)
136    }
137    #[doc = "Bit 3 - CH1OF Interrupt Enable"]
138    #[inline(always)]
139    pub fn ch1of(&self) -> CH1OF_R {
140        CH1OF_R::new(((self.bits >> 3) & 1) != 0)
141    }
142    #[doc = "Bit 4 - CH0UF Interrupt Enable"]
143    #[inline(always)]
144    pub fn ch0uf(&self) -> CH0UF_R {
145        CH0UF_R::new(((self.bits >> 4) & 1) != 0)
146    }
147    #[doc = "Bit 5 - CH1UF Interrupt Enable"]
148    #[inline(always)]
149    pub fn ch1uf(&self) -> CH1UF_R {
150        CH1UF_R::new(((self.bits >> 5) & 1) != 0)
151    }
152    #[doc = "Bit 6 - CH0BL Interrupt Enable"]
153    #[inline(always)]
154    pub fn ch0bl(&self) -> CH0BL_R {
155        CH0BL_R::new(((self.bits >> 6) & 1) != 0)
156    }
157    #[doc = "Bit 7 - CH1BL Interrupt Enable"]
158    #[inline(always)]
159    pub fn ch1bl(&self) -> CH1BL_R {
160        CH1BL_R::new(((self.bits >> 7) & 1) != 0)
161    }
162    #[doc = "Bit 15 - EM23ERR Interrupt Enable"]
163    #[inline(always)]
164    pub fn em23err(&self) -> EM23ERR_R {
165        EM23ERR_R::new(((self.bits >> 15) & 1) != 0)
166    }
167    #[doc = "Bit 16 - OPA0APORTCONFLICT Interrupt Enable"]
168    #[inline(always)]
169    pub fn opa0aportconflict(&self) -> OPA0APORTCONFLICT_R {
170        OPA0APORTCONFLICT_R::new(((self.bits >> 16) & 1) != 0)
171    }
172    #[doc = "Bit 17 - OPA1APORTCONFLICT Interrupt Enable"]
173    #[inline(always)]
174    pub fn opa1aportconflict(&self) -> OPA1APORTCONFLICT_R {
175        OPA1APORTCONFLICT_R::new(((self.bits >> 17) & 1) != 0)
176    }
177    #[doc = "Bit 18 - OPA2APORTCONFLICT Interrupt Enable"]
178    #[inline(always)]
179    pub fn opa2aportconflict(&self) -> OPA2APORTCONFLICT_R {
180        OPA2APORTCONFLICT_R::new(((self.bits >> 18) & 1) != 0)
181    }
182    #[doc = "Bit 19 - OPA3APORTCONFLICT Interrupt Enable"]
183    #[inline(always)]
184    pub fn opa3aportconflict(&self) -> OPA3APORTCONFLICT_R {
185        OPA3APORTCONFLICT_R::new(((self.bits >> 19) & 1) != 0)
186    }
187    #[doc = "Bit 20 - OPA0PRSTIMEDERR Interrupt Enable"]
188    #[inline(always)]
189    pub fn opa0prstimederr(&self) -> OPA0PRSTIMEDERR_R {
190        OPA0PRSTIMEDERR_R::new(((self.bits >> 20) & 1) != 0)
191    }
192    #[doc = "Bit 21 - OPA1PRSTIMEDERR Interrupt Enable"]
193    #[inline(always)]
194    pub fn opa1prstimederr(&self) -> OPA1PRSTIMEDERR_R {
195        OPA1PRSTIMEDERR_R::new(((self.bits >> 21) & 1) != 0)
196    }
197    #[doc = "Bit 22 - OPA2PRSTIMEDERR Interrupt Enable"]
198    #[inline(always)]
199    pub fn opa2prstimederr(&self) -> OPA2PRSTIMEDERR_R {
200        OPA2PRSTIMEDERR_R::new(((self.bits >> 22) & 1) != 0)
201    }
202    #[doc = "Bit 23 - OPA3PRSTIMEDERR Interrupt Enable"]
203    #[inline(always)]
204    pub fn opa3prstimederr(&self) -> OPA3PRSTIMEDERR_R {
205        OPA3PRSTIMEDERR_R::new(((self.bits >> 23) & 1) != 0)
206    }
207    #[doc = "Bit 28 - OPA0OUTVALID Interrupt Enable"]
208    #[inline(always)]
209    pub fn opa0outvalid(&self) -> OPA0OUTVALID_R {
210        OPA0OUTVALID_R::new(((self.bits >> 28) & 1) != 0)
211    }
212    #[doc = "Bit 29 - OPA1OUTVALID Interrupt Enable"]
213    #[inline(always)]
214    pub fn opa1outvalid(&self) -> OPA1OUTVALID_R {
215        OPA1OUTVALID_R::new(((self.bits >> 29) & 1) != 0)
216    }
217    #[doc = "Bit 30 - OPA2OUTVALID Interrupt Enable"]
218    #[inline(always)]
219    pub fn opa2outvalid(&self) -> OPA2OUTVALID_R {
220        OPA2OUTVALID_R::new(((self.bits >> 30) & 1) != 0)
221    }
222    #[doc = "Bit 31 - OPA3OUTVALID Interrupt Enable"]
223    #[inline(always)]
224    pub fn opa3outvalid(&self) -> OPA3OUTVALID_R {
225        OPA3OUTVALID_R::new(((self.bits >> 31) & 1) != 0)
226    }
227}
228impl W {
229    #[doc = "Bit 0 - CH0CD Interrupt Enable"]
230    #[inline(always)]
231    #[must_use]
232    pub fn ch0cd(&mut self) -> CH0CD_W<0> {
233        CH0CD_W::new(self)
234    }
235    #[doc = "Bit 1 - CH1CD Interrupt Enable"]
236    #[inline(always)]
237    #[must_use]
238    pub fn ch1cd(&mut self) -> CH1CD_W<1> {
239        CH1CD_W::new(self)
240    }
241    #[doc = "Bit 2 - CH0OF Interrupt Enable"]
242    #[inline(always)]
243    #[must_use]
244    pub fn ch0of(&mut self) -> CH0OF_W<2> {
245        CH0OF_W::new(self)
246    }
247    #[doc = "Bit 3 - CH1OF Interrupt Enable"]
248    #[inline(always)]
249    #[must_use]
250    pub fn ch1of(&mut self) -> CH1OF_W<3> {
251        CH1OF_W::new(self)
252    }
253    #[doc = "Bit 4 - CH0UF Interrupt Enable"]
254    #[inline(always)]
255    #[must_use]
256    pub fn ch0uf(&mut self) -> CH0UF_W<4> {
257        CH0UF_W::new(self)
258    }
259    #[doc = "Bit 5 - CH1UF Interrupt Enable"]
260    #[inline(always)]
261    #[must_use]
262    pub fn ch1uf(&mut self) -> CH1UF_W<5> {
263        CH1UF_W::new(self)
264    }
265    #[doc = "Bit 6 - CH0BL Interrupt Enable"]
266    #[inline(always)]
267    #[must_use]
268    pub fn ch0bl(&mut self) -> CH0BL_W<6> {
269        CH0BL_W::new(self)
270    }
271    #[doc = "Bit 7 - CH1BL Interrupt Enable"]
272    #[inline(always)]
273    #[must_use]
274    pub fn ch1bl(&mut self) -> CH1BL_W<7> {
275        CH1BL_W::new(self)
276    }
277    #[doc = "Bit 15 - EM23ERR Interrupt Enable"]
278    #[inline(always)]
279    #[must_use]
280    pub fn em23err(&mut self) -> EM23ERR_W<15> {
281        EM23ERR_W::new(self)
282    }
283    #[doc = "Bit 16 - OPA0APORTCONFLICT Interrupt Enable"]
284    #[inline(always)]
285    #[must_use]
286    pub fn opa0aportconflict(&mut self) -> OPA0APORTCONFLICT_W<16> {
287        OPA0APORTCONFLICT_W::new(self)
288    }
289    #[doc = "Bit 17 - OPA1APORTCONFLICT Interrupt Enable"]
290    #[inline(always)]
291    #[must_use]
292    pub fn opa1aportconflict(&mut self) -> OPA1APORTCONFLICT_W<17> {
293        OPA1APORTCONFLICT_W::new(self)
294    }
295    #[doc = "Bit 18 - OPA2APORTCONFLICT Interrupt Enable"]
296    #[inline(always)]
297    #[must_use]
298    pub fn opa2aportconflict(&mut self) -> OPA2APORTCONFLICT_W<18> {
299        OPA2APORTCONFLICT_W::new(self)
300    }
301    #[doc = "Bit 19 - OPA3APORTCONFLICT Interrupt Enable"]
302    #[inline(always)]
303    #[must_use]
304    pub fn opa3aportconflict(&mut self) -> OPA3APORTCONFLICT_W<19> {
305        OPA3APORTCONFLICT_W::new(self)
306    }
307    #[doc = "Bit 20 - OPA0PRSTIMEDERR Interrupt Enable"]
308    #[inline(always)]
309    #[must_use]
310    pub fn opa0prstimederr(&mut self) -> OPA0PRSTIMEDERR_W<20> {
311        OPA0PRSTIMEDERR_W::new(self)
312    }
313    #[doc = "Bit 21 - OPA1PRSTIMEDERR Interrupt Enable"]
314    #[inline(always)]
315    #[must_use]
316    pub fn opa1prstimederr(&mut self) -> OPA1PRSTIMEDERR_W<21> {
317        OPA1PRSTIMEDERR_W::new(self)
318    }
319    #[doc = "Bit 22 - OPA2PRSTIMEDERR Interrupt Enable"]
320    #[inline(always)]
321    #[must_use]
322    pub fn opa2prstimederr(&mut self) -> OPA2PRSTIMEDERR_W<22> {
323        OPA2PRSTIMEDERR_W::new(self)
324    }
325    #[doc = "Bit 23 - OPA3PRSTIMEDERR Interrupt Enable"]
326    #[inline(always)]
327    #[must_use]
328    pub fn opa3prstimederr(&mut self) -> OPA3PRSTIMEDERR_W<23> {
329        OPA3PRSTIMEDERR_W::new(self)
330    }
331    #[doc = "Bit 28 - OPA0OUTVALID Interrupt Enable"]
332    #[inline(always)]
333    #[must_use]
334    pub fn opa0outvalid(&mut self) -> OPA0OUTVALID_W<28> {
335        OPA0OUTVALID_W::new(self)
336    }
337    #[doc = "Bit 29 - OPA1OUTVALID Interrupt Enable"]
338    #[inline(always)]
339    #[must_use]
340    pub fn opa1outvalid(&mut self) -> OPA1OUTVALID_W<29> {
341        OPA1OUTVALID_W::new(self)
342    }
343    #[doc = "Bit 30 - OPA2OUTVALID Interrupt Enable"]
344    #[inline(always)]
345    #[must_use]
346    pub fn opa2outvalid(&mut self) -> OPA2OUTVALID_W<30> {
347        OPA2OUTVALID_W::new(self)
348    }
349    #[doc = "Bit 31 - OPA3OUTVALID Interrupt Enable"]
350    #[inline(always)]
351    #[must_use]
352    pub fn opa3outvalid(&mut self) -> OPA3OUTVALID_W<31> {
353        OPA3OUTVALID_W::new(self)
354    }
355    #[doc = "Writes raw bits to the register."]
356    #[inline(always)]
357    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
358        self.0.bits(bits);
359        self
360    }
361}
362#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
363pub struct IEN_SPEC;
364impl crate::RegisterSpec for IEN_SPEC {
365    type Ux = u32;
366}
367#[doc = "`read()` method returns [ien::R](R) reader structure"]
368impl crate::Readable for IEN_SPEC {
369    type Reader = R;
370}
371#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
372impl crate::Writable for IEN_SPEC {
373    type Writer = W;
374    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
375    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
376}
377#[doc = "`reset()` method sets IEN to value 0"]
378impl crate::Resettable for IEN_SPEC {
379    const RESET_VALUE: Self::Ux = 0;
380}
efm32tg11b_pac/efm32tg11b120/vdac0/ien.rs

efm32tg11b_pac/efm32tg11b120/vdac0/
ien.rs
