efm32tg11b_pac/efm32tg11b120/vdac0/
cmd.rs

1#[doc = "Register `CMD` writer"]
2pub struct W(crate::W<CMD_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<CMD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<CMD_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<CMD_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `CH0EN` writer - DAC Channel 0 Enable"]
23pub type CH0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
24#[doc = "Field `CH0DIS` writer - DAC Channel 0 Disable"]
25pub type CH0DIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
26#[doc = "Field `CH1EN` writer - DAC Channel 1 Enable"]
27pub type CH1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
28#[doc = "Field `CH1DIS` writer - DAC Channel 1 Disable"]
29pub type CH1DIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
30#[doc = "Field `OPA0EN` writer - OPA0 Enable"]
31pub type OPA0EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
32#[doc = "Field `OPA0DIS` writer - OPA0 Disable"]
33pub type OPA0DIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
34#[doc = "Field `OPA1EN` writer - OPA1 Enable"]
35pub type OPA1EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
36#[doc = "Field `OPA1DIS` writer - OPA1 Disable"]
37pub type OPA1DIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
38#[doc = "Field `OPA2EN` writer - OPA2 Enable"]
39pub type OPA2EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
40#[doc = "Field `OPA2DIS` writer - OPA2 Disable"]
41pub type OPA2DIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
42#[doc = "Field `OPA3EN` writer - OPA3 Enable"]
43pub type OPA3EN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
44#[doc = "Field `OPA3DIS` writer - OPA3 Disable"]
45pub type OPA3DIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
46impl W {
47    #[doc = "Bit 0 - DAC Channel 0 Enable"]
48    #[inline(always)]
49    #[must_use]
50    pub fn ch0en(&mut self) -> CH0EN_W<0> {
51        CH0EN_W::new(self)
52    }
53    #[doc = "Bit 1 - DAC Channel 0 Disable"]
54    #[inline(always)]
55    #[must_use]
56    pub fn ch0dis(&mut self) -> CH0DIS_W<1> {
57        CH0DIS_W::new(self)
58    }
59    #[doc = "Bit 2 - DAC Channel 1 Enable"]
60    #[inline(always)]
61    #[must_use]
62    pub fn ch1en(&mut self) -> CH1EN_W<2> {
63        CH1EN_W::new(self)
64    }
65    #[doc = "Bit 3 - DAC Channel 1 Disable"]
66    #[inline(always)]
67    #[must_use]
68    pub fn ch1dis(&mut self) -> CH1DIS_W<3> {
69        CH1DIS_W::new(self)
70    }
71    #[doc = "Bit 16 - OPA0 Enable"]
72    #[inline(always)]
73    #[must_use]
74    pub fn opa0en(&mut self) -> OPA0EN_W<16> {
75        OPA0EN_W::new(self)
76    }
77    #[doc = "Bit 17 - OPA0 Disable"]
78    #[inline(always)]
79    #[must_use]
80    pub fn opa0dis(&mut self) -> OPA0DIS_W<17> {
81        OPA0DIS_W::new(self)
82    }
83    #[doc = "Bit 18 - OPA1 Enable"]
84    #[inline(always)]
85    #[must_use]
86    pub fn opa1en(&mut self) -> OPA1EN_W<18> {
87        OPA1EN_W::new(self)
88    }
89    #[doc = "Bit 19 - OPA1 Disable"]
90    #[inline(always)]
91    #[must_use]
92    pub fn opa1dis(&mut self) -> OPA1DIS_W<19> {
93        OPA1DIS_W::new(self)
94    }
95    #[doc = "Bit 20 - OPA2 Enable"]
96    #[inline(always)]
97    #[must_use]
98    pub fn opa2en(&mut self) -> OPA2EN_W<20> {
99        OPA2EN_W::new(self)
100    }
101    #[doc = "Bit 21 - OPA2 Disable"]
102    #[inline(always)]
103    #[must_use]
104    pub fn opa2dis(&mut self) -> OPA2DIS_W<21> {
105        OPA2DIS_W::new(self)
106    }
107    #[doc = "Bit 22 - OPA3 Enable"]
108    #[inline(always)]
109    #[must_use]
110    pub fn opa3en(&mut self) -> OPA3EN_W<22> {
111        OPA3EN_W::new(self)
112    }
113    #[doc = "Bit 23 - OPA3 Disable"]
114    #[inline(always)]
115    #[must_use]
116    pub fn opa3dis(&mut self) -> OPA3DIS_W<23> {
117        OPA3DIS_W::new(self)
118    }
119    #[doc = "Writes raw bits to the register."]
120    #[inline(always)]
121    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
122        self.0.bits(bits);
123        self
124    }
125}
126#[doc = "Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"]
127pub struct CMD_SPEC;
128impl crate::RegisterSpec for CMD_SPEC {
129    type Ux = u32;
130}
131#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"]
132impl crate::Writable for CMD_SPEC {
133    type Writer = W;
134    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
135    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
136}
137#[doc = "`reset()` method sets CMD to value 0"]
138impl crate::Resettable for CMD_SPEC {
139    const RESET_VALUE: Self::Ux = 0;
140}
efm32tg11b_pac/efm32tg11b120/vdac0/cmd.rs

efm32tg11b_pac/efm32tg11b120/vdac0/
cmd.rs
