efm32tg11b_pac/efm32tg11b120/vdac0/
ch1ctrl.rs

1#[doc = "Register `CH1CTRL` reader"]
2pub struct R(crate::R<CH1CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CH1CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CH1CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CH1CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CH1CTRL` writer"]
17pub struct W(crate::W<CH1CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CH1CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CH1CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CH1CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `CONVMODE` reader - Conversion Mode"]
38pub type CONVMODE_R = crate::BitReader<bool>;
39#[doc = "Field `CONVMODE` writer - Conversion Mode"]
40pub type CONVMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1CTRL_SPEC, bool, O>;
41#[doc = "Field `TRIGMODE` reader - Channel 1 Trigger Mode"]
42pub type TRIGMODE_R = crate::FieldReader<u8, TRIGMODE_A>;
43#[doc = "Channel 1 Trigger Mode\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum TRIGMODE_A {
47    #[doc = "0: Channel 1 is triggered by CH1DATA or COMBDATA write"]
48    SW = 0,
49    #[doc = "1: Channel 1 is triggered by PRS input"]
50    PRS = 1,
51    #[doc = "2: Channel 1 is triggered by Refresh timer"]
52    REFRESH = 2,
53    #[doc = "3: Channel 1 is triggered by CH1DATA/COMBDATA write or PRS input"]
54    SWPRS = 3,
55    #[doc = "4: Channel 1 is triggered by CH1DATA/COMBDATA write or Refresh timer"]
56    SWREFRESH = 4,
57    #[doc = "5: Channel 1 is triggered by LESENSE"]
58    LESENSE = 5,
59}
60impl From<TRIGMODE_A> for u8 {
61    #[inline(always)]
62    fn from(variant: TRIGMODE_A) -> Self {
63        variant as _
64    }
65}
66impl TRIGMODE_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> Option<TRIGMODE_A> {
70        match self.bits {
71            0 => Some(TRIGMODE_A::SW),
72            1 => Some(TRIGMODE_A::PRS),
73            2 => Some(TRIGMODE_A::REFRESH),
74            3 => Some(TRIGMODE_A::SWPRS),
75            4 => Some(TRIGMODE_A::SWREFRESH),
76            5 => Some(TRIGMODE_A::LESENSE),
77            _ => None,
78        }
79    }
80    #[doc = "Checks if the value of the field is `SW`"]
81    #[inline(always)]
82    pub fn is_sw(&self) -> bool {
83        *self == TRIGMODE_A::SW
84    }
85    #[doc = "Checks if the value of the field is `PRS`"]
86    #[inline(always)]
87    pub fn is_prs(&self) -> bool {
88        *self == TRIGMODE_A::PRS
89    }
90    #[doc = "Checks if the value of the field is `REFRESH`"]
91    #[inline(always)]
92    pub fn is_refresh(&self) -> bool {
93        *self == TRIGMODE_A::REFRESH
94    }
95    #[doc = "Checks if the value of the field is `SWPRS`"]
96    #[inline(always)]
97    pub fn is_swprs(&self) -> bool {
98        *self == TRIGMODE_A::SWPRS
99    }
100    #[doc = "Checks if the value of the field is `SWREFRESH`"]
101    #[inline(always)]
102    pub fn is_swrefresh(&self) -> bool {
103        *self == TRIGMODE_A::SWREFRESH
104    }
105    #[doc = "Checks if the value of the field is `LESENSE`"]
106    #[inline(always)]
107    pub fn is_lesense(&self) -> bool {
108        *self == TRIGMODE_A::LESENSE
109    }
110}
111#[doc = "Field `TRIGMODE` writer - Channel 1 Trigger Mode"]
112pub type TRIGMODE_W<'a, const O: u8> =
113    crate::FieldWriter<'a, u32, CH1CTRL_SPEC, u8, TRIGMODE_A, 3, O>;
114impl<'a, const O: u8> TRIGMODE_W<'a, O> {
115    #[doc = "Channel 1 is triggered by CH1DATA or COMBDATA write"]
116    #[inline(always)]
117    pub fn sw(self) -> &'a mut W {
118        self.variant(TRIGMODE_A::SW)
119    }
120    #[doc = "Channel 1 is triggered by PRS input"]
121    #[inline(always)]
122    pub fn prs(self) -> &'a mut W {
123        self.variant(TRIGMODE_A::PRS)
124    }
125    #[doc = "Channel 1 is triggered by Refresh timer"]
126    #[inline(always)]
127    pub fn refresh(self) -> &'a mut W {
128        self.variant(TRIGMODE_A::REFRESH)
129    }
130    #[doc = "Channel 1 is triggered by CH1DATA/COMBDATA write or PRS input"]
131    #[inline(always)]
132    pub fn swprs(self) -> &'a mut W {
133        self.variant(TRIGMODE_A::SWPRS)
134    }
135    #[doc = "Channel 1 is triggered by CH1DATA/COMBDATA write or Refresh timer"]
136    #[inline(always)]
137    pub fn swrefresh(self) -> &'a mut W {
138        self.variant(TRIGMODE_A::SWREFRESH)
139    }
140    #[doc = "Channel 1 is triggered by LESENSE"]
141    #[inline(always)]
142    pub fn lesense(self) -> &'a mut W {
143        self.variant(TRIGMODE_A::LESENSE)
144    }
145}
146#[doc = "Field `PRSASYNC` reader - Channel 1 PRS Asynchronous Enable"]
147pub type PRSASYNC_R = crate::BitReader<bool>;
148#[doc = "Field `PRSASYNC` writer - Channel 1 PRS Asynchronous Enable"]
149pub type PRSASYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH1CTRL_SPEC, bool, O>;
150#[doc = "Field `PRSSEL` reader - Channel 1 PRS Trigger Select"]
151pub type PRSSEL_R = crate::FieldReader<u8, PRSSEL_A>;
152#[doc = "Channel 1 PRS Trigger Select\n\nValue on reset: 0"]
153#[derive(Clone, Copy, Debug, PartialEq, Eq)]
154#[repr(u8)]
155pub enum PRSSEL_A {
156    #[doc = "0: PRS ch 0 triggers a conversion."]
157    PRSCH0 = 0,
158    #[doc = "1: PRS ch 1 triggers a conversion."]
159    PRSCH1 = 1,
160    #[doc = "2: PRS ch 2 triggers a conversion."]
161    PRSCH2 = 2,
162    #[doc = "3: PRS ch 3 triggers a conversion."]
163    PRSCH3 = 3,
164    #[doc = "4: PRS ch 4 triggers a conversion."]
165    PRSCH4 = 4,
166    #[doc = "5: PRS ch 5 triggers a conversion."]
167    PRSCH5 = 5,
168    #[doc = "6: PRS ch 6 triggers a conversion."]
169    PRSCH6 = 6,
170    #[doc = "7: PRS ch 7 triggers a conversion."]
171    PRSCH7 = 7,
172}
173impl From<PRSSEL_A> for u8 {
174    #[inline(always)]
175    fn from(variant: PRSSEL_A) -> Self {
176        variant as _
177    }
178}
179impl PRSSEL_R {
180    #[doc = "Get enumerated values variant"]
181    #[inline(always)]
182    pub fn variant(&self) -> PRSSEL_A {
183        match self.bits {
184            0 => PRSSEL_A::PRSCH0,
185            1 => PRSSEL_A::PRSCH1,
186            2 => PRSSEL_A::PRSCH2,
187            3 => PRSSEL_A::PRSCH3,
188            4 => PRSSEL_A::PRSCH4,
189            5 => PRSSEL_A::PRSCH5,
190            6 => PRSSEL_A::PRSCH6,
191            7 => PRSSEL_A::PRSCH7,
192            _ => unreachable!(),
193        }
194    }
195    #[doc = "Checks if the value of the field is `PRSCH0`"]
196    #[inline(always)]
197    pub fn is_prsch0(&self) -> bool {
198        *self == PRSSEL_A::PRSCH0
199    }
200    #[doc = "Checks if the value of the field is `PRSCH1`"]
201    #[inline(always)]
202    pub fn is_prsch1(&self) -> bool {
203        *self == PRSSEL_A::PRSCH1
204    }
205    #[doc = "Checks if the value of the field is `PRSCH2`"]
206    #[inline(always)]
207    pub fn is_prsch2(&self) -> bool {
208        *self == PRSSEL_A::PRSCH2
209    }
210    #[doc = "Checks if the value of the field is `PRSCH3`"]
211    #[inline(always)]
212    pub fn is_prsch3(&self) -> bool {
213        *self == PRSSEL_A::PRSCH3
214    }
215    #[doc = "Checks if the value of the field is `PRSCH4`"]
216    #[inline(always)]
217    pub fn is_prsch4(&self) -> bool {
218        *self == PRSSEL_A::PRSCH4
219    }
220    #[doc = "Checks if the value of the field is `PRSCH5`"]
221    #[inline(always)]
222    pub fn is_prsch5(&self) -> bool {
223        *self == PRSSEL_A::PRSCH5
224    }
225    #[doc = "Checks if the value of the field is `PRSCH6`"]
226    #[inline(always)]
227    pub fn is_prsch6(&self) -> bool {
228        *self == PRSSEL_A::PRSCH6
229    }
230    #[doc = "Checks if the value of the field is `PRSCH7`"]
231    #[inline(always)]
232    pub fn is_prsch7(&self) -> bool {
233        *self == PRSSEL_A::PRSCH7
234    }
235}
236#[doc = "Field `PRSSEL` writer - Channel 1 PRS Trigger Select"]
237pub type PRSSEL_W<'a, const O: u8> =
238    crate::FieldWriterSafe<'a, u32, CH1CTRL_SPEC, u8, PRSSEL_A, 3, O>;
239impl<'a, const O: u8> PRSSEL_W<'a, O> {
240    #[doc = "PRS ch 0 triggers a conversion."]
241    #[inline(always)]
242    pub fn prsch0(self) -> &'a mut W {
243        self.variant(PRSSEL_A::PRSCH0)
244    }
245    #[doc = "PRS ch 1 triggers a conversion."]
246    #[inline(always)]
247    pub fn prsch1(self) -> &'a mut W {
248        self.variant(PRSSEL_A::PRSCH1)
249    }
250    #[doc = "PRS ch 2 triggers a conversion."]
251    #[inline(always)]
252    pub fn prsch2(self) -> &'a mut W {
253        self.variant(PRSSEL_A::PRSCH2)
254    }
255    #[doc = "PRS ch 3 triggers a conversion."]
256    #[inline(always)]
257    pub fn prsch3(self) -> &'a mut W {
258        self.variant(PRSSEL_A::PRSCH3)
259    }
260    #[doc = "PRS ch 4 triggers a conversion."]
261    #[inline(always)]
262    pub fn prsch4(self) -> &'a mut W {
263        self.variant(PRSSEL_A::PRSCH4)
264    }
265    #[doc = "PRS ch 5 triggers a conversion."]
266    #[inline(always)]
267    pub fn prsch5(self) -> &'a mut W {
268        self.variant(PRSSEL_A::PRSCH5)
269    }
270    #[doc = "PRS ch 6 triggers a conversion."]
271    #[inline(always)]
272    pub fn prsch6(self) -> &'a mut W {
273        self.variant(PRSSEL_A::PRSCH6)
274    }
275    #[doc = "PRS ch 7 triggers a conversion."]
276    #[inline(always)]
277    pub fn prsch7(self) -> &'a mut W {
278        self.variant(PRSSEL_A::PRSCH7)
279    }
280}
281impl R {
282    #[doc = "Bit 0 - Conversion Mode"]
283    #[inline(always)]
284    pub fn convmode(&self) -> CONVMODE_R {
285        CONVMODE_R::new((self.bits & 1) != 0)
286    }
287    #[doc = "Bits 4:6 - Channel 1 Trigger Mode"]
288    #[inline(always)]
289    pub fn trigmode(&self) -> TRIGMODE_R {
290        TRIGMODE_R::new(((self.bits >> 4) & 7) as u8)
291    }
292    #[doc = "Bit 8 - Channel 1 PRS Asynchronous Enable"]
293    #[inline(always)]
294    pub fn prsasync(&self) -> PRSASYNC_R {
295        PRSASYNC_R::new(((self.bits >> 8) & 1) != 0)
296    }
297    #[doc = "Bits 12:14 - Channel 1 PRS Trigger Select"]
298    #[inline(always)]
299    pub fn prssel(&self) -> PRSSEL_R {
300        PRSSEL_R::new(((self.bits >> 12) & 7) as u8)
301    }
302}
303impl W {
304    #[doc = "Bit 0 - Conversion Mode"]
305    #[inline(always)]
306    #[must_use]
307    pub fn convmode(&mut self) -> CONVMODE_W<0> {
308        CONVMODE_W::new(self)
309    }
310    #[doc = "Bits 4:6 - Channel 1 Trigger Mode"]
311    #[inline(always)]
312    #[must_use]
313    pub fn trigmode(&mut self) -> TRIGMODE_W<4> {
314        TRIGMODE_W::new(self)
315    }
316    #[doc = "Bit 8 - Channel 1 PRS Asynchronous Enable"]
317    #[inline(always)]
318    #[must_use]
319    pub fn prsasync(&mut self) -> PRSASYNC_W<8> {
320        PRSASYNC_W::new(self)
321    }
322    #[doc = "Bits 12:14 - Channel 1 PRS Trigger Select"]
323    #[inline(always)]
324    #[must_use]
325    pub fn prssel(&mut self) -> PRSSEL_W<12> {
326        PRSSEL_W::new(self)
327    }
328    #[doc = "Writes raw bits to the register."]
329    #[inline(always)]
330    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
331        self.0.bits(bits);
332        self
333    }
334}
335#[doc = "Channel 1 Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch1ctrl](index.html) module"]
336pub struct CH1CTRL_SPEC;
337impl crate::RegisterSpec for CH1CTRL_SPEC {
338    type Ux = u32;
339}
340#[doc = "`read()` method returns [ch1ctrl::R](R) reader structure"]
341impl crate::Readable for CH1CTRL_SPEC {
342    type Reader = R;
343}
344#[doc = "`write(|w| ..)` method takes [ch1ctrl::W](W) writer structure"]
345impl crate::Writable for CH1CTRL_SPEC {
346    type Writer = W;
347    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
348    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
349}
350#[doc = "`reset()` method sets CH1CTRL to value 0"]
351impl crate::Resettable for CH1CTRL_SPEC {
352    const RESET_VALUE: Self::Ux = 0;
353}
efm32tg11b_pac/efm32tg11b120/vdac0/ch1ctrl.rs

efm32tg11b_pac/efm32tg11b120/vdac0/
ch1ctrl.rs
