efm32tg11b_pac/efm32tg11b120/emu/
dcdclpem01cfg.rs

1#[doc = "Register `DCDCLPEM01CFG` reader"]
2pub struct R(crate::R<DCDCLPEM01CFG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DCDCLPEM01CFG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DCDCLPEM01CFG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DCDCLPEM01CFG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DCDCLPEM01CFG` writer"]
17pub struct W(crate::W<DCDCLPEM01CFG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DCDCLPEM01CFG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DCDCLPEM01CFG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DCDCLPEM01CFG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `LPCMPBIASEM01` reader - LP Mode Comparator Bias Selection for EM01"]
38pub type LPCMPBIASEM01_R = crate::FieldReader<u8, LPCMPBIASEM01_A>;
39#[doc = "LP Mode Comparator Bias Selection for EM01\n\nValue on reset: 3"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum LPCMPBIASEM01_A {
43    #[doc = "0: Maximum load current less than 75uA."]
44    BIAS0 = 0,
45    #[doc = "1: Maximum load current less than 500uA."]
46    BIAS1 = 1,
47    #[doc = "2: Maximum load current less than 2.5mA."]
48    BIAS2 = 2,
49    #[doc = "3: Maximum load current less than 10mA."]
50    BIAS3 = 3,
51}
52impl From<LPCMPBIASEM01_A> for u8 {
53    #[inline(always)]
54    fn from(variant: LPCMPBIASEM01_A) -> Self {
55        variant as _
56    }
57}
58impl LPCMPBIASEM01_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> LPCMPBIASEM01_A {
62        match self.bits {
63            0 => LPCMPBIASEM01_A::BIAS0,
64            1 => LPCMPBIASEM01_A::BIAS1,
65            2 => LPCMPBIASEM01_A::BIAS2,
66            3 => LPCMPBIASEM01_A::BIAS3,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `BIAS0`"]
71    #[inline(always)]
72    pub fn is_bias0(&self) -> bool {
73        *self == LPCMPBIASEM01_A::BIAS0
74    }
75    #[doc = "Checks if the value of the field is `BIAS1`"]
76    #[inline(always)]
77    pub fn is_bias1(&self) -> bool {
78        *self == LPCMPBIASEM01_A::BIAS1
79    }
80    #[doc = "Checks if the value of the field is `BIAS2`"]
81    #[inline(always)]
82    pub fn is_bias2(&self) -> bool {
83        *self == LPCMPBIASEM01_A::BIAS2
84    }
85    #[doc = "Checks if the value of the field is `BIAS3`"]
86    #[inline(always)]
87    pub fn is_bias3(&self) -> bool {
88        *self == LPCMPBIASEM01_A::BIAS3
89    }
90}
91#[doc = "Field `LPCMPBIASEM01` writer - LP Mode Comparator Bias Selection for EM01"]
92pub type LPCMPBIASEM01_W<'a, const O: u8> =
93    crate::FieldWriterSafe<'a, u32, DCDCLPEM01CFG_SPEC, u8, LPCMPBIASEM01_A, 2, O>;
94impl<'a, const O: u8> LPCMPBIASEM01_W<'a, O> {
95    #[doc = "Maximum load current less than 75uA."]
96    #[inline(always)]
97    pub fn bias0(self) -> &'a mut W {
98        self.variant(LPCMPBIASEM01_A::BIAS0)
99    }
100    #[doc = "Maximum load current less than 500uA."]
101    #[inline(always)]
102    pub fn bias1(self) -> &'a mut W {
103        self.variant(LPCMPBIASEM01_A::BIAS1)
104    }
105    #[doc = "Maximum load current less than 2.5mA."]
106    #[inline(always)]
107    pub fn bias2(self) -> &'a mut W {
108        self.variant(LPCMPBIASEM01_A::BIAS2)
109    }
110    #[doc = "Maximum load current less than 10mA."]
111    #[inline(always)]
112    pub fn bias3(self) -> &'a mut W {
113        self.variant(LPCMPBIASEM01_A::BIAS3)
114    }
115}
116#[doc = "Field `LPCMPHYSSELEM01` reader - LP Mode Hysteresis Selection for EM01"]
117pub type LPCMPHYSSELEM01_R = crate::FieldReader<u8, u8>;
118#[doc = "Field `LPCMPHYSSELEM01` writer - LP Mode Hysteresis Selection for EM01"]
119pub type LPCMPHYSSELEM01_W<'a, const O: u8> =
120    crate::FieldWriter<'a, u32, DCDCLPEM01CFG_SPEC, u8, u8, 4, O>;
121impl R {
122    #[doc = "Bits 8:9 - LP Mode Comparator Bias Selection for EM01"]
123    #[inline(always)]
124    pub fn lpcmpbiasem01(&self) -> LPCMPBIASEM01_R {
125        LPCMPBIASEM01_R::new(((self.bits >> 8) & 3) as u8)
126    }
127    #[doc = "Bits 12:15 - LP Mode Hysteresis Selection for EM01"]
128    #[inline(always)]
129    pub fn lpcmphysselem01(&self) -> LPCMPHYSSELEM01_R {
130        LPCMPHYSSELEM01_R::new(((self.bits >> 12) & 0x0f) as u8)
131    }
132}
133impl W {
134    #[doc = "Bits 8:9 - LP Mode Comparator Bias Selection for EM01"]
135    #[inline(always)]
136    #[must_use]
137    pub fn lpcmpbiasem01(&mut self) -> LPCMPBIASEM01_W<8> {
138        LPCMPBIASEM01_W::new(self)
139    }
140    #[doc = "Bits 12:15 - LP Mode Hysteresis Selection for EM01"]
141    #[inline(always)]
142    #[must_use]
143    pub fn lpcmphysselem01(&mut self) -> LPCMPHYSSELEM01_W<12> {
144        LPCMPHYSSELEM01_W::new(self)
145    }
146    #[doc = "Writes raw bits to the register."]
147    #[inline(always)]
148    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
149        self.0.bits(bits);
150        self
151    }
152}
153#[doc = "Configuration Bits for Low Power Mode to Be Applied During EM01, This Field is Only Relevant If LP Mode is Used in EM01\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcdclpem01cfg](index.html) module"]
154pub struct DCDCLPEM01CFG_SPEC;
155impl crate::RegisterSpec for DCDCLPEM01CFG_SPEC {
156    type Ux = u32;
157}
158#[doc = "`read()` method returns [dcdclpem01cfg::R](R) reader structure"]
159impl crate::Readable for DCDCLPEM01CFG_SPEC {
160    type Reader = R;
161}
162#[doc = "`write(|w| ..)` method takes [dcdclpem01cfg::W](W) writer structure"]
163impl crate::Writable for DCDCLPEM01CFG_SPEC {
164    type Writer = W;
165    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
166    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
167}
168#[doc = "`reset()` method sets DCDCLPEM01CFG to value 0x0300"]
169impl crate::Resettable for DCDCLPEM01CFG_SPEC {
170    const RESET_VALUE: Self::Ux = 0x0300;
171}
efm32tg11b_pac/efm32tg11b120/emu/dcdclpem01cfg.rs

efm32tg11b_pac/efm32tg11b120/emu/
dcdclpem01cfg.rs
