efm32tg11b_pac/efm32tg11b120/csen/
ifc.rs

1#[doc = "Register `IFC` writer"]
2pub struct W(crate::W<IFC_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<IFC_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<IFC_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<IFC_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `CMP` writer - Clear CMP Interrupt Flag"]
23pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
24#[doc = "Field `CONV` writer - Clear CONV Interrupt Flag"]
25pub type CONV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
26#[doc = "Field `EOS` writer - Clear EOS Interrupt Flag"]
27pub type EOS_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
28#[doc = "Field `DMAOF` writer - Clear DMAOF Interrupt Flag"]
29pub type DMAOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
30#[doc = "Field `APORTCONFLICT` writer - Clear APORTCONFLICT Interrupt Flag"]
31pub type APORTCONFLICT_W<'a, const O: u8> = crate::BitWriter<'a, u32, IFC_SPEC, bool, O>;
32impl W {
33    #[doc = "Bit 0 - Clear CMP Interrupt Flag"]
34    #[inline(always)]
35    #[must_use]
36    pub fn cmp(&mut self) -> CMP_W<0> {
37        CMP_W::new(self)
38    }
39    #[doc = "Bit 1 - Clear CONV Interrupt Flag"]
40    #[inline(always)]
41    #[must_use]
42    pub fn conv(&mut self) -> CONV_W<1> {
43        CONV_W::new(self)
44    }
45    #[doc = "Bit 2 - Clear EOS Interrupt Flag"]
46    #[inline(always)]
47    #[must_use]
48    pub fn eos(&mut self) -> EOS_W<2> {
49        EOS_W::new(self)
50    }
51    #[doc = "Bit 3 - Clear DMAOF Interrupt Flag"]
52    #[inline(always)]
53    #[must_use]
54    pub fn dmaof(&mut self) -> DMAOF_W<3> {
55        DMAOF_W::new(self)
56    }
57    #[doc = "Bit 4 - Clear APORTCONFLICT Interrupt Flag"]
58    #[inline(always)]
59    #[must_use]
60    pub fn aportconflict(&mut self) -> APORTCONFLICT_W<4> {
61        APORTCONFLICT_W::new(self)
62    }
63    #[doc = "Writes raw bits to the register."]
64    #[inline(always)]
65    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
66        self.0.bits(bits);
67        self
68    }
69}
70#[doc = "Interrupt Flag Clear\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifc](index.html) module"]
71pub struct IFC_SPEC;
72impl crate::RegisterSpec for IFC_SPEC {
73    type Ux = u32;
74}
75#[doc = "`write(|w| ..)` method takes [ifc::W](W) writer structure"]
76impl crate::Writable for IFC_SPEC {
77    type Writer = W;
78    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
79    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
80}
81#[doc = "`reset()` method sets IFC to value 0"]
82impl crate::Resettable for IFC_SPEC {
83    const RESET_VALUE: Self::Ux = 0;
84}
efm32tg11b_pac/efm32tg11b120/csen/ifc.rs

efm32tg11b_pac/efm32tg11b120/csen/
ifc.rs
