efm32tg11b_pac/efm32tg11b120/cmu/
hfrcoctrl.rs

1#[doc = "Register `HFRCOCTRL` reader"]
2pub struct R(crate::R<HFRCOCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<HFRCOCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<HFRCOCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<HFRCOCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `HFRCOCTRL` writer"]
17pub struct W(crate::W<HFRCOCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<HFRCOCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<HFRCOCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<HFRCOCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `TUNING` reader - HFRCO Tuning Value"]
38pub type TUNING_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `TUNING` writer - HFRCO Tuning Value"]
40pub type TUNING_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HFRCOCTRL_SPEC, u8, u8, 7, O>;
41#[doc = "Field `FINETUNING` reader - HFRCO Fine Tuning Value"]
42pub type FINETUNING_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `FINETUNING` writer - HFRCO Fine Tuning Value"]
44pub type FINETUNING_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HFRCOCTRL_SPEC, u8, u8, 6, O>;
45#[doc = "Field `FREQRANGE` reader - HFRCO Frequency Range"]
46pub type FREQRANGE_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `FREQRANGE` writer - HFRCO Frequency Range"]
48pub type FREQRANGE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HFRCOCTRL_SPEC, u8, u8, 5, O>;
49#[doc = "Field `CMPBIAS` reader - HFRCO Comparator Bias Current"]
50pub type CMPBIAS_R = crate::FieldReader<u8, u8>;
51#[doc = "Field `CMPBIAS` writer - HFRCO Comparator Bias Current"]
52pub type CMPBIAS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HFRCOCTRL_SPEC, u8, u8, 3, O>;
53#[doc = "Field `LDOHP` reader - HFRCO LDO High Power Mode"]
54pub type LDOHP_R = crate::BitReader<bool>;
55#[doc = "Field `LDOHP` writer - HFRCO LDO High Power Mode"]
56pub type LDOHP_W<'a, const O: u8> = crate::BitWriter<'a, u32, HFRCOCTRL_SPEC, bool, O>;
57#[doc = "Field `CLKDIV` reader - Locally Divide HFRCO Clock Output"]
58pub type CLKDIV_R = crate::FieldReader<u8, CLKDIV_A>;
59#[doc = "Locally Divide HFRCO Clock Output\n\nValue on reset: 0"]
60#[derive(Clone, Copy, Debug, PartialEq, Eq)]
61#[repr(u8)]
62pub enum CLKDIV_A {
63    #[doc = "0: Divide by 1."]
64    DIV1 = 0,
65    #[doc = "1: Divide by 2."]
66    DIV2 = 1,
67    #[doc = "2: Divide by 4."]
68    DIV4 = 2,
69}
70impl From<CLKDIV_A> for u8 {
71    #[inline(always)]
72    fn from(variant: CLKDIV_A) -> Self {
73        variant as _
74    }
75}
76impl CLKDIV_R {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub fn variant(&self) -> Option<CLKDIV_A> {
80        match self.bits {
81            0 => Some(CLKDIV_A::DIV1),
82            1 => Some(CLKDIV_A::DIV2),
83            2 => Some(CLKDIV_A::DIV4),
84            _ => None,
85        }
86    }
87    #[doc = "Checks if the value of the field is `DIV1`"]
88    #[inline(always)]
89    pub fn is_div1(&self) -> bool {
90        *self == CLKDIV_A::DIV1
91    }
92    #[doc = "Checks if the value of the field is `DIV2`"]
93    #[inline(always)]
94    pub fn is_div2(&self) -> bool {
95        *self == CLKDIV_A::DIV2
96    }
97    #[doc = "Checks if the value of the field is `DIV4`"]
98    #[inline(always)]
99    pub fn is_div4(&self) -> bool {
100        *self == CLKDIV_A::DIV4
101    }
102}
103#[doc = "Field `CLKDIV` writer - Locally Divide HFRCO Clock Output"]
104pub type CLKDIV_W<'a, const O: u8> =
105    crate::FieldWriter<'a, u32, HFRCOCTRL_SPEC, u8, CLKDIV_A, 2, O>;
106impl<'a, const O: u8> CLKDIV_W<'a, O> {
107    #[doc = "Divide by 1."]
108    #[inline(always)]
109    pub fn div1(self) -> &'a mut W {
110        self.variant(CLKDIV_A::DIV1)
111    }
112    #[doc = "Divide by 2."]
113    #[inline(always)]
114    pub fn div2(self) -> &'a mut W {
115        self.variant(CLKDIV_A::DIV2)
116    }
117    #[doc = "Divide by 4."]
118    #[inline(always)]
119    pub fn div4(self) -> &'a mut W {
120        self.variant(CLKDIV_A::DIV4)
121    }
122}
123#[doc = "Field `FINETUNINGEN` reader - Enable Reference for Fine Tuning"]
124pub type FINETUNINGEN_R = crate::BitReader<bool>;
125#[doc = "Field `FINETUNINGEN` writer - Enable Reference for Fine Tuning"]
126pub type FINETUNINGEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, HFRCOCTRL_SPEC, bool, O>;
127#[doc = "Field `VREFTC` reader - HFRCO Temperature Coefficient Trim on Comparator Reference"]
128pub type VREFTC_R = crate::FieldReader<u8, u8>;
129#[doc = "Field `VREFTC` writer - HFRCO Temperature Coefficient Trim on Comparator Reference"]
130pub type VREFTC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HFRCOCTRL_SPEC, u8, u8, 4, O>;
131impl R {
132    #[doc = "Bits 0:6 - HFRCO Tuning Value"]
133    #[inline(always)]
134    pub fn tuning(&self) -> TUNING_R {
135        TUNING_R::new((self.bits & 0x7f) as u8)
136    }
137    #[doc = "Bits 8:13 - HFRCO Fine Tuning Value"]
138    #[inline(always)]
139    pub fn finetuning(&self) -> FINETUNING_R {
140        FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8)
141    }
142    #[doc = "Bits 16:20 - HFRCO Frequency Range"]
143    #[inline(always)]
144    pub fn freqrange(&self) -> FREQRANGE_R {
145        FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8)
146    }
147    #[doc = "Bits 21:23 - HFRCO Comparator Bias Current"]
148    #[inline(always)]
149    pub fn cmpbias(&self) -> CMPBIAS_R {
150        CMPBIAS_R::new(((self.bits >> 21) & 7) as u8)
151    }
152    #[doc = "Bit 24 - HFRCO LDO High Power Mode"]
153    #[inline(always)]
154    pub fn ldohp(&self) -> LDOHP_R {
155        LDOHP_R::new(((self.bits >> 24) & 1) != 0)
156    }
157    #[doc = "Bits 25:26 - Locally Divide HFRCO Clock Output"]
158    #[inline(always)]
159    pub fn clkdiv(&self) -> CLKDIV_R {
160        CLKDIV_R::new(((self.bits >> 25) & 3) as u8)
161    }
162    #[doc = "Bit 27 - Enable Reference for Fine Tuning"]
163    #[inline(always)]
164    pub fn finetuningen(&self) -> FINETUNINGEN_R {
165        FINETUNINGEN_R::new(((self.bits >> 27) & 1) != 0)
166    }
167    #[doc = "Bits 28:31 - HFRCO Temperature Coefficient Trim on Comparator Reference"]
168    #[inline(always)]
169    pub fn vreftc(&self) -> VREFTC_R {
170        VREFTC_R::new(((self.bits >> 28) & 0x0f) as u8)
171    }
172}
173impl W {
174    #[doc = "Bits 0:6 - HFRCO Tuning Value"]
175    #[inline(always)]
176    #[must_use]
177    pub fn tuning(&mut self) -> TUNING_W<0> {
178        TUNING_W::new(self)
179    }
180    #[doc = "Bits 8:13 - HFRCO Fine Tuning Value"]
181    #[inline(always)]
182    #[must_use]
183    pub fn finetuning(&mut self) -> FINETUNING_W<8> {
184        FINETUNING_W::new(self)
185    }
186    #[doc = "Bits 16:20 - HFRCO Frequency Range"]
187    #[inline(always)]
188    #[must_use]
189    pub fn freqrange(&mut self) -> FREQRANGE_W<16> {
190        FREQRANGE_W::new(self)
191    }
192    #[doc = "Bits 21:23 - HFRCO Comparator Bias Current"]
193    #[inline(always)]
194    #[must_use]
195    pub fn cmpbias(&mut self) -> CMPBIAS_W<21> {
196        CMPBIAS_W::new(self)
197    }
198    #[doc = "Bit 24 - HFRCO LDO High Power Mode"]
199    #[inline(always)]
200    #[must_use]
201    pub fn ldohp(&mut self) -> LDOHP_W<24> {
202        LDOHP_W::new(self)
203    }
204    #[doc = "Bits 25:26 - Locally Divide HFRCO Clock Output"]
205    #[inline(always)]
206    #[must_use]
207    pub fn clkdiv(&mut self) -> CLKDIV_W<25> {
208        CLKDIV_W::new(self)
209    }
210    #[doc = "Bit 27 - Enable Reference for Fine Tuning"]
211    #[inline(always)]
212    #[must_use]
213    pub fn finetuningen(&mut self) -> FINETUNINGEN_W<27> {
214        FINETUNINGEN_W::new(self)
215    }
216    #[doc = "Bits 28:31 - HFRCO Temperature Coefficient Trim on Comparator Reference"]
217    #[inline(always)]
218    #[must_use]
219    pub fn vreftc(&mut self) -> VREFTC_W<28> {
220        VREFTC_W::new(self)
221    }
222    #[doc = "Writes raw bits to the register."]
223    #[inline(always)]
224    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
225        self.0.bits(bits);
226        self
227    }
228}
229#[doc = "HFRCO Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfrcoctrl](index.html) module"]
230pub struct HFRCOCTRL_SPEC;
231impl crate::RegisterSpec for HFRCOCTRL_SPEC {
232    type Ux = u32;
233}
234#[doc = "`read()` method returns [hfrcoctrl::R](R) reader structure"]
235impl crate::Readable for HFRCOCTRL_SPEC {
236    type Reader = R;
237}
238#[doc = "`write(|w| ..)` method takes [hfrcoctrl::W](W) writer structure"]
239impl crate::Writable for HFRCOCTRL_SPEC {
240    type Writer = W;
241    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
242    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
243}
244#[doc = "`reset()` method sets HFRCOCTRL to value 0xb148_1f7f"]
245impl crate::Resettable for HFRCOCTRL_SPEC {
246    const RESET_VALUE: Self::Ux = 0xb148_1f7f;
247}
efm32tg11b_pac/efm32tg11b120/cmu/hfrcoctrl.rs

efm32tg11b_pac/efm32tg11b120/cmu/
hfrcoctrl.rs
