efm32tg11b_pac/efm32tg11b120/cmu/
hfclksel.rs

1#[doc = "Register `HFCLKSEL` writer"]
2pub struct W(crate::W<HFCLKSEL_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<HFCLKSEL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<HFCLKSEL_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<HFCLKSEL_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "HFCLK Select\n\nValue on reset: 0"]
23#[derive(Clone, Copy, Debug, PartialEq, Eq)]
24#[repr(u8)]
25pub enum HF_AW {
26    #[doc = "1: Select HFRCO as HFCLK"]
27    HFRCO = 1,
28    #[doc = "2: Select HFXO as HFCLK"]
29    HFXO = 2,
30    #[doc = "3: Select LFRCO as HFCLK"]
31    LFRCO = 3,
32    #[doc = "4: Select LFXO as HFCLK"]
33    LFXO = 4,
34    #[doc = "5: Select HFRCO divided by 2 as HFCLK"]
35    HFRCODIV2 = 5,
36    #[doc = "7: Select CLKIN0 as HFCLK"]
37    CLKIN0 = 7,
38}
39impl From<HF_AW> for u8 {
40    #[inline(always)]
41    fn from(variant: HF_AW) -> Self {
42        variant as _
43    }
44}
45#[doc = "Field `HF` writer - HFCLK Select"]
46pub type HF_W<'a, const O: u8> = crate::FieldWriter<'a, u32, HFCLKSEL_SPEC, u8, HF_AW, 3, O>;
47impl<'a, const O: u8> HF_W<'a, O> {
48    #[doc = "Select HFRCO as HFCLK"]
49    #[inline(always)]
50    pub fn hfrco(self) -> &'a mut W {
51        self.variant(HF_AW::HFRCO)
52    }
53    #[doc = "Select HFXO as HFCLK"]
54    #[inline(always)]
55    pub fn hfxo(self) -> &'a mut W {
56        self.variant(HF_AW::HFXO)
57    }
58    #[doc = "Select LFRCO as HFCLK"]
59    #[inline(always)]
60    pub fn lfrco(self) -> &'a mut W {
61        self.variant(HF_AW::LFRCO)
62    }
63    #[doc = "Select LFXO as HFCLK"]
64    #[inline(always)]
65    pub fn lfxo(self) -> &'a mut W {
66        self.variant(HF_AW::LFXO)
67    }
68    #[doc = "Select HFRCO divided by 2 as HFCLK"]
69    #[inline(always)]
70    pub fn hfrcodiv2(self) -> &'a mut W {
71        self.variant(HF_AW::HFRCODIV2)
72    }
73    #[doc = "Select CLKIN0 as HFCLK"]
74    #[inline(always)]
75    pub fn clkin0(self) -> &'a mut W {
76        self.variant(HF_AW::CLKIN0)
77    }
78}
79impl W {
80    #[doc = "Bits 0:2 - HFCLK Select"]
81    #[inline(always)]
82    #[must_use]
83    pub fn hf(&mut self) -> HF_W<0> {
84        HF_W::new(self)
85    }
86    #[doc = "Writes raw bits to the register."]
87    #[inline(always)]
88    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
89        self.0.bits(bits);
90        self
91    }
92}
93#[doc = "High Frequency Clock Select Command Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclksel](index.html) module"]
94pub struct HFCLKSEL_SPEC;
95impl crate::RegisterSpec for HFCLKSEL_SPEC {
96    type Ux = u32;
97}
98#[doc = "`write(|w| ..)` method takes [hfclksel::W](W) writer structure"]
99impl crate::Writable for HFCLKSEL_SPEC {
100    type Writer = W;
101    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
102    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
103}
104#[doc = "`reset()` method sets HFCLKSEL to value 0"]
105impl crate::Resettable for HFCLKSEL_SPEC {
106    const RESET_VALUE: Self::Ux = 0;
107}
efm32tg11b_pac/efm32tg11b120/cmu/hfclksel.rs

efm32tg11b_pac/efm32tg11b120/cmu/
hfclksel.rs
