efm32tg11b_pac/efm32tg11b540/timer1/
dtctrl.rs

1#[doc = "Register `DTCTRL` reader"]
2pub struct R(crate::R<DTCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DTCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DTCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DTCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DTCTRL` writer"]
17pub struct W(crate::W<DTCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DTCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DTCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DTCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DTEN` reader - DTI Enable"]
38pub type DTEN_R = crate::BitReader<bool>;
39#[doc = "Field `DTEN` writer - DTI Enable"]
40pub type DTEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>;
41#[doc = "Field `DTDAS` reader - DTI Automatic Start-up Functionality"]
42pub type DTDAS_R = crate::BitReader<bool>;
43#[doc = "Field `DTDAS` writer - DTI Automatic Start-up Functionality"]
44pub type DTDAS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>;
45#[doc = "Field `DTIPOL` reader - DTI Inactive Polarity"]
46pub type DTIPOL_R = crate::BitReader<bool>;
47#[doc = "Field `DTIPOL` writer - DTI Inactive Polarity"]
48pub type DTIPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>;
49#[doc = "Field `DTCINV` reader - DTI Complementary Output Invert"]
50pub type DTCINV_R = crate::BitReader<bool>;
51#[doc = "Field `DTCINV` writer - DTI Complementary Output Invert"]
52pub type DTCINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>;
53#[doc = "Field `DTPRSSEL` reader - DTI PRS Source Channel Select"]
54pub type DTPRSSEL_R = crate::FieldReader<u8, DTPRSSEL_A>;
55#[doc = "DTI PRS Source Channel Select\n\nValue on reset: 0"]
56#[derive(Clone, Copy, Debug, PartialEq, Eq)]
57#[repr(u8)]
58pub enum DTPRSSEL_A {
59    #[doc = "0: PRS Channel 0 selected as input"]
60    PRSCH0 = 0,
61    #[doc = "1: PRS Channel 1 selected as input"]
62    PRSCH1 = 1,
63    #[doc = "2: PRS Channel 2 selected as input"]
64    PRSCH2 = 2,
65    #[doc = "3: PRS Channel 3 selected as input"]
66    PRSCH3 = 3,
67    #[doc = "4: PRS Channel 4 selected as input"]
68    PRSCH4 = 4,
69    #[doc = "5: PRS Channel 5 selected as input"]
70    PRSCH5 = 5,
71    #[doc = "6: PRS Channel 6 selected as input"]
72    PRSCH6 = 6,
73    #[doc = "7: PRS Channel 7 selected as input"]
74    PRSCH7 = 7,
75}
76impl From<DTPRSSEL_A> for u8 {
77    #[inline(always)]
78    fn from(variant: DTPRSSEL_A) -> Self {
79        variant as _
80    }
81}
82impl DTPRSSEL_R {
83    #[doc = "Get enumerated values variant"]
84    #[inline(always)]
85    pub fn variant(&self) -> DTPRSSEL_A {
86        match self.bits {
87            0 => DTPRSSEL_A::PRSCH0,
88            1 => DTPRSSEL_A::PRSCH1,
89            2 => DTPRSSEL_A::PRSCH2,
90            3 => DTPRSSEL_A::PRSCH3,
91            4 => DTPRSSEL_A::PRSCH4,
92            5 => DTPRSSEL_A::PRSCH5,
93            6 => DTPRSSEL_A::PRSCH6,
94            7 => DTPRSSEL_A::PRSCH7,
95            _ => unreachable!(),
96        }
97    }
98    #[doc = "Checks if the value of the field is `PRSCH0`"]
99    #[inline(always)]
100    pub fn is_prsch0(&self) -> bool {
101        *self == DTPRSSEL_A::PRSCH0
102    }
103    #[doc = "Checks if the value of the field is `PRSCH1`"]
104    #[inline(always)]
105    pub fn is_prsch1(&self) -> bool {
106        *self == DTPRSSEL_A::PRSCH1
107    }
108    #[doc = "Checks if the value of the field is `PRSCH2`"]
109    #[inline(always)]
110    pub fn is_prsch2(&self) -> bool {
111        *self == DTPRSSEL_A::PRSCH2
112    }
113    #[doc = "Checks if the value of the field is `PRSCH3`"]
114    #[inline(always)]
115    pub fn is_prsch3(&self) -> bool {
116        *self == DTPRSSEL_A::PRSCH3
117    }
118    #[doc = "Checks if the value of the field is `PRSCH4`"]
119    #[inline(always)]
120    pub fn is_prsch4(&self) -> bool {
121        *self == DTPRSSEL_A::PRSCH4
122    }
123    #[doc = "Checks if the value of the field is `PRSCH5`"]
124    #[inline(always)]
125    pub fn is_prsch5(&self) -> bool {
126        *self == DTPRSSEL_A::PRSCH5
127    }
128    #[doc = "Checks if the value of the field is `PRSCH6`"]
129    #[inline(always)]
130    pub fn is_prsch6(&self) -> bool {
131        *self == DTPRSSEL_A::PRSCH6
132    }
133    #[doc = "Checks if the value of the field is `PRSCH7`"]
134    #[inline(always)]
135    pub fn is_prsch7(&self) -> bool {
136        *self == DTPRSSEL_A::PRSCH7
137    }
138}
139#[doc = "Field `DTPRSSEL` writer - DTI PRS Source Channel Select"]
140pub type DTPRSSEL_W<'a, const O: u8> =
141    crate::FieldWriterSafe<'a, u32, DTCTRL_SPEC, u8, DTPRSSEL_A, 3, O>;
142impl<'a, const O: u8> DTPRSSEL_W<'a, O> {
143    #[doc = "PRS Channel 0 selected as input"]
144    #[inline(always)]
145    pub fn prsch0(self) -> &'a mut W {
146        self.variant(DTPRSSEL_A::PRSCH0)
147    }
148    #[doc = "PRS Channel 1 selected as input"]
149    #[inline(always)]
150    pub fn prsch1(self) -> &'a mut W {
151        self.variant(DTPRSSEL_A::PRSCH1)
152    }
153    #[doc = "PRS Channel 2 selected as input"]
154    #[inline(always)]
155    pub fn prsch2(self) -> &'a mut W {
156        self.variant(DTPRSSEL_A::PRSCH2)
157    }
158    #[doc = "PRS Channel 3 selected as input"]
159    #[inline(always)]
160    pub fn prsch3(self) -> &'a mut W {
161        self.variant(DTPRSSEL_A::PRSCH3)
162    }
163    #[doc = "PRS Channel 4 selected as input"]
164    #[inline(always)]
165    pub fn prsch4(self) -> &'a mut W {
166        self.variant(DTPRSSEL_A::PRSCH4)
167    }
168    #[doc = "PRS Channel 5 selected as input"]
169    #[inline(always)]
170    pub fn prsch5(self) -> &'a mut W {
171        self.variant(DTPRSSEL_A::PRSCH5)
172    }
173    #[doc = "PRS Channel 6 selected as input"]
174    #[inline(always)]
175    pub fn prsch6(self) -> &'a mut W {
176        self.variant(DTPRSSEL_A::PRSCH6)
177    }
178    #[doc = "PRS Channel 7 selected as input"]
179    #[inline(always)]
180    pub fn prsch7(self) -> &'a mut W {
181        self.variant(DTPRSSEL_A::PRSCH7)
182    }
183}
184#[doc = "Field `DTAR` reader - DTI Always Run"]
185pub type DTAR_R = crate::BitReader<bool>;
186#[doc = "Field `DTAR` writer - DTI Always Run"]
187pub type DTAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>;
188#[doc = "Field `DTFATS` reader - DTI Fault Action on Timer Stop"]
189pub type DTFATS_R = crate::BitReader<bool>;
190#[doc = "Field `DTFATS` writer - DTI Fault Action on Timer Stop"]
191pub type DTFATS_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>;
192#[doc = "Field `DTPRSEN` reader - DTI PRS Source Enable"]
193pub type DTPRSEN_R = crate::BitReader<bool>;
194#[doc = "Field `DTPRSEN` writer - DTI PRS Source Enable"]
195pub type DTPRSEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, DTCTRL_SPEC, bool, O>;
196impl R {
197    #[doc = "Bit 0 - DTI Enable"]
198    #[inline(always)]
199    pub fn dten(&self) -> DTEN_R {
200        DTEN_R::new((self.bits & 1) != 0)
201    }
202    #[doc = "Bit 1 - DTI Automatic Start-up Functionality"]
203    #[inline(always)]
204    pub fn dtdas(&self) -> DTDAS_R {
205        DTDAS_R::new(((self.bits >> 1) & 1) != 0)
206    }
207    #[doc = "Bit 2 - DTI Inactive Polarity"]
208    #[inline(always)]
209    pub fn dtipol(&self) -> DTIPOL_R {
210        DTIPOL_R::new(((self.bits >> 2) & 1) != 0)
211    }
212    #[doc = "Bit 3 - DTI Complementary Output Invert"]
213    #[inline(always)]
214    pub fn dtcinv(&self) -> DTCINV_R {
215        DTCINV_R::new(((self.bits >> 3) & 1) != 0)
216    }
217    #[doc = "Bits 4:6 - DTI PRS Source Channel Select"]
218    #[inline(always)]
219    pub fn dtprssel(&self) -> DTPRSSEL_R {
220        DTPRSSEL_R::new(((self.bits >> 4) & 7) as u8)
221    }
222    #[doc = "Bit 9 - DTI Always Run"]
223    #[inline(always)]
224    pub fn dtar(&self) -> DTAR_R {
225        DTAR_R::new(((self.bits >> 9) & 1) != 0)
226    }
227    #[doc = "Bit 10 - DTI Fault Action on Timer Stop"]
228    #[inline(always)]
229    pub fn dtfats(&self) -> DTFATS_R {
230        DTFATS_R::new(((self.bits >> 10) & 1) != 0)
231    }
232    #[doc = "Bit 24 - DTI PRS Source Enable"]
233    #[inline(always)]
234    pub fn dtprsen(&self) -> DTPRSEN_R {
235        DTPRSEN_R::new(((self.bits >> 24) & 1) != 0)
236    }
237}
238impl W {
239    #[doc = "Bit 0 - DTI Enable"]
240    #[inline(always)]
241    #[must_use]
242    pub fn dten(&mut self) -> DTEN_W<0> {
243        DTEN_W::new(self)
244    }
245    #[doc = "Bit 1 - DTI Automatic Start-up Functionality"]
246    #[inline(always)]
247    #[must_use]
248    pub fn dtdas(&mut self) -> DTDAS_W<1> {
249        DTDAS_W::new(self)
250    }
251    #[doc = "Bit 2 - DTI Inactive Polarity"]
252    #[inline(always)]
253    #[must_use]
254    pub fn dtipol(&mut self) -> DTIPOL_W<2> {
255        DTIPOL_W::new(self)
256    }
257    #[doc = "Bit 3 - DTI Complementary Output Invert"]
258    #[inline(always)]
259    #[must_use]
260    pub fn dtcinv(&mut self) -> DTCINV_W<3> {
261        DTCINV_W::new(self)
262    }
263    #[doc = "Bits 4:6 - DTI PRS Source Channel Select"]
264    #[inline(always)]
265    #[must_use]
266    pub fn dtprssel(&mut self) -> DTPRSSEL_W<4> {
267        DTPRSSEL_W::new(self)
268    }
269    #[doc = "Bit 9 - DTI Always Run"]
270    #[inline(always)]
271    #[must_use]
272    pub fn dtar(&mut self) -> DTAR_W<9> {
273        DTAR_W::new(self)
274    }
275    #[doc = "Bit 10 - DTI Fault Action on Timer Stop"]
276    #[inline(always)]
277    #[must_use]
278    pub fn dtfats(&mut self) -> DTFATS_W<10> {
279        DTFATS_W::new(self)
280    }
281    #[doc = "Bit 24 - DTI PRS Source Enable"]
282    #[inline(always)]
283    #[must_use]
284    pub fn dtprsen(&mut self) -> DTPRSEN_W<24> {
285        DTPRSEN_W::new(self)
286    }
287    #[doc = "Writes raw bits to the register."]
288    #[inline(always)]
289    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
290        self.0.bits(bits);
291        self
292    }
293}
294#[doc = "DTI Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dtctrl](index.html) module"]
295pub struct DTCTRL_SPEC;
296impl crate::RegisterSpec for DTCTRL_SPEC {
297    type Ux = u32;
298}
299#[doc = "`read()` method returns [dtctrl::R](R) reader structure"]
300impl crate::Readable for DTCTRL_SPEC {
301    type Reader = R;
302}
303#[doc = "`write(|w| ..)` method takes [dtctrl::W](W) writer structure"]
304impl crate::Writable for DTCTRL_SPEC {
305    type Writer = W;
306    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
307    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
308}
309#[doc = "`reset()` method sets DTCTRL to value 0"]
310impl crate::Resettable for DTCTRL_SPEC {
311    const RESET_VALUE: Self::Ux = 0;
312}
efm32tg11b_pac/efm32tg11b540/timer1/dtctrl.rs

efm32tg11b_pac/efm32tg11b540/timer1/
dtctrl.rs
