efm32tg11b_pac/efm32tg11b540/i2c1/
ien.rs

1#[doc = "Register `IEN` reader"]
2pub struct R(crate::R<IEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `IEN` writer"]
17pub struct W(crate::W<IEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<IEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<IEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<IEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `START` reader - START Interrupt Enable"]
38pub type START_R = crate::BitReader<bool>;
39#[doc = "Field `START` writer - START Interrupt Enable"]
40pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
41#[doc = "Field `RSTART` reader - RSTART Interrupt Enable"]
42pub type RSTART_R = crate::BitReader<bool>;
43#[doc = "Field `RSTART` writer - RSTART Interrupt Enable"]
44pub type RSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
45#[doc = "Field `ADDR` reader - ADDR Interrupt Enable"]
46pub type ADDR_R = crate::BitReader<bool>;
47#[doc = "Field `ADDR` writer - ADDR Interrupt Enable"]
48pub type ADDR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
49#[doc = "Field `TXC` reader - TXC Interrupt Enable"]
50pub type TXC_R = crate::BitReader<bool>;
51#[doc = "Field `TXC` writer - TXC Interrupt Enable"]
52pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
53#[doc = "Field `TXBL` reader - TXBL Interrupt Enable"]
54pub type TXBL_R = crate::BitReader<bool>;
55#[doc = "Field `TXBL` writer - TXBL Interrupt Enable"]
56pub type TXBL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
57#[doc = "Field `RXDATAV` reader - RXDATAV Interrupt Enable"]
58pub type RXDATAV_R = crate::BitReader<bool>;
59#[doc = "Field `RXDATAV` writer - RXDATAV Interrupt Enable"]
60pub type RXDATAV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
61#[doc = "Field `ACK` reader - ACK Interrupt Enable"]
62pub type ACK_R = crate::BitReader<bool>;
63#[doc = "Field `ACK` writer - ACK Interrupt Enable"]
64pub type ACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
65#[doc = "Field `NACK` reader - NACK Interrupt Enable"]
66pub type NACK_R = crate::BitReader<bool>;
67#[doc = "Field `NACK` writer - NACK Interrupt Enable"]
68pub type NACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
69#[doc = "Field `MSTOP` reader - MSTOP Interrupt Enable"]
70pub type MSTOP_R = crate::BitReader<bool>;
71#[doc = "Field `MSTOP` writer - MSTOP Interrupt Enable"]
72pub type MSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
73#[doc = "Field `ARBLOST` reader - ARBLOST Interrupt Enable"]
74pub type ARBLOST_R = crate::BitReader<bool>;
75#[doc = "Field `ARBLOST` writer - ARBLOST Interrupt Enable"]
76pub type ARBLOST_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
77#[doc = "Field `BUSERR` reader - BUSERR Interrupt Enable"]
78pub type BUSERR_R = crate::BitReader<bool>;
79#[doc = "Field `BUSERR` writer - BUSERR Interrupt Enable"]
80pub type BUSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
81#[doc = "Field `BUSHOLD` reader - BUSHOLD Interrupt Enable"]
82pub type BUSHOLD_R = crate::BitReader<bool>;
83#[doc = "Field `BUSHOLD` writer - BUSHOLD Interrupt Enable"]
84pub type BUSHOLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
85#[doc = "Field `TXOF` reader - TXOF Interrupt Enable"]
86pub type TXOF_R = crate::BitReader<bool>;
87#[doc = "Field `TXOF` writer - TXOF Interrupt Enable"]
88pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
89#[doc = "Field `RXUF` reader - RXUF Interrupt Enable"]
90pub type RXUF_R = crate::BitReader<bool>;
91#[doc = "Field `RXUF` writer - RXUF Interrupt Enable"]
92pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
93#[doc = "Field `BITO` reader - BITO Interrupt Enable"]
94pub type BITO_R = crate::BitReader<bool>;
95#[doc = "Field `BITO` writer - BITO Interrupt Enable"]
96pub type BITO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
97#[doc = "Field `CLTO` reader - CLTO Interrupt Enable"]
98pub type CLTO_R = crate::BitReader<bool>;
99#[doc = "Field `CLTO` writer - CLTO Interrupt Enable"]
100pub type CLTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
101#[doc = "Field `SSTOP` reader - SSTOP Interrupt Enable"]
102pub type SSTOP_R = crate::BitReader<bool>;
103#[doc = "Field `SSTOP` writer - SSTOP Interrupt Enable"]
104pub type SSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
105#[doc = "Field `RXFULL` reader - RXFULL Interrupt Enable"]
106pub type RXFULL_R = crate::BitReader<bool>;
107#[doc = "Field `RXFULL` writer - RXFULL Interrupt Enable"]
108pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
109#[doc = "Field `CLERR` reader - CLERR Interrupt Enable"]
110pub type CLERR_R = crate::BitReader<bool>;
111#[doc = "Field `CLERR` writer - CLERR Interrupt Enable"]
112pub type CLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
113impl R {
114    #[doc = "Bit 0 - START Interrupt Enable"]
115    #[inline(always)]
116    pub fn start(&self) -> START_R {
117        START_R::new((self.bits & 1) != 0)
118    }
119    #[doc = "Bit 1 - RSTART Interrupt Enable"]
120    #[inline(always)]
121    pub fn rstart(&self) -> RSTART_R {
122        RSTART_R::new(((self.bits >> 1) & 1) != 0)
123    }
124    #[doc = "Bit 2 - ADDR Interrupt Enable"]
125    #[inline(always)]
126    pub fn addr(&self) -> ADDR_R {
127        ADDR_R::new(((self.bits >> 2) & 1) != 0)
128    }
129    #[doc = "Bit 3 - TXC Interrupt Enable"]
130    #[inline(always)]
131    pub fn txc(&self) -> TXC_R {
132        TXC_R::new(((self.bits >> 3) & 1) != 0)
133    }
134    #[doc = "Bit 4 - TXBL Interrupt Enable"]
135    #[inline(always)]
136    pub fn txbl(&self) -> TXBL_R {
137        TXBL_R::new(((self.bits >> 4) & 1) != 0)
138    }
139    #[doc = "Bit 5 - RXDATAV Interrupt Enable"]
140    #[inline(always)]
141    pub fn rxdatav(&self) -> RXDATAV_R {
142        RXDATAV_R::new(((self.bits >> 5) & 1) != 0)
143    }
144    #[doc = "Bit 6 - ACK Interrupt Enable"]
145    #[inline(always)]
146    pub fn ack(&self) -> ACK_R {
147        ACK_R::new(((self.bits >> 6) & 1) != 0)
148    }
149    #[doc = "Bit 7 - NACK Interrupt Enable"]
150    #[inline(always)]
151    pub fn nack(&self) -> NACK_R {
152        NACK_R::new(((self.bits >> 7) & 1) != 0)
153    }
154    #[doc = "Bit 8 - MSTOP Interrupt Enable"]
155    #[inline(always)]
156    pub fn mstop(&self) -> MSTOP_R {
157        MSTOP_R::new(((self.bits >> 8) & 1) != 0)
158    }
159    #[doc = "Bit 9 - ARBLOST Interrupt Enable"]
160    #[inline(always)]
161    pub fn arblost(&self) -> ARBLOST_R {
162        ARBLOST_R::new(((self.bits >> 9) & 1) != 0)
163    }
164    #[doc = "Bit 10 - BUSERR Interrupt Enable"]
165    #[inline(always)]
166    pub fn buserr(&self) -> BUSERR_R {
167        BUSERR_R::new(((self.bits >> 10) & 1) != 0)
168    }
169    #[doc = "Bit 11 - BUSHOLD Interrupt Enable"]
170    #[inline(always)]
171    pub fn bushold(&self) -> BUSHOLD_R {
172        BUSHOLD_R::new(((self.bits >> 11) & 1) != 0)
173    }
174    #[doc = "Bit 12 - TXOF Interrupt Enable"]
175    #[inline(always)]
176    pub fn txof(&self) -> TXOF_R {
177        TXOF_R::new(((self.bits >> 12) & 1) != 0)
178    }
179    #[doc = "Bit 13 - RXUF Interrupt Enable"]
180    #[inline(always)]
181    pub fn rxuf(&self) -> RXUF_R {
182        RXUF_R::new(((self.bits >> 13) & 1) != 0)
183    }
184    #[doc = "Bit 14 - BITO Interrupt Enable"]
185    #[inline(always)]
186    pub fn bito(&self) -> BITO_R {
187        BITO_R::new(((self.bits >> 14) & 1) != 0)
188    }
189    #[doc = "Bit 15 - CLTO Interrupt Enable"]
190    #[inline(always)]
191    pub fn clto(&self) -> CLTO_R {
192        CLTO_R::new(((self.bits >> 15) & 1) != 0)
193    }
194    #[doc = "Bit 16 - SSTOP Interrupt Enable"]
195    #[inline(always)]
196    pub fn sstop(&self) -> SSTOP_R {
197        SSTOP_R::new(((self.bits >> 16) & 1) != 0)
198    }
199    #[doc = "Bit 17 - RXFULL Interrupt Enable"]
200    #[inline(always)]
201    pub fn rxfull(&self) -> RXFULL_R {
202        RXFULL_R::new(((self.bits >> 17) & 1) != 0)
203    }
204    #[doc = "Bit 18 - CLERR Interrupt Enable"]
205    #[inline(always)]
206    pub fn clerr(&self) -> CLERR_R {
207        CLERR_R::new(((self.bits >> 18) & 1) != 0)
208    }
209}
210impl W {
211    #[doc = "Bit 0 - START Interrupt Enable"]
212    #[inline(always)]
213    #[must_use]
214    pub fn start(&mut self) -> START_W<0> {
215        START_W::new(self)
216    }
217    #[doc = "Bit 1 - RSTART Interrupt Enable"]
218    #[inline(always)]
219    #[must_use]
220    pub fn rstart(&mut self) -> RSTART_W<1> {
221        RSTART_W::new(self)
222    }
223    #[doc = "Bit 2 - ADDR Interrupt Enable"]
224    #[inline(always)]
225    #[must_use]
226    pub fn addr(&mut self) -> ADDR_W<2> {
227        ADDR_W::new(self)
228    }
229    #[doc = "Bit 3 - TXC Interrupt Enable"]
230    #[inline(always)]
231    #[must_use]
232    pub fn txc(&mut self) -> TXC_W<3> {
233        TXC_W::new(self)
234    }
235    #[doc = "Bit 4 - TXBL Interrupt Enable"]
236    #[inline(always)]
237    #[must_use]
238    pub fn txbl(&mut self) -> TXBL_W<4> {
239        TXBL_W::new(self)
240    }
241    #[doc = "Bit 5 - RXDATAV Interrupt Enable"]
242    #[inline(always)]
243    #[must_use]
244    pub fn rxdatav(&mut self) -> RXDATAV_W<5> {
245        RXDATAV_W::new(self)
246    }
247    #[doc = "Bit 6 - ACK Interrupt Enable"]
248    #[inline(always)]
249    #[must_use]
250    pub fn ack(&mut self) -> ACK_W<6> {
251        ACK_W::new(self)
252    }
253    #[doc = "Bit 7 - NACK Interrupt Enable"]
254    #[inline(always)]
255    #[must_use]
256    pub fn nack(&mut self) -> NACK_W<7> {
257        NACK_W::new(self)
258    }
259    #[doc = "Bit 8 - MSTOP Interrupt Enable"]
260    #[inline(always)]
261    #[must_use]
262    pub fn mstop(&mut self) -> MSTOP_W<8> {
263        MSTOP_W::new(self)
264    }
265    #[doc = "Bit 9 - ARBLOST Interrupt Enable"]
266    #[inline(always)]
267    #[must_use]
268    pub fn arblost(&mut self) -> ARBLOST_W<9> {
269        ARBLOST_W::new(self)
270    }
271    #[doc = "Bit 10 - BUSERR Interrupt Enable"]
272    #[inline(always)]
273    #[must_use]
274    pub fn buserr(&mut self) -> BUSERR_W<10> {
275        BUSERR_W::new(self)
276    }
277    #[doc = "Bit 11 - BUSHOLD Interrupt Enable"]
278    #[inline(always)]
279    #[must_use]
280    pub fn bushold(&mut self) -> BUSHOLD_W<11> {
281        BUSHOLD_W::new(self)
282    }
283    #[doc = "Bit 12 - TXOF Interrupt Enable"]
284    #[inline(always)]
285    #[must_use]
286    pub fn txof(&mut self) -> TXOF_W<12> {
287        TXOF_W::new(self)
288    }
289    #[doc = "Bit 13 - RXUF Interrupt Enable"]
290    #[inline(always)]
291    #[must_use]
292    pub fn rxuf(&mut self) -> RXUF_W<13> {
293        RXUF_W::new(self)
294    }
295    #[doc = "Bit 14 - BITO Interrupt Enable"]
296    #[inline(always)]
297    #[must_use]
298    pub fn bito(&mut self) -> BITO_W<14> {
299        BITO_W::new(self)
300    }
301    #[doc = "Bit 15 - CLTO Interrupt Enable"]
302    #[inline(always)]
303    #[must_use]
304    pub fn clto(&mut self) -> CLTO_W<15> {
305        CLTO_W::new(self)
306    }
307    #[doc = "Bit 16 - SSTOP Interrupt Enable"]
308    #[inline(always)]
309    #[must_use]
310    pub fn sstop(&mut self) -> SSTOP_W<16> {
311        SSTOP_W::new(self)
312    }
313    #[doc = "Bit 17 - RXFULL Interrupt Enable"]
314    #[inline(always)]
315    #[must_use]
316    pub fn rxfull(&mut self) -> RXFULL_W<17> {
317        RXFULL_W::new(self)
318    }
319    #[doc = "Bit 18 - CLERR Interrupt Enable"]
320    #[inline(always)]
321    #[must_use]
322    pub fn clerr(&mut self) -> CLERR_W<18> {
323        CLERR_W::new(self)
324    }
325    #[doc = "Writes raw bits to the register."]
326    #[inline(always)]
327    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
328        self.0.bits(bits);
329        self
330    }
331}
332#[doc = "Interrupt Enable Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
333pub struct IEN_SPEC;
334impl crate::RegisterSpec for IEN_SPEC {
335    type Ux = u32;
336}
337#[doc = "`read()` method returns [ien::R](R) reader structure"]
338impl crate::Readable for IEN_SPEC {
339    type Reader = R;
340}
341#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
342impl crate::Writable for IEN_SPEC {
343    type Writer = W;
344    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
345    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
346}
347#[doc = "`reset()` method sets IEN to value 0"]
348impl crate::Resettable for IEN_SPEC {
349    const RESET_VALUE: Self::Ux = 0;
350}
efm32tg11b_pac/efm32tg11b540/i2c1/ien.rs

efm32tg11b_pac/efm32tg11b540/i2c1/
ien.rs
