efm32tg11b_pac/efm32tg11b120/lesense/
ch9_interact.rs1#[doc = "Register `CH9_INTERACT` reader"]
2pub struct R(crate::R<CH9_INTERACT_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CH9_INTERACT_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CH9_INTERACT_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CH9_INTERACT_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CH9_INTERACT` writer"]
17pub struct W(crate::W<CH9_INTERACT_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CH9_INTERACT_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CH9_INTERACT_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CH9_INTERACT_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `THRES` reader - ACMP Threshold or VDAC Data"]
38pub type THRES_R = crate::FieldReader<u16, u16>;
39#[doc = "Field `THRES` writer - ACMP Threshold or VDAC Data"]
40pub type THRES_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CH9_INTERACT_SPEC, u16, u16, 12, O>;
41#[doc = "Field `SAMPLE` reader - Select Sample Mode"]
42pub type SAMPLE_R = crate::FieldReader<u8, SAMPLE_A>;
43#[doc = "Select Sample Mode\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum SAMPLE_A {
47 #[doc = "0: Counter output will be used in evaluation"]
48 ACMPCOUNT = 0,
49 #[doc = "1: ACMP output will be used in evaluation"]
50 ACMP = 1,
51 #[doc = "2: ADC output will be used in evaluation"]
52 ADC = 2,
53 #[doc = "3: Differential ADC output will be used in evaluation"]
54 ADCDIFF = 3,
55}
56impl From<SAMPLE_A> for u8 {
57 #[inline(always)]
58 fn from(variant: SAMPLE_A) -> Self {
59 variant as _
60 }
61}
62impl SAMPLE_R {
63 #[doc = "Get enumerated values variant"]
64 #[inline(always)]
65 pub fn variant(&self) -> SAMPLE_A {
66 match self.bits {
67 0 => SAMPLE_A::ACMPCOUNT,
68 1 => SAMPLE_A::ACMP,
69 2 => SAMPLE_A::ADC,
70 3 => SAMPLE_A::ADCDIFF,
71 _ => unreachable!(),
72 }
73 }
74 #[doc = "Checks if the value of the field is `ACMPCOUNT`"]
75 #[inline(always)]
76 pub fn is_acmpcount(&self) -> bool {
77 *self == SAMPLE_A::ACMPCOUNT
78 }
79 #[doc = "Checks if the value of the field is `ACMP`"]
80 #[inline(always)]
81 pub fn is_acmp(&self) -> bool {
82 *self == SAMPLE_A::ACMP
83 }
84 #[doc = "Checks if the value of the field is `ADC`"]
85 #[inline(always)]
86 pub fn is_adc(&self) -> bool {
87 *self == SAMPLE_A::ADC
88 }
89 #[doc = "Checks if the value of the field is `ADCDIFF`"]
90 #[inline(always)]
91 pub fn is_adcdiff(&self) -> bool {
92 *self == SAMPLE_A::ADCDIFF
93 }
94}
95#[doc = "Field `SAMPLE` writer - Select Sample Mode"]
96pub type SAMPLE_W<'a, const O: u8> =
97 crate::FieldWriterSafe<'a, u32, CH9_INTERACT_SPEC, u8, SAMPLE_A, 2, O>;
98impl<'a, const O: u8> SAMPLE_W<'a, O> {
99 #[doc = "Counter output will be used in evaluation"]
100 #[inline(always)]
101 pub fn acmpcount(self) -> &'a mut W {
102 self.variant(SAMPLE_A::ACMPCOUNT)
103 }
104 #[doc = "ACMP output will be used in evaluation"]
105 #[inline(always)]
106 pub fn acmp(self) -> &'a mut W {
107 self.variant(SAMPLE_A::ACMP)
108 }
109 #[doc = "ADC output will be used in evaluation"]
110 #[inline(always)]
111 pub fn adc(self) -> &'a mut W {
112 self.variant(SAMPLE_A::ADC)
113 }
114 #[doc = "Differential ADC output will be used in evaluation"]
115 #[inline(always)]
116 pub fn adcdiff(self) -> &'a mut W {
117 self.variant(SAMPLE_A::ADCDIFF)
118 }
119}
120#[doc = "Field `SETIF` reader - Enable Interrupt Generation"]
121pub type SETIF_R = crate::FieldReader<u8, SETIF_A>;
122#[doc = "Enable Interrupt Generation\n\nValue on reset: 0"]
123#[derive(Clone, Copy, Debug, PartialEq, Eq)]
124#[repr(u8)]
125pub enum SETIF_A {
126 #[doc = "0: No interrupt is generated"]
127 NONE = 0,
128 #[doc = "1: Set interrupt flag if the sensor triggers."]
129 LEVEL = 1,
130 #[doc = "2: Set interrupt flag on positive edge of the sensor state"]
131 POSEDGE = 2,
132 #[doc = "3: Set interrupt flag on negative edge of the sensor state"]
133 NEGEDGE = 3,
134 #[doc = "4: Set interrupt flag on both edges of the sensor state"]
135 BOTHEDGES = 4,
136}
137impl From<SETIF_A> for u8 {
138 #[inline(always)]
139 fn from(variant: SETIF_A) -> Self {
140 variant as _
141 }
142}
143impl SETIF_R {
144 #[doc = "Get enumerated values variant"]
145 #[inline(always)]
146 pub fn variant(&self) -> Option<SETIF_A> {
147 match self.bits {
148 0 => Some(SETIF_A::NONE),
149 1 => Some(SETIF_A::LEVEL),
150 2 => Some(SETIF_A::POSEDGE),
151 3 => Some(SETIF_A::NEGEDGE),
152 4 => Some(SETIF_A::BOTHEDGES),
153 _ => None,
154 }
155 }
156 #[doc = "Checks if the value of the field is `NONE`"]
157 #[inline(always)]
158 pub fn is_none(&self) -> bool {
159 *self == SETIF_A::NONE
160 }
161 #[doc = "Checks if the value of the field is `LEVEL`"]
162 #[inline(always)]
163 pub fn is_level(&self) -> bool {
164 *self == SETIF_A::LEVEL
165 }
166 #[doc = "Checks if the value of the field is `POSEDGE`"]
167 #[inline(always)]
168 pub fn is_posedge(&self) -> bool {
169 *self == SETIF_A::POSEDGE
170 }
171 #[doc = "Checks if the value of the field is `NEGEDGE`"]
172 #[inline(always)]
173 pub fn is_negedge(&self) -> bool {
174 *self == SETIF_A::NEGEDGE
175 }
176 #[doc = "Checks if the value of the field is `BOTHEDGES`"]
177 #[inline(always)]
178 pub fn is_bothedges(&self) -> bool {
179 *self == SETIF_A::BOTHEDGES
180 }
181}
182#[doc = "Field `SETIF` writer - Enable Interrupt Generation"]
183pub type SETIF_W<'a, const O: u8> =
184 crate::FieldWriter<'a, u32, CH9_INTERACT_SPEC, u8, SETIF_A, 3, O>;
185impl<'a, const O: u8> SETIF_W<'a, O> {
186 #[doc = "No interrupt is generated"]
187 #[inline(always)]
188 pub fn none(self) -> &'a mut W {
189 self.variant(SETIF_A::NONE)
190 }
191 #[doc = "Set interrupt flag if the sensor triggers."]
192 #[inline(always)]
193 pub fn level(self) -> &'a mut W {
194 self.variant(SETIF_A::LEVEL)
195 }
196 #[doc = "Set interrupt flag on positive edge of the sensor state"]
197 #[inline(always)]
198 pub fn posedge(self) -> &'a mut W {
199 self.variant(SETIF_A::POSEDGE)
200 }
201 #[doc = "Set interrupt flag on negative edge of the sensor state"]
202 #[inline(always)]
203 pub fn negedge(self) -> &'a mut W {
204 self.variant(SETIF_A::NEGEDGE)
205 }
206 #[doc = "Set interrupt flag on both edges of the sensor state"]
207 #[inline(always)]
208 pub fn bothedges(self) -> &'a mut W {
209 self.variant(SETIF_A::BOTHEDGES)
210 }
211}
212#[doc = "Field `EXMODE` reader - Set GPIO Mode"]
213pub type EXMODE_R = crate::FieldReader<u8, EXMODE_A>;
214#[doc = "Set GPIO Mode\n\nValue on reset: 0"]
215#[derive(Clone, Copy, Debug, PartialEq, Eq)]
216#[repr(u8)]
217pub enum EXMODE_A {
218 #[doc = "0: Disabled"]
219 DISABLE = 0,
220 #[doc = "1: Push Pull, GPIO is driven high"]
221 HIGH = 1,
222 #[doc = "2: Push Pull, GPIO is driven low"]
223 LOW = 2,
224 #[doc = "3: VDAC output"]
225 DACOUT = 3,
226}
227impl From<EXMODE_A> for u8 {
228 #[inline(always)]
229 fn from(variant: EXMODE_A) -> Self {
230 variant as _
231 }
232}
233impl EXMODE_R {
234 #[doc = "Get enumerated values variant"]
235 #[inline(always)]
236 pub fn variant(&self) -> EXMODE_A {
237 match self.bits {
238 0 => EXMODE_A::DISABLE,
239 1 => EXMODE_A::HIGH,
240 2 => EXMODE_A::LOW,
241 3 => EXMODE_A::DACOUT,
242 _ => unreachable!(),
243 }
244 }
245 #[doc = "Checks if the value of the field is `DISABLE`"]
246 #[inline(always)]
247 pub fn is_disable(&self) -> bool {
248 *self == EXMODE_A::DISABLE
249 }
250 #[doc = "Checks if the value of the field is `HIGH`"]
251 #[inline(always)]
252 pub fn is_high(&self) -> bool {
253 *self == EXMODE_A::HIGH
254 }
255 #[doc = "Checks if the value of the field is `LOW`"]
256 #[inline(always)]
257 pub fn is_low(&self) -> bool {
258 *self == EXMODE_A::LOW
259 }
260 #[doc = "Checks if the value of the field is `DACOUT`"]
261 #[inline(always)]
262 pub fn is_dacout(&self) -> bool {
263 *self == EXMODE_A::DACOUT
264 }
265}
266#[doc = "Field `EXMODE` writer - Set GPIO Mode"]
267pub type EXMODE_W<'a, const O: u8> =
268 crate::FieldWriterSafe<'a, u32, CH9_INTERACT_SPEC, u8, EXMODE_A, 2, O>;
269impl<'a, const O: u8> EXMODE_W<'a, O> {
270 #[doc = "Disabled"]
271 #[inline(always)]
272 pub fn disable(self) -> &'a mut W {
273 self.variant(EXMODE_A::DISABLE)
274 }
275 #[doc = "Push Pull, GPIO is driven high"]
276 #[inline(always)]
277 pub fn high(self) -> &'a mut W {
278 self.variant(EXMODE_A::HIGH)
279 }
280 #[doc = "Push Pull, GPIO is driven low"]
281 #[inline(always)]
282 pub fn low(self) -> &'a mut W {
283 self.variant(EXMODE_A::LOW)
284 }
285 #[doc = "VDAC output"]
286 #[inline(always)]
287 pub fn dacout(self) -> &'a mut W {
288 self.variant(EXMODE_A::DACOUT)
289 }
290}
291#[doc = "Field `EXCLK` reader - Select Clock Used for Excitation Timing"]
292pub type EXCLK_R = crate::BitReader<bool>;
293#[doc = "Field `EXCLK` writer - Select Clock Used for Excitation Timing"]
294pub type EXCLK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH9_INTERACT_SPEC, bool, O>;
295#[doc = "Field `SAMPLECLK` reader - Select Clock Used for Timing of Sample Delay"]
296pub type SAMPLECLK_R = crate::BitReader<bool>;
297#[doc = "Field `SAMPLECLK` writer - Select Clock Used for Timing of Sample Delay"]
298pub type SAMPLECLK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH9_INTERACT_SPEC, bool, O>;
299#[doc = "Field `ALTEX` reader - Use Alternative Excite Pin"]
300pub type ALTEX_R = crate::BitReader<bool>;
301#[doc = "Field `ALTEX` writer - Use Alternative Excite Pin"]
302pub type ALTEX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CH9_INTERACT_SPEC, bool, O>;
303impl R {
304 #[doc = "Bits 0:11 - ACMP Threshold or VDAC Data"]
305 #[inline(always)]
306 pub fn thres(&self) -> THRES_R {
307 THRES_R::new((self.bits & 0x0fff) as u16)
308 }
309 #[doc = "Bits 12:13 - Select Sample Mode"]
310 #[inline(always)]
311 pub fn sample(&self) -> SAMPLE_R {
312 SAMPLE_R::new(((self.bits >> 12) & 3) as u8)
313 }
314 #[doc = "Bits 14:16 - Enable Interrupt Generation"]
315 #[inline(always)]
316 pub fn setif(&self) -> SETIF_R {
317 SETIF_R::new(((self.bits >> 14) & 7) as u8)
318 }
319 #[doc = "Bits 17:18 - Set GPIO Mode"]
320 #[inline(always)]
321 pub fn exmode(&self) -> EXMODE_R {
322 EXMODE_R::new(((self.bits >> 17) & 3) as u8)
323 }
324 #[doc = "Bit 19 - Select Clock Used for Excitation Timing"]
325 #[inline(always)]
326 pub fn exclk(&self) -> EXCLK_R {
327 EXCLK_R::new(((self.bits >> 19) & 1) != 0)
328 }
329 #[doc = "Bit 20 - Select Clock Used for Timing of Sample Delay"]
330 #[inline(always)]
331 pub fn sampleclk(&self) -> SAMPLECLK_R {
332 SAMPLECLK_R::new(((self.bits >> 20) & 1) != 0)
333 }
334 #[doc = "Bit 21 - Use Alternative Excite Pin"]
335 #[inline(always)]
336 pub fn altex(&self) -> ALTEX_R {
337 ALTEX_R::new(((self.bits >> 21) & 1) != 0)
338 }
339}
340impl W {
341 #[doc = "Bits 0:11 - ACMP Threshold or VDAC Data"]
342 #[inline(always)]
343 #[must_use]
344 pub fn thres(&mut self) -> THRES_W<0> {
345 THRES_W::new(self)
346 }
347 #[doc = "Bits 12:13 - Select Sample Mode"]
348 #[inline(always)]
349 #[must_use]
350 pub fn sample(&mut self) -> SAMPLE_W<12> {
351 SAMPLE_W::new(self)
352 }
353 #[doc = "Bits 14:16 - Enable Interrupt Generation"]
354 #[inline(always)]
355 #[must_use]
356 pub fn setif(&mut self) -> SETIF_W<14> {
357 SETIF_W::new(self)
358 }
359 #[doc = "Bits 17:18 - Set GPIO Mode"]
360 #[inline(always)]
361 #[must_use]
362 pub fn exmode(&mut self) -> EXMODE_W<17> {
363 EXMODE_W::new(self)
364 }
365 #[doc = "Bit 19 - Select Clock Used for Excitation Timing"]
366 #[inline(always)]
367 #[must_use]
368 pub fn exclk(&mut self) -> EXCLK_W<19> {
369 EXCLK_W::new(self)
370 }
371 #[doc = "Bit 20 - Select Clock Used for Timing of Sample Delay"]
372 #[inline(always)]
373 #[must_use]
374 pub fn sampleclk(&mut self) -> SAMPLECLK_W<20> {
375 SAMPLECLK_W::new(self)
376 }
377 #[doc = "Bit 21 - Use Alternative Excite Pin"]
378 #[inline(always)]
379 #[must_use]
380 pub fn altex(&mut self) -> ALTEX_W<21> {
381 ALTEX_W::new(self)
382 }
383 #[doc = "Writes raw bits to the register."]
384 #[inline(always)]
385 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
386 self.0.bits(bits);
387 self
388 }
389}
390#[doc = "Scan Configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ch9_interact](index.html) module"]
391pub struct CH9_INTERACT_SPEC;
392impl crate::RegisterSpec for CH9_INTERACT_SPEC {
393 type Ux = u32;
394}
395#[doc = "`read()` method returns [ch9_interact::R](R) reader structure"]
396impl crate::Readable for CH9_INTERACT_SPEC {
397 type Reader = R;
398}
399#[doc = "`write(|w| ..)` method takes [ch9_interact::W](W) writer structure"]
400impl crate::Writable for CH9_INTERACT_SPEC {
401 type Writer = W;
402 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
403 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
404}
405#[doc = "`reset()` method sets CH9_INTERACT to value 0"]
406impl crate::Resettable for CH9_INTERACT_SPEC {
407 const RESET_VALUE: Self::Ux = 0;
408}