efm32pg22_pac/efm32pg22c200/usart0_ns/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SYNC` reader - USART Synchronous Mode"]
38pub type SYNC_R = crate::BitReader<SYNC_A>;
39#[doc = "USART Synchronous Mode\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum SYNC_A {
42    #[doc = "0: The USART operates in asynchronous mode"]
43    DISABLE = 0,
44    #[doc = "1: The USART operates in synchronous mode"]
45    ENABLE = 1,
46}
47impl From<SYNC_A> for bool {
48    #[inline(always)]
49    fn from(variant: SYNC_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl SYNC_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> SYNC_A {
57        match self.bits {
58            false => SYNC_A::DISABLE,
59            true => SYNC_A::ENABLE,
60        }
61    }
62    #[doc = "Checks if the value of the field is `DISABLE`"]
63    #[inline(always)]
64    pub fn is_disable(&self) -> bool {
65        *self == SYNC_A::DISABLE
66    }
67    #[doc = "Checks if the value of the field is `ENABLE`"]
68    #[inline(always)]
69    pub fn is_enable(&self) -> bool {
70        *self == SYNC_A::ENABLE
71    }
72}
73#[doc = "Field `SYNC` writer - USART Synchronous Mode"]
74pub type SYNC_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, SYNC_A, O>;
75impl<'a, const O: u8> SYNC_W<'a, O> {
76    #[doc = "The USART operates in asynchronous mode"]
77    #[inline(always)]
78    pub fn disable(self) -> &'a mut W {
79        self.variant(SYNC_A::DISABLE)
80    }
81    #[doc = "The USART operates in synchronous mode"]
82    #[inline(always)]
83    pub fn enable(self) -> &'a mut W {
84        self.variant(SYNC_A::ENABLE)
85    }
86}
87#[doc = "Field `LOOPBK` reader - Loopback Enable"]
88pub type LOOPBK_R = crate::BitReader<LOOPBK_A>;
89#[doc = "Loopback Enable\n\nValue on reset: 0"]
90#[derive(Clone, Copy, Debug, PartialEq, Eq)]
91pub enum LOOPBK_A {
92    #[doc = "0: The receiver is connected to and receives data from U(S)n_RX"]
93    DISABLE = 0,
94    #[doc = "1: The receiver is connected to and receives data from U(S)n_TX"]
95    ENABLE = 1,
96}
97impl From<LOOPBK_A> for bool {
98    #[inline(always)]
99    fn from(variant: LOOPBK_A) -> Self {
100        variant as u8 != 0
101    }
102}
103impl LOOPBK_R {
104    #[doc = "Get enumerated values variant"]
105    #[inline(always)]
106    pub fn variant(&self) -> LOOPBK_A {
107        match self.bits {
108            false => LOOPBK_A::DISABLE,
109            true => LOOPBK_A::ENABLE,
110        }
111    }
112    #[doc = "Checks if the value of the field is `DISABLE`"]
113    #[inline(always)]
114    pub fn is_disable(&self) -> bool {
115        *self == LOOPBK_A::DISABLE
116    }
117    #[doc = "Checks if the value of the field is `ENABLE`"]
118    #[inline(always)]
119    pub fn is_enable(&self) -> bool {
120        *self == LOOPBK_A::ENABLE
121    }
122}
123#[doc = "Field `LOOPBK` writer - Loopback Enable"]
124pub type LOOPBK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, LOOPBK_A, O>;
125impl<'a, const O: u8> LOOPBK_W<'a, O> {
126    #[doc = "The receiver is connected to and receives data from U(S)n_RX"]
127    #[inline(always)]
128    pub fn disable(self) -> &'a mut W {
129        self.variant(LOOPBK_A::DISABLE)
130    }
131    #[doc = "The receiver is connected to and receives data from U(S)n_TX"]
132    #[inline(always)]
133    pub fn enable(self) -> &'a mut W {
134        self.variant(LOOPBK_A::ENABLE)
135    }
136}
137#[doc = "Field `CCEN` reader - Collision Check Enable"]
138pub type CCEN_R = crate::BitReader<CCEN_A>;
139#[doc = "Collision Check Enable\n\nValue on reset: 0"]
140#[derive(Clone, Copy, Debug, PartialEq, Eq)]
141pub enum CCEN_A {
142    #[doc = "0: Collision check is disabled"]
143    DISABLE = 0,
144    #[doc = "1: Collision check is enabled. The receiver must be enabled for the check to be performed"]
145    ENABLE = 1,
146}
147impl From<CCEN_A> for bool {
148    #[inline(always)]
149    fn from(variant: CCEN_A) -> Self {
150        variant as u8 != 0
151    }
152}
153impl CCEN_R {
154    #[doc = "Get enumerated values variant"]
155    #[inline(always)]
156    pub fn variant(&self) -> CCEN_A {
157        match self.bits {
158            false => CCEN_A::DISABLE,
159            true => CCEN_A::ENABLE,
160        }
161    }
162    #[doc = "Checks if the value of the field is `DISABLE`"]
163    #[inline(always)]
164    pub fn is_disable(&self) -> bool {
165        *self == CCEN_A::DISABLE
166    }
167    #[doc = "Checks if the value of the field is `ENABLE`"]
168    #[inline(always)]
169    pub fn is_enable(&self) -> bool {
170        *self == CCEN_A::ENABLE
171    }
172}
173#[doc = "Field `CCEN` writer - Collision Check Enable"]
174pub type CCEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CCEN_A, O>;
175impl<'a, const O: u8> CCEN_W<'a, O> {
176    #[doc = "Collision check is disabled"]
177    #[inline(always)]
178    pub fn disable(self) -> &'a mut W {
179        self.variant(CCEN_A::DISABLE)
180    }
181    #[doc = "Collision check is enabled. The receiver must be enabled for the check to be performed"]
182    #[inline(always)]
183    pub fn enable(self) -> &'a mut W {
184        self.variant(CCEN_A::ENABLE)
185    }
186}
187#[doc = "Field `MPM` reader - Multi-Processor Mode"]
188pub type MPM_R = crate::BitReader<MPM_A>;
189#[doc = "Multi-Processor Mode\n\nValue on reset: 0"]
190#[derive(Clone, Copy, Debug, PartialEq, Eq)]
191pub enum MPM_A {
192    #[doc = "0: The 9th bit of incoming frames has no special function"]
193    DISABLE = 0,
194    #[doc = "1: An incoming frame with the 9th bit equal to MPAB will be loaded into the receive buffer regardless of RXBLOCK and will result in the MPAB interrupt flag being set"]
195    ENABLE = 1,
196}
197impl From<MPM_A> for bool {
198    #[inline(always)]
199    fn from(variant: MPM_A) -> Self {
200        variant as u8 != 0
201    }
202}
203impl MPM_R {
204    #[doc = "Get enumerated values variant"]
205    #[inline(always)]
206    pub fn variant(&self) -> MPM_A {
207        match self.bits {
208            false => MPM_A::DISABLE,
209            true => MPM_A::ENABLE,
210        }
211    }
212    #[doc = "Checks if the value of the field is `DISABLE`"]
213    #[inline(always)]
214    pub fn is_disable(&self) -> bool {
215        *self == MPM_A::DISABLE
216    }
217    #[doc = "Checks if the value of the field is `ENABLE`"]
218    #[inline(always)]
219    pub fn is_enable(&self) -> bool {
220        *self == MPM_A::ENABLE
221    }
222}
223#[doc = "Field `MPM` writer - Multi-Processor Mode"]
224pub type MPM_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, MPM_A, O>;
225impl<'a, const O: u8> MPM_W<'a, O> {
226    #[doc = "The 9th bit of incoming frames has no special function"]
227    #[inline(always)]
228    pub fn disable(self) -> &'a mut W {
229        self.variant(MPM_A::DISABLE)
230    }
231    #[doc = "An incoming frame with the 9th bit equal to MPAB will be loaded into the receive buffer regardless of RXBLOCK and will result in the MPAB interrupt flag being set"]
232    #[inline(always)]
233    pub fn enable(self) -> &'a mut W {
234        self.variant(MPM_A::ENABLE)
235    }
236}
237#[doc = "Field `MPAB` reader - Multi-Processor Address-Bit"]
238pub type MPAB_R = crate::BitReader<bool>;
239#[doc = "Field `MPAB` writer - Multi-Processor Address-Bit"]
240pub type MPAB_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
241#[doc = "Field `OVS` reader - Oversampling"]
242pub type OVS_R = crate::FieldReader<u8, OVS_A>;
243#[doc = "Oversampling\n\nValue on reset: 0"]
244#[derive(Clone, Copy, Debug, PartialEq, Eq)]
245#[repr(u8)]
246pub enum OVS_A {
247    #[doc = "0: Regular UART mode with 16X oversampling in asynchronous mode"]
248    X16 = 0,
249    #[doc = "1: Double speed with 8X oversampling in asynchronous mode"]
250    X8 = 1,
251    #[doc = "2: 6X oversampling in asynchronous mode"]
252    X6 = 2,
253    #[doc = "3: Quadruple speed with 4X oversampling in asynchronous mode"]
254    X4 = 3,
255}
256impl From<OVS_A> for u8 {
257    #[inline(always)]
258    fn from(variant: OVS_A) -> Self {
259        variant as _
260    }
261}
262impl OVS_R {
263    #[doc = "Get enumerated values variant"]
264    #[inline(always)]
265    pub fn variant(&self) -> OVS_A {
266        match self.bits {
267            0 => OVS_A::X16,
268            1 => OVS_A::X8,
269            2 => OVS_A::X6,
270            3 => OVS_A::X4,
271            _ => unreachable!(),
272        }
273    }
274    #[doc = "Checks if the value of the field is `X16`"]
275    #[inline(always)]
276    pub fn is_x16(&self) -> bool {
277        *self == OVS_A::X16
278    }
279    #[doc = "Checks if the value of the field is `X8`"]
280    #[inline(always)]
281    pub fn is_x8(&self) -> bool {
282        *self == OVS_A::X8
283    }
284    #[doc = "Checks if the value of the field is `X6`"]
285    #[inline(always)]
286    pub fn is_x6(&self) -> bool {
287        *self == OVS_A::X6
288    }
289    #[doc = "Checks if the value of the field is `X4`"]
290    #[inline(always)]
291    pub fn is_x4(&self) -> bool {
292        *self == OVS_A::X4
293    }
294}
295#[doc = "Field `OVS` writer - Oversampling"]
296pub type OVS_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CTRL_SPEC, u8, OVS_A, 2, O>;
297impl<'a, const O: u8> OVS_W<'a, O> {
298    #[doc = "Regular UART mode with 16X oversampling in asynchronous mode"]
299    #[inline(always)]
300    pub fn x16(self) -> &'a mut W {
301        self.variant(OVS_A::X16)
302    }
303    #[doc = "Double speed with 8X oversampling in asynchronous mode"]
304    #[inline(always)]
305    pub fn x8(self) -> &'a mut W {
306        self.variant(OVS_A::X8)
307    }
308    #[doc = "6X oversampling in asynchronous mode"]
309    #[inline(always)]
310    pub fn x6(self) -> &'a mut W {
311        self.variant(OVS_A::X6)
312    }
313    #[doc = "Quadruple speed with 4X oversampling in asynchronous mode"]
314    #[inline(always)]
315    pub fn x4(self) -> &'a mut W {
316        self.variant(OVS_A::X4)
317    }
318}
319#[doc = "Field `CLKPOL` reader - Clock Polarity"]
320pub type CLKPOL_R = crate::BitReader<CLKPOL_A>;
321#[doc = "Clock Polarity\n\nValue on reset: 0"]
322#[derive(Clone, Copy, Debug, PartialEq, Eq)]
323pub enum CLKPOL_A {
324    #[doc = "0: The bus clock used in synchronous mode has a low base value"]
325    IDLELOW = 0,
326    #[doc = "1: The bus clock used in synchronous mode has a high base value"]
327    IDLEHIGH = 1,
328}
329impl From<CLKPOL_A> for bool {
330    #[inline(always)]
331    fn from(variant: CLKPOL_A) -> Self {
332        variant as u8 != 0
333    }
334}
335impl CLKPOL_R {
336    #[doc = "Get enumerated values variant"]
337    #[inline(always)]
338    pub fn variant(&self) -> CLKPOL_A {
339        match self.bits {
340            false => CLKPOL_A::IDLELOW,
341            true => CLKPOL_A::IDLEHIGH,
342        }
343    }
344    #[doc = "Checks if the value of the field is `IDLELOW`"]
345    #[inline(always)]
346    pub fn is_idlelow(&self) -> bool {
347        *self == CLKPOL_A::IDLELOW
348    }
349    #[doc = "Checks if the value of the field is `IDLEHIGH`"]
350    #[inline(always)]
351    pub fn is_idlehigh(&self) -> bool {
352        *self == CLKPOL_A::IDLEHIGH
353    }
354}
355#[doc = "Field `CLKPOL` writer - Clock Polarity"]
356pub type CLKPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CLKPOL_A, O>;
357impl<'a, const O: u8> CLKPOL_W<'a, O> {
358    #[doc = "The bus clock used in synchronous mode has a low base value"]
359    #[inline(always)]
360    pub fn idlelow(self) -> &'a mut W {
361        self.variant(CLKPOL_A::IDLELOW)
362    }
363    #[doc = "The bus clock used in synchronous mode has a high base value"]
364    #[inline(always)]
365    pub fn idlehigh(self) -> &'a mut W {
366        self.variant(CLKPOL_A::IDLEHIGH)
367    }
368}
369#[doc = "Field `CLKPHA` reader - Clock Edge For Setup/Sample"]
370pub type CLKPHA_R = crate::BitReader<CLKPHA_A>;
371#[doc = "Clock Edge For Setup/Sample\n\nValue on reset: 0"]
372#[derive(Clone, Copy, Debug, PartialEq, Eq)]
373pub enum CLKPHA_A {
374    #[doc = "0: Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"]
375    SAMPLELEADING = 0,
376    #[doc = "1: Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"]
377    SAMPLETRAILING = 1,
378}
379impl From<CLKPHA_A> for bool {
380    #[inline(always)]
381    fn from(variant: CLKPHA_A) -> Self {
382        variant as u8 != 0
383    }
384}
385impl CLKPHA_R {
386    #[doc = "Get enumerated values variant"]
387    #[inline(always)]
388    pub fn variant(&self) -> CLKPHA_A {
389        match self.bits {
390            false => CLKPHA_A::SAMPLELEADING,
391            true => CLKPHA_A::SAMPLETRAILING,
392        }
393    }
394    #[doc = "Checks if the value of the field is `SAMPLELEADING`"]
395    #[inline(always)]
396    pub fn is_sampleleading(&self) -> bool {
397        *self == CLKPHA_A::SAMPLELEADING
398    }
399    #[doc = "Checks if the value of the field is `SAMPLETRAILING`"]
400    #[inline(always)]
401    pub fn is_sampletrailing(&self) -> bool {
402        *self == CLKPHA_A::SAMPLETRAILING
403    }
404}
405#[doc = "Field `CLKPHA` writer - Clock Edge For Setup/Sample"]
406pub type CLKPHA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CLKPHA_A, O>;
407impl<'a, const O: u8> CLKPHA_W<'a, O> {
408    #[doc = "Data is sampled on the leading edge and set-up on the trailing edge of the bus clock in synchronous mode"]
409    #[inline(always)]
410    pub fn sampleleading(self) -> &'a mut W {
411        self.variant(CLKPHA_A::SAMPLELEADING)
412    }
413    #[doc = "Data is set-up on the leading edge and sampled on the trailing edge of the bus clock in synchronous mode"]
414    #[inline(always)]
415    pub fn sampletrailing(self) -> &'a mut W {
416        self.variant(CLKPHA_A::SAMPLETRAILING)
417    }
418}
419#[doc = "Field `MSBF` reader - Most Significant Bit First"]
420pub type MSBF_R = crate::BitReader<MSBF_A>;
421#[doc = "Most Significant Bit First\n\nValue on reset: 0"]
422#[derive(Clone, Copy, Debug, PartialEq, Eq)]
423pub enum MSBF_A {
424    #[doc = "0: Data is sent with the least significant bit first"]
425    DISABLE = 0,
426    #[doc = "1: Data is sent with the most significant bit first"]
427    ENABLE = 1,
428}
429impl From<MSBF_A> for bool {
430    #[inline(always)]
431    fn from(variant: MSBF_A) -> Self {
432        variant as u8 != 0
433    }
434}
435impl MSBF_R {
436    #[doc = "Get enumerated values variant"]
437    #[inline(always)]
438    pub fn variant(&self) -> MSBF_A {
439        match self.bits {
440            false => MSBF_A::DISABLE,
441            true => MSBF_A::ENABLE,
442        }
443    }
444    #[doc = "Checks if the value of the field is `DISABLE`"]
445    #[inline(always)]
446    pub fn is_disable(&self) -> bool {
447        *self == MSBF_A::DISABLE
448    }
449    #[doc = "Checks if the value of the field is `ENABLE`"]
450    #[inline(always)]
451    pub fn is_enable(&self) -> bool {
452        *self == MSBF_A::ENABLE
453    }
454}
455#[doc = "Field `MSBF` writer - Most Significant Bit First"]
456pub type MSBF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, MSBF_A, O>;
457impl<'a, const O: u8> MSBF_W<'a, O> {
458    #[doc = "Data is sent with the least significant bit first"]
459    #[inline(always)]
460    pub fn disable(self) -> &'a mut W {
461        self.variant(MSBF_A::DISABLE)
462    }
463    #[doc = "Data is sent with the most significant bit first"]
464    #[inline(always)]
465    pub fn enable(self) -> &'a mut W {
466        self.variant(MSBF_A::ENABLE)
467    }
468}
469#[doc = "Field `CSMA` reader - Action On Chip Select In Main Mode"]
470pub type CSMA_R = crate::BitReader<CSMA_A>;
471#[doc = "Action On Chip Select In Main Mode\n\nValue on reset: 0"]
472#[derive(Clone, Copy, Debug, PartialEq, Eq)]
473pub enum CSMA_A {
474    #[doc = "0: No action taken"]
475    NOACTION = 0,
476    #[doc = "1: Go to secondary mode"]
477    GOTOSLAVEMODE = 1,
478}
479impl From<CSMA_A> for bool {
480    #[inline(always)]
481    fn from(variant: CSMA_A) -> Self {
482        variant as u8 != 0
483    }
484}
485impl CSMA_R {
486    #[doc = "Get enumerated values variant"]
487    #[inline(always)]
488    pub fn variant(&self) -> CSMA_A {
489        match self.bits {
490            false => CSMA_A::NOACTION,
491            true => CSMA_A::GOTOSLAVEMODE,
492        }
493    }
494    #[doc = "Checks if the value of the field is `NOACTION`"]
495    #[inline(always)]
496    pub fn is_noaction(&self) -> bool {
497        *self == CSMA_A::NOACTION
498    }
499    #[doc = "Checks if the value of the field is `GOTOSLAVEMODE`"]
500    #[inline(always)]
501    pub fn is_gotoslavemode(&self) -> bool {
502        *self == CSMA_A::GOTOSLAVEMODE
503    }
504}
505#[doc = "Field `CSMA` writer - Action On Chip Select In Main Mode"]
506pub type CSMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CSMA_A, O>;
507impl<'a, const O: u8> CSMA_W<'a, O> {
508    #[doc = "No action taken"]
509    #[inline(always)]
510    pub fn noaction(self) -> &'a mut W {
511        self.variant(CSMA_A::NOACTION)
512    }
513    #[doc = "Go to secondary mode"]
514    #[inline(always)]
515    pub fn gotoslavemode(self) -> &'a mut W {
516        self.variant(CSMA_A::GOTOSLAVEMODE)
517    }
518}
519#[doc = "Field `TXBIL` reader - TX Buffer Interrupt Level"]
520pub type TXBIL_R = crate::BitReader<TXBIL_A>;
521#[doc = "TX Buffer Interrupt Level\n\nValue on reset: 0"]
522#[derive(Clone, Copy, Debug, PartialEq, Eq)]
523pub enum TXBIL_A {
524    #[doc = "0: TXBL and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."]
525    EMPTY = 0,
526    #[doc = "1: TXBL and TXBLIF are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full."]
527    HALFFULL = 1,
528}
529impl From<TXBIL_A> for bool {
530    #[inline(always)]
531    fn from(variant: TXBIL_A) -> Self {
532        variant as u8 != 0
533    }
534}
535impl TXBIL_R {
536    #[doc = "Get enumerated values variant"]
537    #[inline(always)]
538    pub fn variant(&self) -> TXBIL_A {
539        match self.bits {
540            false => TXBIL_A::EMPTY,
541            true => TXBIL_A::HALFFULL,
542        }
543    }
544    #[doc = "Checks if the value of the field is `EMPTY`"]
545    #[inline(always)]
546    pub fn is_empty(&self) -> bool {
547        *self == TXBIL_A::EMPTY
548    }
549    #[doc = "Checks if the value of the field is `HALFFULL`"]
550    #[inline(always)]
551    pub fn is_halffull(&self) -> bool {
552        *self == TXBIL_A::HALFFULL
553    }
554}
555#[doc = "Field `TXBIL` writer - TX Buffer Interrupt Level"]
556pub type TXBIL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, TXBIL_A, O>;
557impl<'a, const O: u8> TXBIL_W<'a, O> {
558    #[doc = "TXBL and the TXBL interrupt flag are set when the transmit buffer becomes empty. TXBL is cleared when the buffer becomes nonempty."]
559    #[inline(always)]
560    pub fn empty(self) -> &'a mut W {
561        self.variant(TXBIL_A::EMPTY)
562    }
563    #[doc = "TXBL and TXBLIF are set when the transmit buffer goes from full to half-full or empty. TXBL is cleared when the buffer becomes full."]
564    #[inline(always)]
565    pub fn halffull(self) -> &'a mut W {
566        self.variant(TXBIL_A::HALFFULL)
567    }
568}
569#[doc = "Field `RXINV` reader - Receiver Input Invert"]
570pub type RXINV_R = crate::BitReader<RXINV_A>;
571#[doc = "Receiver Input Invert\n\nValue on reset: 0"]
572#[derive(Clone, Copy, Debug, PartialEq, Eq)]
573pub enum RXINV_A {
574    #[doc = "0: Input is passed directly to the receiver"]
575    DISABLE = 0,
576    #[doc = "1: Input is inverted before it is passed to the receiver"]
577    ENABLE = 1,
578}
579impl From<RXINV_A> for bool {
580    #[inline(always)]
581    fn from(variant: RXINV_A) -> Self {
582        variant as u8 != 0
583    }
584}
585impl RXINV_R {
586    #[doc = "Get enumerated values variant"]
587    #[inline(always)]
588    pub fn variant(&self) -> RXINV_A {
589        match self.bits {
590            false => RXINV_A::DISABLE,
591            true => RXINV_A::ENABLE,
592        }
593    }
594    #[doc = "Checks if the value of the field is `DISABLE`"]
595    #[inline(always)]
596    pub fn is_disable(&self) -> bool {
597        *self == RXINV_A::DISABLE
598    }
599    #[doc = "Checks if the value of the field is `ENABLE`"]
600    #[inline(always)]
601    pub fn is_enable(&self) -> bool {
602        *self == RXINV_A::ENABLE
603    }
604}
605#[doc = "Field `RXINV` writer - Receiver Input Invert"]
606pub type RXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, RXINV_A, O>;
607impl<'a, const O: u8> RXINV_W<'a, O> {
608    #[doc = "Input is passed directly to the receiver"]
609    #[inline(always)]
610    pub fn disable(self) -> &'a mut W {
611        self.variant(RXINV_A::DISABLE)
612    }
613    #[doc = "Input is inverted before it is passed to the receiver"]
614    #[inline(always)]
615    pub fn enable(self) -> &'a mut W {
616        self.variant(RXINV_A::ENABLE)
617    }
618}
619#[doc = "Field `TXINV` reader - Transmitter output Invert"]
620pub type TXINV_R = crate::BitReader<TXINV_A>;
621#[doc = "Transmitter output Invert\n\nValue on reset: 0"]
622#[derive(Clone, Copy, Debug, PartialEq, Eq)]
623pub enum TXINV_A {
624    #[doc = "0: Output from the transmitter is passed unchanged to U(S)n_TX"]
625    DISABLE = 0,
626    #[doc = "1: Output from the transmitter is inverted before it is passed to U(S)n_TX"]
627    ENABLE = 1,
628}
629impl From<TXINV_A> for bool {
630    #[inline(always)]
631    fn from(variant: TXINV_A) -> Self {
632        variant as u8 != 0
633    }
634}
635impl TXINV_R {
636    #[doc = "Get enumerated values variant"]
637    #[inline(always)]
638    pub fn variant(&self) -> TXINV_A {
639        match self.bits {
640            false => TXINV_A::DISABLE,
641            true => TXINV_A::ENABLE,
642        }
643    }
644    #[doc = "Checks if the value of the field is `DISABLE`"]
645    #[inline(always)]
646    pub fn is_disable(&self) -> bool {
647        *self == TXINV_A::DISABLE
648    }
649    #[doc = "Checks if the value of the field is `ENABLE`"]
650    #[inline(always)]
651    pub fn is_enable(&self) -> bool {
652        *self == TXINV_A::ENABLE
653    }
654}
655#[doc = "Field `TXINV` writer - Transmitter output Invert"]
656pub type TXINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, TXINV_A, O>;
657impl<'a, const O: u8> TXINV_W<'a, O> {
658    #[doc = "Output from the transmitter is passed unchanged to U(S)n_TX"]
659    #[inline(always)]
660    pub fn disable(self) -> &'a mut W {
661        self.variant(TXINV_A::DISABLE)
662    }
663    #[doc = "Output from the transmitter is inverted before it is passed to U(S)n_TX"]
664    #[inline(always)]
665    pub fn enable(self) -> &'a mut W {
666        self.variant(TXINV_A::ENABLE)
667    }
668}
669#[doc = "Field `CSINV` reader - Chip Select Invert"]
670pub type CSINV_R = crate::BitReader<CSINV_A>;
671#[doc = "Chip Select Invert\n\nValue on reset: 0"]
672#[derive(Clone, Copy, Debug, PartialEq, Eq)]
673pub enum CSINV_A {
674    #[doc = "0: Chip select is active low"]
675    DISABLE = 0,
676    #[doc = "1: Chip select is active high"]
677    ENABLE = 1,
678}
679impl From<CSINV_A> for bool {
680    #[inline(always)]
681    fn from(variant: CSINV_A) -> Self {
682        variant as u8 != 0
683    }
684}
685impl CSINV_R {
686    #[doc = "Get enumerated values variant"]
687    #[inline(always)]
688    pub fn variant(&self) -> CSINV_A {
689        match self.bits {
690            false => CSINV_A::DISABLE,
691            true => CSINV_A::ENABLE,
692        }
693    }
694    #[doc = "Checks if the value of the field is `DISABLE`"]
695    #[inline(always)]
696    pub fn is_disable(&self) -> bool {
697        *self == CSINV_A::DISABLE
698    }
699    #[doc = "Checks if the value of the field is `ENABLE`"]
700    #[inline(always)]
701    pub fn is_enable(&self) -> bool {
702        *self == CSINV_A::ENABLE
703    }
704}
705#[doc = "Field `CSINV` writer - Chip Select Invert"]
706pub type CSINV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, CSINV_A, O>;
707impl<'a, const O: u8> CSINV_W<'a, O> {
708    #[doc = "Chip select is active low"]
709    #[inline(always)]
710    pub fn disable(self) -> &'a mut W {
711        self.variant(CSINV_A::DISABLE)
712    }
713    #[doc = "Chip select is active high"]
714    #[inline(always)]
715    pub fn enable(self) -> &'a mut W {
716        self.variant(CSINV_A::ENABLE)
717    }
718}
719#[doc = "Field `AUTOCS` reader - Automatic Chip Select"]
720pub type AUTOCS_R = crate::BitReader<bool>;
721#[doc = "Field `AUTOCS` writer - Automatic Chip Select"]
722pub type AUTOCS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
723#[doc = "Field `AUTOTRI` reader - Automatic TX Tristate"]
724pub type AUTOTRI_R = crate::BitReader<AUTOTRI_A>;
725#[doc = "Automatic TX Tristate\n\nValue on reset: 0"]
726#[derive(Clone, Copy, Debug, PartialEq, Eq)]
727pub enum AUTOTRI_A {
728    #[doc = "0: The output on U(S)n_TX when the transmitter is idle is defined by TXINV"]
729    DISABLE = 0,
730    #[doc = "1: U(S)n_TX is tristated whenever the transmitter is idle"]
731    ENABLE = 1,
732}
733impl From<AUTOTRI_A> for bool {
734    #[inline(always)]
735    fn from(variant: AUTOTRI_A) -> Self {
736        variant as u8 != 0
737    }
738}
739impl AUTOTRI_R {
740    #[doc = "Get enumerated values variant"]
741    #[inline(always)]
742    pub fn variant(&self) -> AUTOTRI_A {
743        match self.bits {
744            false => AUTOTRI_A::DISABLE,
745            true => AUTOTRI_A::ENABLE,
746        }
747    }
748    #[doc = "Checks if the value of the field is `DISABLE`"]
749    #[inline(always)]
750    pub fn is_disable(&self) -> bool {
751        *self == AUTOTRI_A::DISABLE
752    }
753    #[doc = "Checks if the value of the field is `ENABLE`"]
754    #[inline(always)]
755    pub fn is_enable(&self) -> bool {
756        *self == AUTOTRI_A::ENABLE
757    }
758}
759#[doc = "Field `AUTOTRI` writer - Automatic TX Tristate"]
760pub type AUTOTRI_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, AUTOTRI_A, O>;
761impl<'a, const O: u8> AUTOTRI_W<'a, O> {
762    #[doc = "The output on U(S)n_TX when the transmitter is idle is defined by TXINV"]
763    #[inline(always)]
764    pub fn disable(self) -> &'a mut W {
765        self.variant(AUTOTRI_A::DISABLE)
766    }
767    #[doc = "U(S)n_TX is tristated whenever the transmitter is idle"]
768    #[inline(always)]
769    pub fn enable(self) -> &'a mut W {
770        self.variant(AUTOTRI_A::ENABLE)
771    }
772}
773#[doc = "Field `SCMODE` reader - SmartCard Mode"]
774pub type SCMODE_R = crate::BitReader<bool>;
775#[doc = "Field `SCMODE` writer - SmartCard Mode"]
776pub type SCMODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
777#[doc = "Field `SCRETRANS` reader - SmartCard Retransmit"]
778pub type SCRETRANS_R = crate::BitReader<bool>;
779#[doc = "Field `SCRETRANS` writer - SmartCard Retransmit"]
780pub type SCRETRANS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
781#[doc = "Field `SKIPPERRF` reader - Skip Parity Error Frames"]
782pub type SKIPPERRF_R = crate::BitReader<bool>;
783#[doc = "Field `SKIPPERRF` writer - Skip Parity Error Frames"]
784pub type SKIPPERRF_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
785#[doc = "Field `BIT8DV` reader - Bit 8 Default Value"]
786pub type BIT8DV_R = crate::BitReader<bool>;
787#[doc = "Field `BIT8DV` writer - Bit 8 Default Value"]
788pub type BIT8DV_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
789#[doc = "Field `ERRSDMA` reader - Halt DMA On Error"]
790pub type ERRSDMA_R = crate::BitReader<ERRSDMA_A>;
791#[doc = "Halt DMA On Error\n\nValue on reset: 0"]
792#[derive(Clone, Copy, Debug, PartialEq, Eq)]
793pub enum ERRSDMA_A {
794    #[doc = "0: Framing and parity errors have no effect on DMA requests from the USART"]
795    DISABLE = 0,
796    #[doc = "1: DMA requests from the USART are blocked while the PERR or FERR interrupt flags are set"]
797    ENABLE = 1,
798}
799impl From<ERRSDMA_A> for bool {
800    #[inline(always)]
801    fn from(variant: ERRSDMA_A) -> Self {
802        variant as u8 != 0
803    }
804}
805impl ERRSDMA_R {
806    #[doc = "Get enumerated values variant"]
807    #[inline(always)]
808    pub fn variant(&self) -> ERRSDMA_A {
809        match self.bits {
810            false => ERRSDMA_A::DISABLE,
811            true => ERRSDMA_A::ENABLE,
812        }
813    }
814    #[doc = "Checks if the value of the field is `DISABLE`"]
815    #[inline(always)]
816    pub fn is_disable(&self) -> bool {
817        *self == ERRSDMA_A::DISABLE
818    }
819    #[doc = "Checks if the value of the field is `ENABLE`"]
820    #[inline(always)]
821    pub fn is_enable(&self) -> bool {
822        *self == ERRSDMA_A::ENABLE
823    }
824}
825#[doc = "Field `ERRSDMA` writer - Halt DMA On Error"]
826pub type ERRSDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, ERRSDMA_A, O>;
827impl<'a, const O: u8> ERRSDMA_W<'a, O> {
828    #[doc = "Framing and parity errors have no effect on DMA requests from the USART"]
829    #[inline(always)]
830    pub fn disable(self) -> &'a mut W {
831        self.variant(ERRSDMA_A::DISABLE)
832    }
833    #[doc = "DMA requests from the USART are blocked while the PERR or FERR interrupt flags are set"]
834    #[inline(always)]
835    pub fn enable(self) -> &'a mut W {
836        self.variant(ERRSDMA_A::ENABLE)
837    }
838}
839#[doc = "Field `ERRSRX` reader - Disable RX On Error"]
840pub type ERRSRX_R = crate::BitReader<ERRSRX_A>;
841#[doc = "Disable RX On Error\n\nValue on reset: 0"]
842#[derive(Clone, Copy, Debug, PartialEq, Eq)]
843pub enum ERRSRX_A {
844    #[doc = "0: Framing and parity errors have no effect on receiver"]
845    DISABLE = 0,
846    #[doc = "1: Framing and parity errors disable the receiver"]
847    ENABLE = 1,
848}
849impl From<ERRSRX_A> for bool {
850    #[inline(always)]
851    fn from(variant: ERRSRX_A) -> Self {
852        variant as u8 != 0
853    }
854}
855impl ERRSRX_R {
856    #[doc = "Get enumerated values variant"]
857    #[inline(always)]
858    pub fn variant(&self) -> ERRSRX_A {
859        match self.bits {
860            false => ERRSRX_A::DISABLE,
861            true => ERRSRX_A::ENABLE,
862        }
863    }
864    #[doc = "Checks if the value of the field is `DISABLE`"]
865    #[inline(always)]
866    pub fn is_disable(&self) -> bool {
867        *self == ERRSRX_A::DISABLE
868    }
869    #[doc = "Checks if the value of the field is `ENABLE`"]
870    #[inline(always)]
871    pub fn is_enable(&self) -> bool {
872        *self == ERRSRX_A::ENABLE
873    }
874}
875#[doc = "Field `ERRSRX` writer - Disable RX On Error"]
876pub type ERRSRX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, ERRSRX_A, O>;
877impl<'a, const O: u8> ERRSRX_W<'a, O> {
878    #[doc = "Framing and parity errors have no effect on receiver"]
879    #[inline(always)]
880    pub fn disable(self) -> &'a mut W {
881        self.variant(ERRSRX_A::DISABLE)
882    }
883    #[doc = "Framing and parity errors disable the receiver"]
884    #[inline(always)]
885    pub fn enable(self) -> &'a mut W {
886        self.variant(ERRSRX_A::ENABLE)
887    }
888}
889#[doc = "Field `ERRSTX` reader - Disable TX On Error"]
890pub type ERRSTX_R = crate::BitReader<ERRSTX_A>;
891#[doc = "Disable TX On Error\n\nValue on reset: 0"]
892#[derive(Clone, Copy, Debug, PartialEq, Eq)]
893pub enum ERRSTX_A {
894    #[doc = "0: Received framing and parity errors have no effect on transmitter"]
895    DISABLE = 0,
896    #[doc = "1: Received framing and parity errors disable the transmitter"]
897    ENABLE = 1,
898}
899impl From<ERRSTX_A> for bool {
900    #[inline(always)]
901    fn from(variant: ERRSTX_A) -> Self {
902        variant as u8 != 0
903    }
904}
905impl ERRSTX_R {
906    #[doc = "Get enumerated values variant"]
907    #[inline(always)]
908    pub fn variant(&self) -> ERRSTX_A {
909        match self.bits {
910            false => ERRSTX_A::DISABLE,
911            true => ERRSTX_A::ENABLE,
912        }
913    }
914    #[doc = "Checks if the value of the field is `DISABLE`"]
915    #[inline(always)]
916    pub fn is_disable(&self) -> bool {
917        *self == ERRSTX_A::DISABLE
918    }
919    #[doc = "Checks if the value of the field is `ENABLE`"]
920    #[inline(always)]
921    pub fn is_enable(&self) -> bool {
922        *self == ERRSTX_A::ENABLE
923    }
924}
925#[doc = "Field `ERRSTX` writer - Disable TX On Error"]
926pub type ERRSTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, ERRSTX_A, O>;
927impl<'a, const O: u8> ERRSTX_W<'a, O> {
928    #[doc = "Received framing and parity errors have no effect on transmitter"]
929    #[inline(always)]
930    pub fn disable(self) -> &'a mut W {
931        self.variant(ERRSTX_A::DISABLE)
932    }
933    #[doc = "Received framing and parity errors disable the transmitter"]
934    #[inline(always)]
935    pub fn enable(self) -> &'a mut W {
936        self.variant(ERRSTX_A::ENABLE)
937    }
938}
939#[doc = "Field `SSSEARLY` reader - Synchronous Secondary Setup Early"]
940pub type SSSEARLY_R = crate::BitReader<bool>;
941#[doc = "Field `SSSEARLY` writer - Synchronous Secondary Setup Early"]
942pub type SSSEARLY_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
943#[doc = "Field `BYTESWAP` reader - Byteswap In Double Accesses"]
944pub type BYTESWAP_R = crate::BitReader<BYTESWAP_A>;
945#[doc = "Byteswap In Double Accesses\n\nValue on reset: 0"]
946#[derive(Clone, Copy, Debug, PartialEq, Eq)]
947pub enum BYTESWAP_A {
948    #[doc = "0: Normal byte order"]
949    DISABLE = 0,
950    #[doc = "1: Byte order swapped"]
951    ENABLE = 1,
952}
953impl From<BYTESWAP_A> for bool {
954    #[inline(always)]
955    fn from(variant: BYTESWAP_A) -> Self {
956        variant as u8 != 0
957    }
958}
959impl BYTESWAP_R {
960    #[doc = "Get enumerated values variant"]
961    #[inline(always)]
962    pub fn variant(&self) -> BYTESWAP_A {
963        match self.bits {
964            false => BYTESWAP_A::DISABLE,
965            true => BYTESWAP_A::ENABLE,
966        }
967    }
968    #[doc = "Checks if the value of the field is `DISABLE`"]
969    #[inline(always)]
970    pub fn is_disable(&self) -> bool {
971        *self == BYTESWAP_A::DISABLE
972    }
973    #[doc = "Checks if the value of the field is `ENABLE`"]
974    #[inline(always)]
975    pub fn is_enable(&self) -> bool {
976        *self == BYTESWAP_A::ENABLE
977    }
978}
979#[doc = "Field `BYTESWAP` writer - Byteswap In Double Accesses"]
980pub type BYTESWAP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, BYTESWAP_A, O>;
981impl<'a, const O: u8> BYTESWAP_W<'a, O> {
982    #[doc = "Normal byte order"]
983    #[inline(always)]
984    pub fn disable(self) -> &'a mut W {
985        self.variant(BYTESWAP_A::DISABLE)
986    }
987    #[doc = "Byte order swapped"]
988    #[inline(always)]
989    pub fn enable(self) -> &'a mut W {
990        self.variant(BYTESWAP_A::ENABLE)
991    }
992}
993#[doc = "Field `AUTOTX` reader - Always Transmit When RX Not Full"]
994pub type AUTOTX_R = crate::BitReader<bool>;
995#[doc = "Field `AUTOTX` writer - Always Transmit When RX Not Full"]
996pub type AUTOTX_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
997#[doc = "Field `MVDIS` reader - Majority Vote Disable"]
998pub type MVDIS_R = crate::BitReader<bool>;
999#[doc = "Field `MVDIS` writer - Majority Vote Disable"]
1000pub type MVDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
1001#[doc = "Field `SMSDELAY` reader - Synchronous Main Sample Delay"]
1002pub type SMSDELAY_R = crate::BitReader<bool>;
1003#[doc = "Field `SMSDELAY` writer - Synchronous Main Sample Delay"]
1004pub type SMSDELAY_W<'a, const O: u8> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, O>;
1005impl R {
1006    #[doc = "Bit 0 - USART Synchronous Mode"]
1007    #[inline(always)]
1008    pub fn sync(&self) -> SYNC_R {
1009        SYNC_R::new((self.bits & 1) != 0)
1010    }
1011    #[doc = "Bit 1 - Loopback Enable"]
1012    #[inline(always)]
1013    pub fn loopbk(&self) -> LOOPBK_R {
1014        LOOPBK_R::new(((self.bits >> 1) & 1) != 0)
1015    }
1016    #[doc = "Bit 2 - Collision Check Enable"]
1017    #[inline(always)]
1018    pub fn ccen(&self) -> CCEN_R {
1019        CCEN_R::new(((self.bits >> 2) & 1) != 0)
1020    }
1021    #[doc = "Bit 3 - Multi-Processor Mode"]
1022    #[inline(always)]
1023    pub fn mpm(&self) -> MPM_R {
1024        MPM_R::new(((self.bits >> 3) & 1) != 0)
1025    }
1026    #[doc = "Bit 4 - Multi-Processor Address-Bit"]
1027    #[inline(always)]
1028    pub fn mpab(&self) -> MPAB_R {
1029        MPAB_R::new(((self.bits >> 4) & 1) != 0)
1030    }
1031    #[doc = "Bits 5:6 - Oversampling"]
1032    #[inline(always)]
1033    pub fn ovs(&self) -> OVS_R {
1034        OVS_R::new(((self.bits >> 5) & 3) as u8)
1035    }
1036    #[doc = "Bit 8 - Clock Polarity"]
1037    #[inline(always)]
1038    pub fn clkpol(&self) -> CLKPOL_R {
1039        CLKPOL_R::new(((self.bits >> 8) & 1) != 0)
1040    }
1041    #[doc = "Bit 9 - Clock Edge For Setup/Sample"]
1042    #[inline(always)]
1043    pub fn clkpha(&self) -> CLKPHA_R {
1044        CLKPHA_R::new(((self.bits >> 9) & 1) != 0)
1045    }
1046    #[doc = "Bit 10 - Most Significant Bit First"]
1047    #[inline(always)]
1048    pub fn msbf(&self) -> MSBF_R {
1049        MSBF_R::new(((self.bits >> 10) & 1) != 0)
1050    }
1051    #[doc = "Bit 11 - Action On Chip Select In Main Mode"]
1052    #[inline(always)]
1053    pub fn csma(&self) -> CSMA_R {
1054        CSMA_R::new(((self.bits >> 11) & 1) != 0)
1055    }
1056    #[doc = "Bit 12 - TX Buffer Interrupt Level"]
1057    #[inline(always)]
1058    pub fn txbil(&self) -> TXBIL_R {
1059        TXBIL_R::new(((self.bits >> 12) & 1) != 0)
1060    }
1061    #[doc = "Bit 13 - Receiver Input Invert"]
1062    #[inline(always)]
1063    pub fn rxinv(&self) -> RXINV_R {
1064        RXINV_R::new(((self.bits >> 13) & 1) != 0)
1065    }
1066    #[doc = "Bit 14 - Transmitter output Invert"]
1067    #[inline(always)]
1068    pub fn txinv(&self) -> TXINV_R {
1069        TXINV_R::new(((self.bits >> 14) & 1) != 0)
1070    }
1071    #[doc = "Bit 15 - Chip Select Invert"]
1072    #[inline(always)]
1073    pub fn csinv(&self) -> CSINV_R {
1074        CSINV_R::new(((self.bits >> 15) & 1) != 0)
1075    }
1076    #[doc = "Bit 16 - Automatic Chip Select"]
1077    #[inline(always)]
1078    pub fn autocs(&self) -> AUTOCS_R {
1079        AUTOCS_R::new(((self.bits >> 16) & 1) != 0)
1080    }
1081    #[doc = "Bit 17 - Automatic TX Tristate"]
1082    #[inline(always)]
1083    pub fn autotri(&self) -> AUTOTRI_R {
1084        AUTOTRI_R::new(((self.bits >> 17) & 1) != 0)
1085    }
1086    #[doc = "Bit 18 - SmartCard Mode"]
1087    #[inline(always)]
1088    pub fn scmode(&self) -> SCMODE_R {
1089        SCMODE_R::new(((self.bits >> 18) & 1) != 0)
1090    }
1091    #[doc = "Bit 19 - SmartCard Retransmit"]
1092    #[inline(always)]
1093    pub fn scretrans(&self) -> SCRETRANS_R {
1094        SCRETRANS_R::new(((self.bits >> 19) & 1) != 0)
1095    }
1096    #[doc = "Bit 20 - Skip Parity Error Frames"]
1097    #[inline(always)]
1098    pub fn skipperrf(&self) -> SKIPPERRF_R {
1099        SKIPPERRF_R::new(((self.bits >> 20) & 1) != 0)
1100    }
1101    #[doc = "Bit 21 - Bit 8 Default Value"]
1102    #[inline(always)]
1103    pub fn bit8dv(&self) -> BIT8DV_R {
1104        BIT8DV_R::new(((self.bits >> 21) & 1) != 0)
1105    }
1106    #[doc = "Bit 22 - Halt DMA On Error"]
1107    #[inline(always)]
1108    pub fn errsdma(&self) -> ERRSDMA_R {
1109        ERRSDMA_R::new(((self.bits >> 22) & 1) != 0)
1110    }
1111    #[doc = "Bit 23 - Disable RX On Error"]
1112    #[inline(always)]
1113    pub fn errsrx(&self) -> ERRSRX_R {
1114        ERRSRX_R::new(((self.bits >> 23) & 1) != 0)
1115    }
1116    #[doc = "Bit 24 - Disable TX On Error"]
1117    #[inline(always)]
1118    pub fn errstx(&self) -> ERRSTX_R {
1119        ERRSTX_R::new(((self.bits >> 24) & 1) != 0)
1120    }
1121    #[doc = "Bit 25 - Synchronous Secondary Setup Early"]
1122    #[inline(always)]
1123    pub fn sssearly(&self) -> SSSEARLY_R {
1124        SSSEARLY_R::new(((self.bits >> 25) & 1) != 0)
1125    }
1126    #[doc = "Bit 28 - Byteswap In Double Accesses"]
1127    #[inline(always)]
1128    pub fn byteswap(&self) -> BYTESWAP_R {
1129        BYTESWAP_R::new(((self.bits >> 28) & 1) != 0)
1130    }
1131    #[doc = "Bit 29 - Always Transmit When RX Not Full"]
1132    #[inline(always)]
1133    pub fn autotx(&self) -> AUTOTX_R {
1134        AUTOTX_R::new(((self.bits >> 29) & 1) != 0)
1135    }
1136    #[doc = "Bit 30 - Majority Vote Disable"]
1137    #[inline(always)]
1138    pub fn mvdis(&self) -> MVDIS_R {
1139        MVDIS_R::new(((self.bits >> 30) & 1) != 0)
1140    }
1141    #[doc = "Bit 31 - Synchronous Main Sample Delay"]
1142    #[inline(always)]
1143    pub fn smsdelay(&self) -> SMSDELAY_R {
1144        SMSDELAY_R::new(((self.bits >> 31) & 1) != 0)
1145    }
1146}
1147impl W {
1148    #[doc = "Bit 0 - USART Synchronous Mode"]
1149    #[inline(always)]
1150    #[must_use]
1151    pub fn sync(&mut self) -> SYNC_W<0> {
1152        SYNC_W::new(self)
1153    }
1154    #[doc = "Bit 1 - Loopback Enable"]
1155    #[inline(always)]
1156    #[must_use]
1157    pub fn loopbk(&mut self) -> LOOPBK_W<1> {
1158        LOOPBK_W::new(self)
1159    }
1160    #[doc = "Bit 2 - Collision Check Enable"]
1161    #[inline(always)]
1162    #[must_use]
1163    pub fn ccen(&mut self) -> CCEN_W<2> {
1164        CCEN_W::new(self)
1165    }
1166    #[doc = "Bit 3 - Multi-Processor Mode"]
1167    #[inline(always)]
1168    #[must_use]
1169    pub fn mpm(&mut self) -> MPM_W<3> {
1170        MPM_W::new(self)
1171    }
1172    #[doc = "Bit 4 - Multi-Processor Address-Bit"]
1173    #[inline(always)]
1174    #[must_use]
1175    pub fn mpab(&mut self) -> MPAB_W<4> {
1176        MPAB_W::new(self)
1177    }
1178    #[doc = "Bits 5:6 - Oversampling"]
1179    #[inline(always)]
1180    #[must_use]
1181    pub fn ovs(&mut self) -> OVS_W<5> {
1182        OVS_W::new(self)
1183    }
1184    #[doc = "Bit 8 - Clock Polarity"]
1185    #[inline(always)]
1186    #[must_use]
1187    pub fn clkpol(&mut self) -> CLKPOL_W<8> {
1188        CLKPOL_W::new(self)
1189    }
1190    #[doc = "Bit 9 - Clock Edge For Setup/Sample"]
1191    #[inline(always)]
1192    #[must_use]
1193    pub fn clkpha(&mut self) -> CLKPHA_W<9> {
1194        CLKPHA_W::new(self)
1195    }
1196    #[doc = "Bit 10 - Most Significant Bit First"]
1197    #[inline(always)]
1198    #[must_use]
1199    pub fn msbf(&mut self) -> MSBF_W<10> {
1200        MSBF_W::new(self)
1201    }
1202    #[doc = "Bit 11 - Action On Chip Select In Main Mode"]
1203    #[inline(always)]
1204    #[must_use]
1205    pub fn csma(&mut self) -> CSMA_W<11> {
1206        CSMA_W::new(self)
1207    }
1208    #[doc = "Bit 12 - TX Buffer Interrupt Level"]
1209    #[inline(always)]
1210    #[must_use]
1211    pub fn txbil(&mut self) -> TXBIL_W<12> {
1212        TXBIL_W::new(self)
1213    }
1214    #[doc = "Bit 13 - Receiver Input Invert"]
1215    #[inline(always)]
1216    #[must_use]
1217    pub fn rxinv(&mut self) -> RXINV_W<13> {
1218        RXINV_W::new(self)
1219    }
1220    #[doc = "Bit 14 - Transmitter output Invert"]
1221    #[inline(always)]
1222    #[must_use]
1223    pub fn txinv(&mut self) -> TXINV_W<14> {
1224        TXINV_W::new(self)
1225    }
1226    #[doc = "Bit 15 - Chip Select Invert"]
1227    #[inline(always)]
1228    #[must_use]
1229    pub fn csinv(&mut self) -> CSINV_W<15> {
1230        CSINV_W::new(self)
1231    }
1232    #[doc = "Bit 16 - Automatic Chip Select"]
1233    #[inline(always)]
1234    #[must_use]
1235    pub fn autocs(&mut self) -> AUTOCS_W<16> {
1236        AUTOCS_W::new(self)
1237    }
1238    #[doc = "Bit 17 - Automatic TX Tristate"]
1239    #[inline(always)]
1240    #[must_use]
1241    pub fn autotri(&mut self) -> AUTOTRI_W<17> {
1242        AUTOTRI_W::new(self)
1243    }
1244    #[doc = "Bit 18 - SmartCard Mode"]
1245    #[inline(always)]
1246    #[must_use]
1247    pub fn scmode(&mut self) -> SCMODE_W<18> {
1248        SCMODE_W::new(self)
1249    }
1250    #[doc = "Bit 19 - SmartCard Retransmit"]
1251    #[inline(always)]
1252    #[must_use]
1253    pub fn scretrans(&mut self) -> SCRETRANS_W<19> {
1254        SCRETRANS_W::new(self)
1255    }
1256    #[doc = "Bit 20 - Skip Parity Error Frames"]
1257    #[inline(always)]
1258    #[must_use]
1259    pub fn skipperrf(&mut self) -> SKIPPERRF_W<20> {
1260        SKIPPERRF_W::new(self)
1261    }
1262    #[doc = "Bit 21 - Bit 8 Default Value"]
1263    #[inline(always)]
1264    #[must_use]
1265    pub fn bit8dv(&mut self) -> BIT8DV_W<21> {
1266        BIT8DV_W::new(self)
1267    }
1268    #[doc = "Bit 22 - Halt DMA On Error"]
1269    #[inline(always)]
1270    #[must_use]
1271    pub fn errsdma(&mut self) -> ERRSDMA_W<22> {
1272        ERRSDMA_W::new(self)
1273    }
1274    #[doc = "Bit 23 - Disable RX On Error"]
1275    #[inline(always)]
1276    #[must_use]
1277    pub fn errsrx(&mut self) -> ERRSRX_W<23> {
1278        ERRSRX_W::new(self)
1279    }
1280    #[doc = "Bit 24 - Disable TX On Error"]
1281    #[inline(always)]
1282    #[must_use]
1283    pub fn errstx(&mut self) -> ERRSTX_W<24> {
1284        ERRSTX_W::new(self)
1285    }
1286    #[doc = "Bit 25 - Synchronous Secondary Setup Early"]
1287    #[inline(always)]
1288    #[must_use]
1289    pub fn sssearly(&mut self) -> SSSEARLY_W<25> {
1290        SSSEARLY_W::new(self)
1291    }
1292    #[doc = "Bit 28 - Byteswap In Double Accesses"]
1293    #[inline(always)]
1294    #[must_use]
1295    pub fn byteswap(&mut self) -> BYTESWAP_W<28> {
1296        BYTESWAP_W::new(self)
1297    }
1298    #[doc = "Bit 29 - Always Transmit When RX Not Full"]
1299    #[inline(always)]
1300    #[must_use]
1301    pub fn autotx(&mut self) -> AUTOTX_W<29> {
1302        AUTOTX_W::new(self)
1303    }
1304    #[doc = "Bit 30 - Majority Vote Disable"]
1305    #[inline(always)]
1306    #[must_use]
1307    pub fn mvdis(&mut self) -> MVDIS_W<30> {
1308        MVDIS_W::new(self)
1309    }
1310    #[doc = "Bit 31 - Synchronous Main Sample Delay"]
1311    #[inline(always)]
1312    #[must_use]
1313    pub fn smsdelay(&mut self) -> SMSDELAY_W<31> {
1314        SMSDELAY_W::new(self)
1315    }
1316    #[doc = "Writes raw bits to the register."]
1317    #[inline(always)]
1318    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
1319        self.0.bits(bits);
1320        self
1321    }
1322}
1323#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
1324pub struct CTRL_SPEC;
1325impl crate::RegisterSpec for CTRL_SPEC {
1326    type Ux = u32;
1327}
1328#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
1329impl crate::Readable for CTRL_SPEC {
1330    type Reader = R;
1331}
1332#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
1333impl crate::Writable for CTRL_SPEC {
1334    type Writer = W;
1335    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
1336    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
1337}
1338#[doc = "`reset()` method sets CTRL to value 0"]
1339impl crate::Resettable for CTRL_SPEC {
1340    const RESET_VALUE: Self::Ux = 0;
1341}
efm32pg22_pac/efm32pg22c200/usart0_ns/ctrl.rs

efm32pg22_pac/efm32pg22c200/usart0_ns/
ctrl.rs
