efm32pg22_pac/efm32pg22c200/syscfg_ns/
dmem0eccaddr.rs

1#[doc = "Register `DMEM0ECCADDR` reader"]
2pub struct R(crate::R<DMEM0ECCADDR_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DMEM0ECCADDR_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DMEM0ECCADDR_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DMEM0ECCADDR_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `DMEM0ECCADDR` reader - DMEM0 RAM ECC Error Address"]
17pub type DMEM0ECCADDR_R = crate::FieldReader<u32, u32>;
18impl R {
19    #[doc = "Bits 0:31 - DMEM0 RAM ECC Error Address"]
20    #[inline(always)]
21    pub fn dmem0eccaddr(&self) -> DMEM0ECCADDR_R {
22        DMEM0ECCADDR_R::new(self.bits)
23    }
24}
25#[doc = "Read to get status of the DMEM0 ECC error address.\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dmem0eccaddr](index.html) module"]
26pub struct DMEM0ECCADDR_SPEC;
27impl crate::RegisterSpec for DMEM0ECCADDR_SPEC {
28    type Ux = u32;
29}
30#[doc = "`read()` method returns [dmem0eccaddr::R](R) reader structure"]
31impl crate::Readable for DMEM0ECCADDR_SPEC {
32    type Reader = R;
33}
34#[doc = "`reset()` method sets DMEM0ECCADDR to value 0"]
35impl crate::Resettable for DMEM0ECCADDR_SPEC {
36    const RESET_VALUE: Self::Ux = 0;
37}