efm32pg22_pac/efm32pg22c200/smu_s_cfgns/
ppunspatd0.rs1#[doc = "Register `PPUNSPATD0` reader"]
2pub struct R(crate::R<PPUNSPATD0_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<PPUNSPATD0_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<PPUNSPATD0_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<PPUNSPATD0_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `PPUNSPATD0` writer"]
17pub struct W(crate::W<PPUNSPATD0_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<PPUNSPATD0_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<PPUNSPATD0_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<PPUNSPATD0_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `EMU` reader - EMU Privileged Access"]
38pub type EMU_R = crate::BitReader<bool>;
39#[doc = "Field `EMU` writer - EMU Privileged Access"]
40pub type EMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
41#[doc = "Field `CMU` reader - CMU Privileged Access"]
42pub type CMU_R = crate::BitReader<bool>;
43#[doc = "Field `CMU` writer - CMU Privileged Access"]
44pub type CMU_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
45#[doc = "Field `HFXO0` reader - HFXO0 Privileged Access"]
46pub type HFXO0_R = crate::BitReader<bool>;
47#[doc = "Field `HFXO0` writer - HFXO0 Privileged Access"]
48pub type HFXO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
49#[doc = "Field `HFRCO0` reader - HFRCO0 Privileged Access"]
50pub type HFRCO0_R = crate::BitReader<bool>;
51#[doc = "Field `HFRCO0` writer - HFRCO0 Privileged Access"]
52pub type HFRCO0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
53#[doc = "Field `FSRCO` reader - FSRCO Privileged Access"]
54pub type FSRCO_R = crate::BitReader<bool>;
55#[doc = "Field `FSRCO` writer - FSRCO Privileged Access"]
56pub type FSRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
57#[doc = "Field `DPLL0` reader - DPLL0 Privileged Access"]
58pub type DPLL0_R = crate::BitReader<bool>;
59#[doc = "Field `DPLL0` writer - DPLL0 Privileged Access"]
60pub type DPLL0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
61#[doc = "Field `LFXO` reader - LFXO Privileged Access"]
62pub type LFXO_R = crate::BitReader<bool>;
63#[doc = "Field `LFXO` writer - LFXO Privileged Access"]
64pub type LFXO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
65#[doc = "Field `LFRCO` reader - LFRCO Privileged Access"]
66pub type LFRCO_R = crate::BitReader<bool>;
67#[doc = "Field `LFRCO` writer - LFRCO Privileged Access"]
68pub type LFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
69#[doc = "Field `ULFRCO` reader - ULFRCO Privileged Access"]
70pub type ULFRCO_R = crate::BitReader<bool>;
71#[doc = "Field `ULFRCO` writer - ULFRCO Privileged Access"]
72pub type ULFRCO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
73#[doc = "Field `MSC` reader - MSC Privileged Access"]
74pub type MSC_R = crate::BitReader<bool>;
75#[doc = "Field `MSC` writer - MSC Privileged Access"]
76pub type MSC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
77#[doc = "Field `ICACHE0` reader - ICACHE0 Privileged Access"]
78pub type ICACHE0_R = crate::BitReader<bool>;
79#[doc = "Field `ICACHE0` writer - ICACHE0 Privileged Access"]
80pub type ICACHE0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
81#[doc = "Field `PRS` reader - PRS Privileged Access"]
82pub type PRS_R = crate::BitReader<bool>;
83#[doc = "Field `PRS` writer - PRS Privileged Access"]
84pub type PRS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
85#[doc = "Field `GPIO` reader - GPIO Privileged Access"]
86pub type GPIO_R = crate::BitReader<bool>;
87#[doc = "Field `GPIO` writer - GPIO Privileged Access"]
88pub type GPIO_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
89#[doc = "Field `LDMA` reader - LDMA Privileged Access"]
90pub type LDMA_R = crate::BitReader<bool>;
91#[doc = "Field `LDMA` writer - LDMA Privileged Access"]
92pub type LDMA_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
93#[doc = "Field `LDMAXBAR` reader - LDMAXBAR Privileged Access"]
94pub type LDMAXBAR_R = crate::BitReader<bool>;
95#[doc = "Field `LDMAXBAR` writer - LDMAXBAR Privileged Access"]
96pub type LDMAXBAR_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
97#[doc = "Field `TIMER0` reader - TIMER0 Privileged Access"]
98pub type TIMER0_R = crate::BitReader<bool>;
99#[doc = "Field `TIMER0` writer - TIMER0 Privileged Access"]
100pub type TIMER0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
101#[doc = "Field `TIMER1` reader - TIMER1 Privileged Access"]
102pub type TIMER1_R = crate::BitReader<bool>;
103#[doc = "Field `TIMER1` writer - TIMER1 Privileged Access"]
104pub type TIMER1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
105#[doc = "Field `TIMER2` reader - TIMER2 Privileged Access"]
106pub type TIMER2_R = crate::BitReader<bool>;
107#[doc = "Field `TIMER2` writer - TIMER2 Privileged Access"]
108pub type TIMER2_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
109#[doc = "Field `TIMER3` reader - TIMER3 Privileged Access"]
110pub type TIMER3_R = crate::BitReader<bool>;
111#[doc = "Field `TIMER3` writer - TIMER3 Privileged Access"]
112pub type TIMER3_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
113#[doc = "Field `TIMER4` reader - TIMER4 Privileged Access"]
114pub type TIMER4_R = crate::BitReader<bool>;
115#[doc = "Field `TIMER4` writer - TIMER4 Privileged Access"]
116pub type TIMER4_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
117#[doc = "Field `USART0` reader - USART0 Privileged Access"]
118pub type USART0_R = crate::BitReader<bool>;
119#[doc = "Field `USART0` writer - USART0 Privileged Access"]
120pub type USART0_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
121#[doc = "Field `USART1` reader - USART1 Privileged Access"]
122pub type USART1_R = crate::BitReader<bool>;
123#[doc = "Field `USART1` writer - USART1 Privileged Access"]
124pub type USART1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
125#[doc = "Field `BURTC` reader - BURTC Privileged Access"]
126pub type BURTC_R = crate::BitReader<bool>;
127#[doc = "Field `BURTC` writer - BURTC Privileged Access"]
128pub type BURTC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
129#[doc = "Field `I2C1` reader - I2C1 Privileged Access"]
130pub type I2C1_R = crate::BitReader<bool>;
131#[doc = "Field `I2C1` writer - I2C1 Privileged Access"]
132pub type I2C1_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
133#[doc = "Field `CHIPTESTCTRL` reader - CHIPTESTCTRL Privileged Access"]
134pub type CHIPTESTCTRL_R = crate::BitReader<bool>;
135#[doc = "Field `CHIPTESTCTRL` writer - CHIPTESTCTRL Privileged Access"]
136pub type CHIPTESTCTRL_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
137#[doc = "Field `SYSCFGCFGNS` reader - SYSCFGCFGNS Privileged Access"]
138pub type SYSCFGCFGNS_R = crate::BitReader<bool>;
139#[doc = "Field `SYSCFGCFGNS` writer - SYSCFGCFGNS Privileged Access"]
140pub type SYSCFGCFGNS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
141#[doc = "Field `SYSCFG` reader - SYSCFG Privileged Access"]
142pub type SYSCFG_R = crate::BitReader<bool>;
143#[doc = "Field `SYSCFG` writer - SYSCFG Privileged Access"]
144pub type SYSCFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
145#[doc = "Field `BURAM` reader - BURAM Privileged Access"]
146pub type BURAM_R = crate::BitReader<bool>;
147#[doc = "Field `BURAM` writer - BURAM Privileged Access"]
148pub type BURAM_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
149#[doc = "Field `GPCRC` reader - GPCRC Privileged Access"]
150pub type GPCRC_R = crate::BitReader<bool>;
151#[doc = "Field `GPCRC` writer - GPCRC Privileged Access"]
152pub type GPCRC_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
153#[doc = "Field `DCI` reader - DCI Privileged Access"]
154pub type DCI_R = crate::BitReader<bool>;
155#[doc = "Field `DCI` writer - DCI Privileged Access"]
156pub type DCI_W<'a, const O: u8> = crate::BitWriter<'a, u32, PPUNSPATD0_SPEC, bool, O>;
157impl R {
158 #[doc = "Bit 1 - EMU Privileged Access"]
159 #[inline(always)]
160 pub fn emu(&self) -> EMU_R {
161 EMU_R::new(((self.bits >> 1) & 1) != 0)
162 }
163 #[doc = "Bit 2 - CMU Privileged Access"]
164 #[inline(always)]
165 pub fn cmu(&self) -> CMU_R {
166 CMU_R::new(((self.bits >> 2) & 1) != 0)
167 }
168 #[doc = "Bit 3 - HFXO0 Privileged Access"]
169 #[inline(always)]
170 pub fn hfxo0(&self) -> HFXO0_R {
171 HFXO0_R::new(((self.bits >> 3) & 1) != 0)
172 }
173 #[doc = "Bit 4 - HFRCO0 Privileged Access"]
174 #[inline(always)]
175 pub fn hfrco0(&self) -> HFRCO0_R {
176 HFRCO0_R::new(((self.bits >> 4) & 1) != 0)
177 }
178 #[doc = "Bit 5 - FSRCO Privileged Access"]
179 #[inline(always)]
180 pub fn fsrco(&self) -> FSRCO_R {
181 FSRCO_R::new(((self.bits >> 5) & 1) != 0)
182 }
183 #[doc = "Bit 6 - DPLL0 Privileged Access"]
184 #[inline(always)]
185 pub fn dpll0(&self) -> DPLL0_R {
186 DPLL0_R::new(((self.bits >> 6) & 1) != 0)
187 }
188 #[doc = "Bit 7 - LFXO Privileged Access"]
189 #[inline(always)]
190 pub fn lfxo(&self) -> LFXO_R {
191 LFXO_R::new(((self.bits >> 7) & 1) != 0)
192 }
193 #[doc = "Bit 8 - LFRCO Privileged Access"]
194 #[inline(always)]
195 pub fn lfrco(&self) -> LFRCO_R {
196 LFRCO_R::new(((self.bits >> 8) & 1) != 0)
197 }
198 #[doc = "Bit 9 - ULFRCO Privileged Access"]
199 #[inline(always)]
200 pub fn ulfrco(&self) -> ULFRCO_R {
201 ULFRCO_R::new(((self.bits >> 9) & 1) != 0)
202 }
203 #[doc = "Bit 10 - MSC Privileged Access"]
204 #[inline(always)]
205 pub fn msc(&self) -> MSC_R {
206 MSC_R::new(((self.bits >> 10) & 1) != 0)
207 }
208 #[doc = "Bit 11 - ICACHE0 Privileged Access"]
209 #[inline(always)]
210 pub fn icache0(&self) -> ICACHE0_R {
211 ICACHE0_R::new(((self.bits >> 11) & 1) != 0)
212 }
213 #[doc = "Bit 12 - PRS Privileged Access"]
214 #[inline(always)]
215 pub fn prs(&self) -> PRS_R {
216 PRS_R::new(((self.bits >> 12) & 1) != 0)
217 }
218 #[doc = "Bit 13 - GPIO Privileged Access"]
219 #[inline(always)]
220 pub fn gpio(&self) -> GPIO_R {
221 GPIO_R::new(((self.bits >> 13) & 1) != 0)
222 }
223 #[doc = "Bit 14 - LDMA Privileged Access"]
224 #[inline(always)]
225 pub fn ldma(&self) -> LDMA_R {
226 LDMA_R::new(((self.bits >> 14) & 1) != 0)
227 }
228 #[doc = "Bit 15 - LDMAXBAR Privileged Access"]
229 #[inline(always)]
230 pub fn ldmaxbar(&self) -> LDMAXBAR_R {
231 LDMAXBAR_R::new(((self.bits >> 15) & 1) != 0)
232 }
233 #[doc = "Bit 16 - TIMER0 Privileged Access"]
234 #[inline(always)]
235 pub fn timer0(&self) -> TIMER0_R {
236 TIMER0_R::new(((self.bits >> 16) & 1) != 0)
237 }
238 #[doc = "Bit 17 - TIMER1 Privileged Access"]
239 #[inline(always)]
240 pub fn timer1(&self) -> TIMER1_R {
241 TIMER1_R::new(((self.bits >> 17) & 1) != 0)
242 }
243 #[doc = "Bit 18 - TIMER2 Privileged Access"]
244 #[inline(always)]
245 pub fn timer2(&self) -> TIMER2_R {
246 TIMER2_R::new(((self.bits >> 18) & 1) != 0)
247 }
248 #[doc = "Bit 19 - TIMER3 Privileged Access"]
249 #[inline(always)]
250 pub fn timer3(&self) -> TIMER3_R {
251 TIMER3_R::new(((self.bits >> 19) & 1) != 0)
252 }
253 #[doc = "Bit 20 - TIMER4 Privileged Access"]
254 #[inline(always)]
255 pub fn timer4(&self) -> TIMER4_R {
256 TIMER4_R::new(((self.bits >> 20) & 1) != 0)
257 }
258 #[doc = "Bit 21 - USART0 Privileged Access"]
259 #[inline(always)]
260 pub fn usart0(&self) -> USART0_R {
261 USART0_R::new(((self.bits >> 21) & 1) != 0)
262 }
263 #[doc = "Bit 22 - USART1 Privileged Access"]
264 #[inline(always)]
265 pub fn usart1(&self) -> USART1_R {
266 USART1_R::new(((self.bits >> 22) & 1) != 0)
267 }
268 #[doc = "Bit 23 - BURTC Privileged Access"]
269 #[inline(always)]
270 pub fn burtc(&self) -> BURTC_R {
271 BURTC_R::new(((self.bits >> 23) & 1) != 0)
272 }
273 #[doc = "Bit 24 - I2C1 Privileged Access"]
274 #[inline(always)]
275 pub fn i2c1(&self) -> I2C1_R {
276 I2C1_R::new(((self.bits >> 24) & 1) != 0)
277 }
278 #[doc = "Bit 25 - CHIPTESTCTRL Privileged Access"]
279 #[inline(always)]
280 pub fn chiptestctrl(&self) -> CHIPTESTCTRL_R {
281 CHIPTESTCTRL_R::new(((self.bits >> 25) & 1) != 0)
282 }
283 #[doc = "Bit 26 - SYSCFGCFGNS Privileged Access"]
284 #[inline(always)]
285 pub fn syscfgcfgns(&self) -> SYSCFGCFGNS_R {
286 SYSCFGCFGNS_R::new(((self.bits >> 26) & 1) != 0)
287 }
288 #[doc = "Bit 27 - SYSCFG Privileged Access"]
289 #[inline(always)]
290 pub fn syscfg(&self) -> SYSCFG_R {
291 SYSCFG_R::new(((self.bits >> 27) & 1) != 0)
292 }
293 #[doc = "Bit 28 - BURAM Privileged Access"]
294 #[inline(always)]
295 pub fn buram(&self) -> BURAM_R {
296 BURAM_R::new(((self.bits >> 28) & 1) != 0)
297 }
298 #[doc = "Bit 30 - GPCRC Privileged Access"]
299 #[inline(always)]
300 pub fn gpcrc(&self) -> GPCRC_R {
301 GPCRC_R::new(((self.bits >> 30) & 1) != 0)
302 }
303 #[doc = "Bit 31 - DCI Privileged Access"]
304 #[inline(always)]
305 pub fn dci(&self) -> DCI_R {
306 DCI_R::new(((self.bits >> 31) & 1) != 0)
307 }
308}
309impl W {
310 #[doc = "Bit 1 - EMU Privileged Access"]
311 #[inline(always)]
312 #[must_use]
313 pub fn emu(&mut self) -> EMU_W<1> {
314 EMU_W::new(self)
315 }
316 #[doc = "Bit 2 - CMU Privileged Access"]
317 #[inline(always)]
318 #[must_use]
319 pub fn cmu(&mut self) -> CMU_W<2> {
320 CMU_W::new(self)
321 }
322 #[doc = "Bit 3 - HFXO0 Privileged Access"]
323 #[inline(always)]
324 #[must_use]
325 pub fn hfxo0(&mut self) -> HFXO0_W<3> {
326 HFXO0_W::new(self)
327 }
328 #[doc = "Bit 4 - HFRCO0 Privileged Access"]
329 #[inline(always)]
330 #[must_use]
331 pub fn hfrco0(&mut self) -> HFRCO0_W<4> {
332 HFRCO0_W::new(self)
333 }
334 #[doc = "Bit 5 - FSRCO Privileged Access"]
335 #[inline(always)]
336 #[must_use]
337 pub fn fsrco(&mut self) -> FSRCO_W<5> {
338 FSRCO_W::new(self)
339 }
340 #[doc = "Bit 6 - DPLL0 Privileged Access"]
341 #[inline(always)]
342 #[must_use]
343 pub fn dpll0(&mut self) -> DPLL0_W<6> {
344 DPLL0_W::new(self)
345 }
346 #[doc = "Bit 7 - LFXO Privileged Access"]
347 #[inline(always)]
348 #[must_use]
349 pub fn lfxo(&mut self) -> LFXO_W<7> {
350 LFXO_W::new(self)
351 }
352 #[doc = "Bit 8 - LFRCO Privileged Access"]
353 #[inline(always)]
354 #[must_use]
355 pub fn lfrco(&mut self) -> LFRCO_W<8> {
356 LFRCO_W::new(self)
357 }
358 #[doc = "Bit 9 - ULFRCO Privileged Access"]
359 #[inline(always)]
360 #[must_use]
361 pub fn ulfrco(&mut self) -> ULFRCO_W<9> {
362 ULFRCO_W::new(self)
363 }
364 #[doc = "Bit 10 - MSC Privileged Access"]
365 #[inline(always)]
366 #[must_use]
367 pub fn msc(&mut self) -> MSC_W<10> {
368 MSC_W::new(self)
369 }
370 #[doc = "Bit 11 - ICACHE0 Privileged Access"]
371 #[inline(always)]
372 #[must_use]
373 pub fn icache0(&mut self) -> ICACHE0_W<11> {
374 ICACHE0_W::new(self)
375 }
376 #[doc = "Bit 12 - PRS Privileged Access"]
377 #[inline(always)]
378 #[must_use]
379 pub fn prs(&mut self) -> PRS_W<12> {
380 PRS_W::new(self)
381 }
382 #[doc = "Bit 13 - GPIO Privileged Access"]
383 #[inline(always)]
384 #[must_use]
385 pub fn gpio(&mut self) -> GPIO_W<13> {
386 GPIO_W::new(self)
387 }
388 #[doc = "Bit 14 - LDMA Privileged Access"]
389 #[inline(always)]
390 #[must_use]
391 pub fn ldma(&mut self) -> LDMA_W<14> {
392 LDMA_W::new(self)
393 }
394 #[doc = "Bit 15 - LDMAXBAR Privileged Access"]
395 #[inline(always)]
396 #[must_use]
397 pub fn ldmaxbar(&mut self) -> LDMAXBAR_W<15> {
398 LDMAXBAR_W::new(self)
399 }
400 #[doc = "Bit 16 - TIMER0 Privileged Access"]
401 #[inline(always)]
402 #[must_use]
403 pub fn timer0(&mut self) -> TIMER0_W<16> {
404 TIMER0_W::new(self)
405 }
406 #[doc = "Bit 17 - TIMER1 Privileged Access"]
407 #[inline(always)]
408 #[must_use]
409 pub fn timer1(&mut self) -> TIMER1_W<17> {
410 TIMER1_W::new(self)
411 }
412 #[doc = "Bit 18 - TIMER2 Privileged Access"]
413 #[inline(always)]
414 #[must_use]
415 pub fn timer2(&mut self) -> TIMER2_W<18> {
416 TIMER2_W::new(self)
417 }
418 #[doc = "Bit 19 - TIMER3 Privileged Access"]
419 #[inline(always)]
420 #[must_use]
421 pub fn timer3(&mut self) -> TIMER3_W<19> {
422 TIMER3_W::new(self)
423 }
424 #[doc = "Bit 20 - TIMER4 Privileged Access"]
425 #[inline(always)]
426 #[must_use]
427 pub fn timer4(&mut self) -> TIMER4_W<20> {
428 TIMER4_W::new(self)
429 }
430 #[doc = "Bit 21 - USART0 Privileged Access"]
431 #[inline(always)]
432 #[must_use]
433 pub fn usart0(&mut self) -> USART0_W<21> {
434 USART0_W::new(self)
435 }
436 #[doc = "Bit 22 - USART1 Privileged Access"]
437 #[inline(always)]
438 #[must_use]
439 pub fn usart1(&mut self) -> USART1_W<22> {
440 USART1_W::new(self)
441 }
442 #[doc = "Bit 23 - BURTC Privileged Access"]
443 #[inline(always)]
444 #[must_use]
445 pub fn burtc(&mut self) -> BURTC_W<23> {
446 BURTC_W::new(self)
447 }
448 #[doc = "Bit 24 - I2C1 Privileged Access"]
449 #[inline(always)]
450 #[must_use]
451 pub fn i2c1(&mut self) -> I2C1_W<24> {
452 I2C1_W::new(self)
453 }
454 #[doc = "Bit 25 - CHIPTESTCTRL Privileged Access"]
455 #[inline(always)]
456 #[must_use]
457 pub fn chiptestctrl(&mut self) -> CHIPTESTCTRL_W<25> {
458 CHIPTESTCTRL_W::new(self)
459 }
460 #[doc = "Bit 26 - SYSCFGCFGNS Privileged Access"]
461 #[inline(always)]
462 #[must_use]
463 pub fn syscfgcfgns(&mut self) -> SYSCFGCFGNS_W<26> {
464 SYSCFGCFGNS_W::new(self)
465 }
466 #[doc = "Bit 27 - SYSCFG Privileged Access"]
467 #[inline(always)]
468 #[must_use]
469 pub fn syscfg(&mut self) -> SYSCFG_W<27> {
470 SYSCFG_W::new(self)
471 }
472 #[doc = "Bit 28 - BURAM Privileged Access"]
473 #[inline(always)]
474 #[must_use]
475 pub fn buram(&mut self) -> BURAM_W<28> {
476 BURAM_W::new(self)
477 }
478 #[doc = "Bit 30 - GPCRC Privileged Access"]
479 #[inline(always)]
480 #[must_use]
481 pub fn gpcrc(&mut self) -> GPCRC_W<30> {
482 GPCRC_W::new(self)
483 }
484 #[doc = "Bit 31 - DCI Privileged Access"]
485 #[inline(always)]
486 #[must_use]
487 pub fn dci(&mut self) -> DCI_W<31> {
488 DCI_W::new(self)
489 }
490 #[doc = "Writes raw bits to the register."]
491 #[inline(always)]
492 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
493 self.0.bits(bits);
494 self
495 }
496}
497#[doc = "Set peripheral bits to 1 to mark as privileged access only.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ppunspatd0](index.html) module"]
498pub struct PPUNSPATD0_SPEC;
499impl crate::RegisterSpec for PPUNSPATD0_SPEC {
500 type Ux = u32;
501}
502#[doc = "`read()` method returns [ppunspatd0::R](R) reader structure"]
503impl crate::Readable for PPUNSPATD0_SPEC {
504 type Reader = R;
505}
506#[doc = "`write(|w| ..)` method takes [ppunspatd0::W](W) writer structure"]
507impl crate::Writable for PPUNSPATD0_SPEC {
508 type Writer = W;
509 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
510 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
511}
512#[doc = "`reset()` method sets PPUNSPATD0 to value 0"]
513impl crate::Resettable for PPUNSPATD0_SPEC {
514 const RESET_VALUE: Self::Ux = 0;
515}