efm32pg22_pac/efm32pg22c200/rtcc_s/
cc1_ctrl.rs1#[doc = "Register `CC1_CTRL` reader"]
2pub struct R(crate::R<CC1_CTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CC1_CTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CC1_CTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CC1_CTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CC1_CTRL` writer"]
17pub struct W(crate::W<CC1_CTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CC1_CTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CC1_CTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CC1_CTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `MODE` reader - CC Channel Mode"]
38pub type MODE_R = crate::FieldReader<u8, MODE_A>;
39#[doc = "CC Channel Mode\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum MODE_A {
43 #[doc = "0: Compare/Capture channel turned off"]
44 OFF = 0,
45 #[doc = "1: Input capture"]
46 INPUTCAPTURE = 1,
47 #[doc = "2: Output compare"]
48 OUTPUTCOMPARE = 2,
49}
50impl From<MODE_A> for u8 {
51 #[inline(always)]
52 fn from(variant: MODE_A) -> Self {
53 variant as _
54 }
55}
56impl MODE_R {
57 #[doc = "Get enumerated values variant"]
58 #[inline(always)]
59 pub fn variant(&self) -> Option<MODE_A> {
60 match self.bits {
61 0 => Some(MODE_A::OFF),
62 1 => Some(MODE_A::INPUTCAPTURE),
63 2 => Some(MODE_A::OUTPUTCOMPARE),
64 _ => None,
65 }
66 }
67 #[doc = "Checks if the value of the field is `OFF`"]
68 #[inline(always)]
69 pub fn is_off(&self) -> bool {
70 *self == MODE_A::OFF
71 }
72 #[doc = "Checks if the value of the field is `INPUTCAPTURE`"]
73 #[inline(always)]
74 pub fn is_inputcapture(&self) -> bool {
75 *self == MODE_A::INPUTCAPTURE
76 }
77 #[doc = "Checks if the value of the field is `OUTPUTCOMPARE`"]
78 #[inline(always)]
79 pub fn is_outputcompare(&self) -> bool {
80 *self == MODE_A::OUTPUTCOMPARE
81 }
82}
83#[doc = "Field `MODE` writer - CC Channel Mode"]
84pub type MODE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CC1_CTRL_SPEC, u8, MODE_A, 2, O>;
85impl<'a, const O: u8> MODE_W<'a, O> {
86 #[doc = "Compare/Capture channel turned off"]
87 #[inline(always)]
88 pub fn off(self) -> &'a mut W {
89 self.variant(MODE_A::OFF)
90 }
91 #[doc = "Input capture"]
92 #[inline(always)]
93 pub fn inputcapture(self) -> &'a mut W {
94 self.variant(MODE_A::INPUTCAPTURE)
95 }
96 #[doc = "Output compare"]
97 #[inline(always)]
98 pub fn outputcompare(self) -> &'a mut W {
99 self.variant(MODE_A::OUTPUTCOMPARE)
100 }
101}
102#[doc = "Field `CMOA` reader - Compare Match Output Action"]
103pub type CMOA_R = crate::FieldReader<u8, CMOA_A>;
104#[doc = "Compare Match Output Action\n\nValue on reset: 0"]
105#[derive(Clone, Copy, Debug, PartialEq, Eq)]
106#[repr(u8)]
107pub enum CMOA_A {
108 #[doc = "0: A single clock cycle pulse is generated on output"]
109 PULSE = 0,
110 #[doc = "1: Toggle output on compare match"]
111 TOGGLE = 1,
112 #[doc = "2: Clear output on compare match"]
113 CLEAR = 2,
114 #[doc = "3: Set output on compare match"]
115 SET = 3,
116}
117impl From<CMOA_A> for u8 {
118 #[inline(always)]
119 fn from(variant: CMOA_A) -> Self {
120 variant as _
121 }
122}
123impl CMOA_R {
124 #[doc = "Get enumerated values variant"]
125 #[inline(always)]
126 pub fn variant(&self) -> CMOA_A {
127 match self.bits {
128 0 => CMOA_A::PULSE,
129 1 => CMOA_A::TOGGLE,
130 2 => CMOA_A::CLEAR,
131 3 => CMOA_A::SET,
132 _ => unreachable!(),
133 }
134 }
135 #[doc = "Checks if the value of the field is `PULSE`"]
136 #[inline(always)]
137 pub fn is_pulse(&self) -> bool {
138 *self == CMOA_A::PULSE
139 }
140 #[doc = "Checks if the value of the field is `TOGGLE`"]
141 #[inline(always)]
142 pub fn is_toggle(&self) -> bool {
143 *self == CMOA_A::TOGGLE
144 }
145 #[doc = "Checks if the value of the field is `CLEAR`"]
146 #[inline(always)]
147 pub fn is_clear(&self) -> bool {
148 *self == CMOA_A::CLEAR
149 }
150 #[doc = "Checks if the value of the field is `SET`"]
151 #[inline(always)]
152 pub fn is_set(&self) -> bool {
153 *self == CMOA_A::SET
154 }
155}
156#[doc = "Field `CMOA` writer - Compare Match Output Action"]
157pub type CMOA_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, CMOA_A, 2, O>;
158impl<'a, const O: u8> CMOA_W<'a, O> {
159 #[doc = "A single clock cycle pulse is generated on output"]
160 #[inline(always)]
161 pub fn pulse(self) -> &'a mut W {
162 self.variant(CMOA_A::PULSE)
163 }
164 #[doc = "Toggle output on compare match"]
165 #[inline(always)]
166 pub fn toggle(self) -> &'a mut W {
167 self.variant(CMOA_A::TOGGLE)
168 }
169 #[doc = "Clear output on compare match"]
170 #[inline(always)]
171 pub fn clear(self) -> &'a mut W {
172 self.variant(CMOA_A::CLEAR)
173 }
174 #[doc = "Set output on compare match"]
175 #[inline(always)]
176 pub fn set(self) -> &'a mut W {
177 self.variant(CMOA_A::SET)
178 }
179}
180#[doc = "Field `COMPBASE` reader - Capture compare channel comparison base."]
181pub type COMPBASE_R = crate::BitReader<COMPBASE_A>;
182#[doc = "Capture compare channel comparison base.\n\nValue on reset: 0"]
183#[derive(Clone, Copy, Debug, PartialEq, Eq)]
184pub enum COMPBASE_A {
185 #[doc = "0: RTCC_CCx_ICVALUE/OCVALUE is compared with CNT register."]
186 CNT = 0,
187 #[doc = "1: Least significant bits of RTCC_CCx_ICVALUE/OCVALUE are compared with COMBCNT."]
188 PRECNT = 1,
189}
190impl From<COMPBASE_A> for bool {
191 #[inline(always)]
192 fn from(variant: COMPBASE_A) -> Self {
193 variant as u8 != 0
194 }
195}
196impl COMPBASE_R {
197 #[doc = "Get enumerated values variant"]
198 #[inline(always)]
199 pub fn variant(&self) -> COMPBASE_A {
200 match self.bits {
201 false => COMPBASE_A::CNT,
202 true => COMPBASE_A::PRECNT,
203 }
204 }
205 #[doc = "Checks if the value of the field is `CNT`"]
206 #[inline(always)]
207 pub fn is_cnt(&self) -> bool {
208 *self == COMPBASE_A::CNT
209 }
210 #[doc = "Checks if the value of the field is `PRECNT`"]
211 #[inline(always)]
212 pub fn is_precnt(&self) -> bool {
213 *self == COMPBASE_A::PRECNT
214 }
215}
216#[doc = "Field `COMPBASE` writer - Capture compare channel comparison base."]
217pub type COMPBASE_W<'a, const O: u8> = crate::BitWriter<'a, u32, CC1_CTRL_SPEC, COMPBASE_A, O>;
218impl<'a, const O: u8> COMPBASE_W<'a, O> {
219 #[doc = "RTCC_CCx_ICVALUE/OCVALUE is compared with CNT register."]
220 #[inline(always)]
221 pub fn cnt(self) -> &'a mut W {
222 self.variant(COMPBASE_A::CNT)
223 }
224 #[doc = "Least significant bits of RTCC_CCx_ICVALUE/OCVALUE are compared with COMBCNT."]
225 #[inline(always)]
226 pub fn precnt(self) -> &'a mut W {
227 self.variant(COMPBASE_A::PRECNT)
228 }
229}
230#[doc = "Field `ICEDGE` reader - Input Capture Edge Select"]
231pub type ICEDGE_R = crate::FieldReader<u8, ICEDGE_A>;
232#[doc = "Input Capture Edge Select\n\nValue on reset: 0"]
233#[derive(Clone, Copy, Debug, PartialEq, Eq)]
234#[repr(u8)]
235pub enum ICEDGE_A {
236 #[doc = "0: Rising edges detected"]
237 RISING = 0,
238 #[doc = "1: Falling edges detected"]
239 FALLING = 1,
240 #[doc = "2: Both edges detected"]
241 BOTH = 2,
242 #[doc = "3: No edge detection, signal is left as it is"]
243 NONE = 3,
244}
245impl From<ICEDGE_A> for u8 {
246 #[inline(always)]
247 fn from(variant: ICEDGE_A) -> Self {
248 variant as _
249 }
250}
251impl ICEDGE_R {
252 #[doc = "Get enumerated values variant"]
253 #[inline(always)]
254 pub fn variant(&self) -> ICEDGE_A {
255 match self.bits {
256 0 => ICEDGE_A::RISING,
257 1 => ICEDGE_A::FALLING,
258 2 => ICEDGE_A::BOTH,
259 3 => ICEDGE_A::NONE,
260 _ => unreachable!(),
261 }
262 }
263 #[doc = "Checks if the value of the field is `RISING`"]
264 #[inline(always)]
265 pub fn is_rising(&self) -> bool {
266 *self == ICEDGE_A::RISING
267 }
268 #[doc = "Checks if the value of the field is `FALLING`"]
269 #[inline(always)]
270 pub fn is_falling(&self) -> bool {
271 *self == ICEDGE_A::FALLING
272 }
273 #[doc = "Checks if the value of the field is `BOTH`"]
274 #[inline(always)]
275 pub fn is_both(&self) -> bool {
276 *self == ICEDGE_A::BOTH
277 }
278 #[doc = "Checks if the value of the field is `NONE`"]
279 #[inline(always)]
280 pub fn is_none(&self) -> bool {
281 *self == ICEDGE_A::NONE
282 }
283}
284#[doc = "Field `ICEDGE` writer - Input Capture Edge Select"]
285pub type ICEDGE_W<'a, const O: u8> =
286 crate::FieldWriterSafe<'a, u32, CC1_CTRL_SPEC, u8, ICEDGE_A, 2, O>;
287impl<'a, const O: u8> ICEDGE_W<'a, O> {
288 #[doc = "Rising edges detected"]
289 #[inline(always)]
290 pub fn rising(self) -> &'a mut W {
291 self.variant(ICEDGE_A::RISING)
292 }
293 #[doc = "Falling edges detected"]
294 #[inline(always)]
295 pub fn falling(self) -> &'a mut W {
296 self.variant(ICEDGE_A::FALLING)
297 }
298 #[doc = "Both edges detected"]
299 #[inline(always)]
300 pub fn both(self) -> &'a mut W {
301 self.variant(ICEDGE_A::BOTH)
302 }
303 #[doc = "No edge detection, signal is left as it is"]
304 #[inline(always)]
305 pub fn none(self) -> &'a mut W {
306 self.variant(ICEDGE_A::NONE)
307 }
308}
309impl R {
310 #[doc = "Bits 0:1 - CC Channel Mode"]
311 #[inline(always)]
312 pub fn mode(&self) -> MODE_R {
313 MODE_R::new((self.bits & 3) as u8)
314 }
315 #[doc = "Bits 2:3 - Compare Match Output Action"]
316 #[inline(always)]
317 pub fn cmoa(&self) -> CMOA_R {
318 CMOA_R::new(((self.bits >> 2) & 3) as u8)
319 }
320 #[doc = "Bit 4 - Capture compare channel comparison base."]
321 #[inline(always)]
322 pub fn compbase(&self) -> COMPBASE_R {
323 COMPBASE_R::new(((self.bits >> 4) & 1) != 0)
324 }
325 #[doc = "Bits 5:6 - Input Capture Edge Select"]
326 #[inline(always)]
327 pub fn icedge(&self) -> ICEDGE_R {
328 ICEDGE_R::new(((self.bits >> 5) & 3) as u8)
329 }
330}
331impl W {
332 #[doc = "Bits 0:1 - CC Channel Mode"]
333 #[inline(always)]
334 #[must_use]
335 pub fn mode(&mut self) -> MODE_W<0> {
336 MODE_W::new(self)
337 }
338 #[doc = "Bits 2:3 - Compare Match Output Action"]
339 #[inline(always)]
340 #[must_use]
341 pub fn cmoa(&mut self) -> CMOA_W<2> {
342 CMOA_W::new(self)
343 }
344 #[doc = "Bit 4 - Capture compare channel comparison base."]
345 #[inline(always)]
346 #[must_use]
347 pub fn compbase(&mut self) -> COMPBASE_W<4> {
348 COMPBASE_W::new(self)
349 }
350 #[doc = "Bits 5:6 - Input Capture Edge Select"]
351 #[inline(always)]
352 #[must_use]
353 pub fn icedge(&mut self) -> ICEDGE_W<5> {
354 ICEDGE_W::new(self)
355 }
356 #[doc = "Writes raw bits to the register."]
357 #[inline(always)]
358 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
359 self.0.bits(bits);
360 self
361 }
362}
363#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cc1_ctrl](index.html) module"]
364pub struct CC1_CTRL_SPEC;
365impl crate::RegisterSpec for CC1_CTRL_SPEC {
366 type Ux = u32;
367}
368#[doc = "`read()` method returns [cc1_ctrl::R](R) reader structure"]
369impl crate::Readable for CC1_CTRL_SPEC {
370 type Reader = R;
371}
372#[doc = "`write(|w| ..)` method takes [cc1_ctrl::W](W) writer structure"]
373impl crate::Writable for CC1_CTRL_SPEC {
374 type Writer = W;
375 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
376 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
377}
378#[doc = "`reset()` method sets CC1_CTRL to value 0"]
379impl crate::Resettable for CC1_CTRL_SPEC {
380 const RESET_VALUE: Self::Ux = 0;
381}