efm32pg22_pac/efm32pg22c200/rtcc_ns/
cfg.rs

1#[doc = "Register `CFG` reader"]
2pub struct R(crate::R<CFG_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CFG_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CFG_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CFG_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CFG` writer"]
17pub struct W(crate::W<CFG_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CFG_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CFG_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CFG_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"]
38pub type DEBUGRUN_R = crate::BitReader<DEBUGRUN_A>;
39#[doc = "Debug Mode Run Enable\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41pub enum DEBUGRUN_A {
42    #[doc = "0: RTCC is frozen in debug mode"]
43    X0 = 0,
44    #[doc = "1: RTCC is running in debug mode"]
45    X1 = 1,
46}
47impl From<DEBUGRUN_A> for bool {
48    #[inline(always)]
49    fn from(variant: DEBUGRUN_A) -> Self {
50        variant as u8 != 0
51    }
52}
53impl DEBUGRUN_R {
54    #[doc = "Get enumerated values variant"]
55    #[inline(always)]
56    pub fn variant(&self) -> DEBUGRUN_A {
57        match self.bits {
58            false => DEBUGRUN_A::X0,
59            true => DEBUGRUN_A::X1,
60        }
61    }
62    #[doc = "Checks if the value of the field is `X0`"]
63    #[inline(always)]
64    pub fn is_x0(&self) -> bool {
65        *self == DEBUGRUN_A::X0
66    }
67    #[doc = "Checks if the value of the field is `X1`"]
68    #[inline(always)]
69    pub fn is_x1(&self) -> bool {
70        *self == DEBUGRUN_A::X1
71    }
72}
73#[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"]
74pub type DEBUGRUN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, DEBUGRUN_A, O>;
75impl<'a, const O: u8> DEBUGRUN_W<'a, O> {
76    #[doc = "RTCC is frozen in debug mode"]
77    #[inline(always)]
78    pub fn x0(self) -> &'a mut W {
79        self.variant(DEBUGRUN_A::X0)
80    }
81    #[doc = "RTCC is running in debug mode"]
82    #[inline(always)]
83    pub fn x1(self) -> &'a mut W {
84        self.variant(DEBUGRUN_A::X1)
85    }
86}
87#[doc = "Field `PRECNTCCV0TOP` reader - Pre-counter CCV0 top value enable."]
88pub type PRECNTCCV0TOP_R = crate::BitReader<bool>;
89#[doc = "Field `PRECNTCCV0TOP` writer - Pre-counter CCV0 top value enable."]
90pub type PRECNTCCV0TOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>;
91#[doc = "Field `CNTCCV1TOP` reader - CCV1 top value enable"]
92pub type CNTCCV1TOP_R = crate::BitReader<bool>;
93#[doc = "Field `CNTCCV1TOP` writer - CCV1 top value enable"]
94pub type CNTCCV1TOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, bool, O>;
95#[doc = "Field `CNTTICK` reader - Counter prescaler mode."]
96pub type CNTTICK_R = crate::BitReader<CNTTICK_A>;
97#[doc = "Counter prescaler mode.\n\nValue on reset: 0"]
98#[derive(Clone, Copy, Debug, PartialEq, Eq)]
99pub enum CNTTICK_A {
100    #[doc = "0: CNT register ticks according to configuration in CNTPRESC."]
101    PRESC = 0,
102    #[doc = "1: CNT register ticks when PRECNT matches RTCC_CC0_OC\\[14:0\\]"]
103    CCV0MATCH = 1,
104}
105impl From<CNTTICK_A> for bool {
106    #[inline(always)]
107    fn from(variant: CNTTICK_A) -> Self {
108        variant as u8 != 0
109    }
110}
111impl CNTTICK_R {
112    #[doc = "Get enumerated values variant"]
113    #[inline(always)]
114    pub fn variant(&self) -> CNTTICK_A {
115        match self.bits {
116            false => CNTTICK_A::PRESC,
117            true => CNTTICK_A::CCV0MATCH,
118        }
119    }
120    #[doc = "Checks if the value of the field is `PRESC`"]
121    #[inline(always)]
122    pub fn is_presc(&self) -> bool {
123        *self == CNTTICK_A::PRESC
124    }
125    #[doc = "Checks if the value of the field is `CCV0MATCH`"]
126    #[inline(always)]
127    pub fn is_ccv0match(&self) -> bool {
128        *self == CNTTICK_A::CCV0MATCH
129    }
130}
131#[doc = "Field `CNTTICK` writer - Counter prescaler mode."]
132pub type CNTTICK_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG_SPEC, CNTTICK_A, O>;
133impl<'a, const O: u8> CNTTICK_W<'a, O> {
134    #[doc = "CNT register ticks according to configuration in CNTPRESC."]
135    #[inline(always)]
136    pub fn presc(self) -> &'a mut W {
137        self.variant(CNTTICK_A::PRESC)
138    }
139    #[doc = "CNT register ticks when PRECNT matches RTCC_CC0_OC\\[14:0\\]"]
140    #[inline(always)]
141    pub fn ccv0match(self) -> &'a mut W {
142        self.variant(CNTTICK_A::CCV0MATCH)
143    }
144}
145#[doc = "Field `CNTPRESC` reader - Counter prescaler value."]
146pub type CNTPRESC_R = crate::FieldReader<u8, CNTPRESC_A>;
147#[doc = "Counter prescaler value.\n\nValue on reset: 0"]
148#[derive(Clone, Copy, Debug, PartialEq, Eq)]
149#[repr(u8)]
150pub enum CNTPRESC_A {
151    #[doc = "0: CLK_CNT = (RTCC LF CLK)/1"]
152    DIV1 = 0,
153    #[doc = "1: CLK_CNT = (RTCC LF CLK)/2"]
154    DIV2 = 1,
155    #[doc = "2: CLK_CNT = (RTCC LF CLK)/4"]
156    DIV4 = 2,
157    #[doc = "3: CLK_CNT = (RTCC LF CLK)/8"]
158    DIV8 = 3,
159    #[doc = "4: CLK_CNT = (RTCC LF CLK)/16"]
160    DIV16 = 4,
161    #[doc = "5: CLK_CNT = (RTCC LF CLK)/32"]
162    DIV32 = 5,
163    #[doc = "6: CLK_CNT = (RTCC LF CLK)/64"]
164    DIV64 = 6,
165    #[doc = "7: CLK_CNT = (RTCC LF CLK)/128"]
166    DIV128 = 7,
167    #[doc = "8: CLK_CNT = (RTCC LF CLK)/256"]
168    DIV256 = 8,
169    #[doc = "9: CLK_CNT = (RTCC LF CLK)/512"]
170    DIV512 = 9,
171    #[doc = "10: CLK_CNT = (RTCC LF CLK)/1024"]
172    DIV1024 = 10,
173    #[doc = "11: CLK_CNT = (RTCC LF CLK)/2048"]
174    DIV2048 = 11,
175    #[doc = "12: CLK_CNT = (RTCC LF CLK)/4096"]
176    DIV4096 = 12,
177    #[doc = "13: CLK_CNT = (RTCC LF CLK)/8192"]
178    DIV8192 = 13,
179    #[doc = "14: CLK_CNT = (RTCC LF CLK)/16384"]
180    DIV16384 = 14,
181    #[doc = "15: CLK_CNT = (RTCC LF CLK)/32768"]
182    DIV32768 = 15,
183}
184impl From<CNTPRESC_A> for u8 {
185    #[inline(always)]
186    fn from(variant: CNTPRESC_A) -> Self {
187        variant as _
188    }
189}
190impl CNTPRESC_R {
191    #[doc = "Get enumerated values variant"]
192    #[inline(always)]
193    pub fn variant(&self) -> CNTPRESC_A {
194        match self.bits {
195            0 => CNTPRESC_A::DIV1,
196            1 => CNTPRESC_A::DIV2,
197            2 => CNTPRESC_A::DIV4,
198            3 => CNTPRESC_A::DIV8,
199            4 => CNTPRESC_A::DIV16,
200            5 => CNTPRESC_A::DIV32,
201            6 => CNTPRESC_A::DIV64,
202            7 => CNTPRESC_A::DIV128,
203            8 => CNTPRESC_A::DIV256,
204            9 => CNTPRESC_A::DIV512,
205            10 => CNTPRESC_A::DIV1024,
206            11 => CNTPRESC_A::DIV2048,
207            12 => CNTPRESC_A::DIV4096,
208            13 => CNTPRESC_A::DIV8192,
209            14 => CNTPRESC_A::DIV16384,
210            15 => CNTPRESC_A::DIV32768,
211            _ => unreachable!(),
212        }
213    }
214    #[doc = "Checks if the value of the field is `DIV1`"]
215    #[inline(always)]
216    pub fn is_div1(&self) -> bool {
217        *self == CNTPRESC_A::DIV1
218    }
219    #[doc = "Checks if the value of the field is `DIV2`"]
220    #[inline(always)]
221    pub fn is_div2(&self) -> bool {
222        *self == CNTPRESC_A::DIV2
223    }
224    #[doc = "Checks if the value of the field is `DIV4`"]
225    #[inline(always)]
226    pub fn is_div4(&self) -> bool {
227        *self == CNTPRESC_A::DIV4
228    }
229    #[doc = "Checks if the value of the field is `DIV8`"]
230    #[inline(always)]
231    pub fn is_div8(&self) -> bool {
232        *self == CNTPRESC_A::DIV8
233    }
234    #[doc = "Checks if the value of the field is `DIV16`"]
235    #[inline(always)]
236    pub fn is_div16(&self) -> bool {
237        *self == CNTPRESC_A::DIV16
238    }
239    #[doc = "Checks if the value of the field is `DIV32`"]
240    #[inline(always)]
241    pub fn is_div32(&self) -> bool {
242        *self == CNTPRESC_A::DIV32
243    }
244    #[doc = "Checks if the value of the field is `DIV64`"]
245    #[inline(always)]
246    pub fn is_div64(&self) -> bool {
247        *self == CNTPRESC_A::DIV64
248    }
249    #[doc = "Checks if the value of the field is `DIV128`"]
250    #[inline(always)]
251    pub fn is_div128(&self) -> bool {
252        *self == CNTPRESC_A::DIV128
253    }
254    #[doc = "Checks if the value of the field is `DIV256`"]
255    #[inline(always)]
256    pub fn is_div256(&self) -> bool {
257        *self == CNTPRESC_A::DIV256
258    }
259    #[doc = "Checks if the value of the field is `DIV512`"]
260    #[inline(always)]
261    pub fn is_div512(&self) -> bool {
262        *self == CNTPRESC_A::DIV512
263    }
264    #[doc = "Checks if the value of the field is `DIV1024`"]
265    #[inline(always)]
266    pub fn is_div1024(&self) -> bool {
267        *self == CNTPRESC_A::DIV1024
268    }
269    #[doc = "Checks if the value of the field is `DIV2048`"]
270    #[inline(always)]
271    pub fn is_div2048(&self) -> bool {
272        *self == CNTPRESC_A::DIV2048
273    }
274    #[doc = "Checks if the value of the field is `DIV4096`"]
275    #[inline(always)]
276    pub fn is_div4096(&self) -> bool {
277        *self == CNTPRESC_A::DIV4096
278    }
279    #[doc = "Checks if the value of the field is `DIV8192`"]
280    #[inline(always)]
281    pub fn is_div8192(&self) -> bool {
282        *self == CNTPRESC_A::DIV8192
283    }
284    #[doc = "Checks if the value of the field is `DIV16384`"]
285    #[inline(always)]
286    pub fn is_div16384(&self) -> bool {
287        *self == CNTPRESC_A::DIV16384
288    }
289    #[doc = "Checks if the value of the field is `DIV32768`"]
290    #[inline(always)]
291    pub fn is_div32768(&self) -> bool {
292        *self == CNTPRESC_A::DIV32768
293    }
294}
295#[doc = "Field `CNTPRESC` writer - Counter prescaler value."]
296pub type CNTPRESC_W<'a, const O: u8> =
297    crate::FieldWriterSafe<'a, u32, CFG_SPEC, u8, CNTPRESC_A, 4, O>;
298impl<'a, const O: u8> CNTPRESC_W<'a, O> {
299    #[doc = "CLK_CNT = (RTCC LF CLK)/1"]
300    #[inline(always)]
301    pub fn div1(self) -> &'a mut W {
302        self.variant(CNTPRESC_A::DIV1)
303    }
304    #[doc = "CLK_CNT = (RTCC LF CLK)/2"]
305    #[inline(always)]
306    pub fn div2(self) -> &'a mut W {
307        self.variant(CNTPRESC_A::DIV2)
308    }
309    #[doc = "CLK_CNT = (RTCC LF CLK)/4"]
310    #[inline(always)]
311    pub fn div4(self) -> &'a mut W {
312        self.variant(CNTPRESC_A::DIV4)
313    }
314    #[doc = "CLK_CNT = (RTCC LF CLK)/8"]
315    #[inline(always)]
316    pub fn div8(self) -> &'a mut W {
317        self.variant(CNTPRESC_A::DIV8)
318    }
319    #[doc = "CLK_CNT = (RTCC LF CLK)/16"]
320    #[inline(always)]
321    pub fn div16(self) -> &'a mut W {
322        self.variant(CNTPRESC_A::DIV16)
323    }
324    #[doc = "CLK_CNT = (RTCC LF CLK)/32"]
325    #[inline(always)]
326    pub fn div32(self) -> &'a mut W {
327        self.variant(CNTPRESC_A::DIV32)
328    }
329    #[doc = "CLK_CNT = (RTCC LF CLK)/64"]
330    #[inline(always)]
331    pub fn div64(self) -> &'a mut W {
332        self.variant(CNTPRESC_A::DIV64)
333    }
334    #[doc = "CLK_CNT = (RTCC LF CLK)/128"]
335    #[inline(always)]
336    pub fn div128(self) -> &'a mut W {
337        self.variant(CNTPRESC_A::DIV128)
338    }
339    #[doc = "CLK_CNT = (RTCC LF CLK)/256"]
340    #[inline(always)]
341    pub fn div256(self) -> &'a mut W {
342        self.variant(CNTPRESC_A::DIV256)
343    }
344    #[doc = "CLK_CNT = (RTCC LF CLK)/512"]
345    #[inline(always)]
346    pub fn div512(self) -> &'a mut W {
347        self.variant(CNTPRESC_A::DIV512)
348    }
349    #[doc = "CLK_CNT = (RTCC LF CLK)/1024"]
350    #[inline(always)]
351    pub fn div1024(self) -> &'a mut W {
352        self.variant(CNTPRESC_A::DIV1024)
353    }
354    #[doc = "CLK_CNT = (RTCC LF CLK)/2048"]
355    #[inline(always)]
356    pub fn div2048(self) -> &'a mut W {
357        self.variant(CNTPRESC_A::DIV2048)
358    }
359    #[doc = "CLK_CNT = (RTCC LF CLK)/4096"]
360    #[inline(always)]
361    pub fn div4096(self) -> &'a mut W {
362        self.variant(CNTPRESC_A::DIV4096)
363    }
364    #[doc = "CLK_CNT = (RTCC LF CLK)/8192"]
365    #[inline(always)]
366    pub fn div8192(self) -> &'a mut W {
367        self.variant(CNTPRESC_A::DIV8192)
368    }
369    #[doc = "CLK_CNT = (RTCC LF CLK)/16384"]
370    #[inline(always)]
371    pub fn div16384(self) -> &'a mut W {
372        self.variant(CNTPRESC_A::DIV16384)
373    }
374    #[doc = "CLK_CNT = (RTCC LF CLK)/32768"]
375    #[inline(always)]
376    pub fn div32768(self) -> &'a mut W {
377        self.variant(CNTPRESC_A::DIV32768)
378    }
379}
380impl R {
381    #[doc = "Bit 0 - Debug Mode Run Enable"]
382    #[inline(always)]
383    pub fn debugrun(&self) -> DEBUGRUN_R {
384        DEBUGRUN_R::new((self.bits & 1) != 0)
385    }
386    #[doc = "Bit 1 - Pre-counter CCV0 top value enable."]
387    #[inline(always)]
388    pub fn precntccv0top(&self) -> PRECNTCCV0TOP_R {
389        PRECNTCCV0TOP_R::new(((self.bits >> 1) & 1) != 0)
390    }
391    #[doc = "Bit 2 - CCV1 top value enable"]
392    #[inline(always)]
393    pub fn cntccv1top(&self) -> CNTCCV1TOP_R {
394        CNTCCV1TOP_R::new(((self.bits >> 2) & 1) != 0)
395    }
396    #[doc = "Bit 3 - Counter prescaler mode."]
397    #[inline(always)]
398    pub fn cnttick(&self) -> CNTTICK_R {
399        CNTTICK_R::new(((self.bits >> 3) & 1) != 0)
400    }
401    #[doc = "Bits 4:7 - Counter prescaler value."]
402    #[inline(always)]
403    pub fn cntpresc(&self) -> CNTPRESC_R {
404        CNTPRESC_R::new(((self.bits >> 4) & 0x0f) as u8)
405    }
406}
407impl W {
408    #[doc = "Bit 0 - Debug Mode Run Enable"]
409    #[inline(always)]
410    #[must_use]
411    pub fn debugrun(&mut self) -> DEBUGRUN_W<0> {
412        DEBUGRUN_W::new(self)
413    }
414    #[doc = "Bit 1 - Pre-counter CCV0 top value enable."]
415    #[inline(always)]
416    #[must_use]
417    pub fn precntccv0top(&mut self) -> PRECNTCCV0TOP_W<1> {
418        PRECNTCCV0TOP_W::new(self)
419    }
420    #[doc = "Bit 2 - CCV1 top value enable"]
421    #[inline(always)]
422    #[must_use]
423    pub fn cntccv1top(&mut self) -> CNTCCV1TOP_W<2> {
424        CNTCCV1TOP_W::new(self)
425    }
426    #[doc = "Bit 3 - Counter prescaler mode."]
427    #[inline(always)]
428    #[must_use]
429    pub fn cnttick(&mut self) -> CNTTICK_W<3> {
430        CNTTICK_W::new(self)
431    }
432    #[doc = "Bits 4:7 - Counter prescaler value."]
433    #[inline(always)]
434    #[must_use]
435    pub fn cntpresc(&mut self) -> CNTPRESC_W<4> {
436        CNTPRESC_W::new(self)
437    }
438    #[doc = "Writes raw bits to the register."]
439    #[inline(always)]
440    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
441        self.0.bits(bits);
442        self
443    }
444}
445#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
446pub struct CFG_SPEC;
447impl crate::RegisterSpec for CFG_SPEC {
448    type Ux = u32;
449}
450#[doc = "`read()` method returns [cfg::R](R) reader structure"]
451impl crate::Readable for CFG_SPEC {
452    type Reader = R;
453}
454#[doc = "`write(|w| ..)` method takes [cfg::W](W) writer structure"]
455impl crate::Writable for CFG_SPEC {
456    type Writer = W;
457    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
458    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
459}
460#[doc = "`reset()` method sets CFG to value 0"]
461impl crate::Resettable for CFG_SPEC {
462    const RESET_VALUE: Self::Ux = 0;
463}
efm32pg22_pac/efm32pg22c200/rtcc_ns/cfg.rs

efm32pg22_pac/efm32pg22c200/rtcc_ns/
cfg.rs
