efm32pg22_pac/efm32pg22c200/prs_s/
async_ch0_ctrl.rs1#[doc = "Register `ASYNC_CH0_CTRL` reader"]
2pub struct R(crate::R<ASYNC_CH0_CTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<ASYNC_CH0_CTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<ASYNC_CH0_CTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<ASYNC_CH0_CTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `ASYNC_CH0_CTRL` writer"]
17pub struct W(crate::W<ASYNC_CH0_CTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<ASYNC_CH0_CTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<ASYNC_CH0_CTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<ASYNC_CH0_CTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `SIGSEL` reader - Signal Select"]
38pub type SIGSEL_R = crate::FieldReader<u8, SIGSEL_A>;
39#[doc = "Signal Select\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum SIGSEL_A {
43 #[doc = "0: NONE"]
44 NONE = 0,
45}
46impl From<SIGSEL_A> for u8 {
47 #[inline(always)]
48 fn from(variant: SIGSEL_A) -> Self {
49 variant as _
50 }
51}
52impl SIGSEL_R {
53 #[doc = "Get enumerated values variant"]
54 #[inline(always)]
55 pub fn variant(&self) -> Option<SIGSEL_A> {
56 match self.bits {
57 0 => Some(SIGSEL_A::NONE),
58 _ => None,
59 }
60 }
61 #[doc = "Checks if the value of the field is `NONE`"]
62 #[inline(always)]
63 pub fn is_none(&self) -> bool {
64 *self == SIGSEL_A::NONE
65 }
66}
67#[doc = "Field `SIGSEL` writer - Signal Select"]
68pub type SIGSEL_W<'a, const O: u8> =
69 crate::FieldWriter<'a, u32, ASYNC_CH0_CTRL_SPEC, u8, SIGSEL_A, 3, O>;
70impl<'a, const O: u8> SIGSEL_W<'a, O> {
71 #[doc = "NONE"]
72 #[inline(always)]
73 pub fn none(self) -> &'a mut W {
74 self.variant(SIGSEL_A::NONE)
75 }
76}
77#[doc = "Field `SOURCESEL` reader - Source Select"]
78pub type SOURCESEL_R = crate::FieldReader<u8, u8>;
79#[doc = "Field `SOURCESEL` writer - Source Select"]
80pub type SOURCESEL_W<'a, const O: u8> =
81 crate::FieldWriter<'a, u32, ASYNC_CH0_CTRL_SPEC, u8, u8, 7, O>;
82#[doc = "Field `FNSEL` reader - Function Select"]
83pub type FNSEL_R = crate::FieldReader<u8, FNSEL_A>;
84#[doc = "Function Select\n\nValue on reset: 12"]
85#[derive(Clone, Copy, Debug, PartialEq, Eq)]
86#[repr(u8)]
87pub enum FNSEL_A {
88 #[doc = "0: Logical 0"]
89 LOGICAL_ZERO = 0,
90 #[doc = "1: A NOR B"]
91 A_NOR_B = 1,
92 #[doc = "2: (!A) AND B"]
93 NOT_A_AND_B = 2,
94 #[doc = "3: !A"]
95 NOT_A = 3,
96 #[doc = "4: A AND (!B)"]
97 A_AND_NOT_B = 4,
98 #[doc = "5: !B"]
99 NOT_B = 5,
100 #[doc = "6: A XOR B"]
101 A_XOR_B = 6,
102 #[doc = "7: A NAND B"]
103 A_NAND_B = 7,
104 #[doc = "8: A AND B"]
105 A_AND_B = 8,
106 #[doc = "9: A XNOR B"]
107 A_XNOR_B = 9,
108 #[doc = "10: B"]
109 B = 10,
110 #[doc = "11: (!A) OR B"]
111 NOT_A_OR_B = 11,
112 #[doc = "12: A"]
113 A = 12,
114 #[doc = "13: A OR (!B)"]
115 A_OR_NOT_B = 13,
116 #[doc = "14: A OR B"]
117 A_OR_B = 14,
118 #[doc = "15: Logical 1"]
119 LOGICAL_ONE = 15,
120}
121impl From<FNSEL_A> for u8 {
122 #[inline(always)]
123 fn from(variant: FNSEL_A) -> Self {
124 variant as _
125 }
126}
127impl FNSEL_R {
128 #[doc = "Get enumerated values variant"]
129 #[inline(always)]
130 pub fn variant(&self) -> FNSEL_A {
131 match self.bits {
132 0 => FNSEL_A::LOGICAL_ZERO,
133 1 => FNSEL_A::A_NOR_B,
134 2 => FNSEL_A::NOT_A_AND_B,
135 3 => FNSEL_A::NOT_A,
136 4 => FNSEL_A::A_AND_NOT_B,
137 5 => FNSEL_A::NOT_B,
138 6 => FNSEL_A::A_XOR_B,
139 7 => FNSEL_A::A_NAND_B,
140 8 => FNSEL_A::A_AND_B,
141 9 => FNSEL_A::A_XNOR_B,
142 10 => FNSEL_A::B,
143 11 => FNSEL_A::NOT_A_OR_B,
144 12 => FNSEL_A::A,
145 13 => FNSEL_A::A_OR_NOT_B,
146 14 => FNSEL_A::A_OR_B,
147 15 => FNSEL_A::LOGICAL_ONE,
148 _ => unreachable!(),
149 }
150 }
151 #[doc = "Checks if the value of the field is `LOGICAL_ZERO`"]
152 #[inline(always)]
153 pub fn is_logical_zero(&self) -> bool {
154 *self == FNSEL_A::LOGICAL_ZERO
155 }
156 #[doc = "Checks if the value of the field is `A_NOR_B`"]
157 #[inline(always)]
158 pub fn is_a_nor_b(&self) -> bool {
159 *self == FNSEL_A::A_NOR_B
160 }
161 #[doc = "Checks if the value of the field is `NOT_A_AND_B`"]
162 #[inline(always)]
163 pub fn is_not_a_and_b(&self) -> bool {
164 *self == FNSEL_A::NOT_A_AND_B
165 }
166 #[doc = "Checks if the value of the field is `NOT_A`"]
167 #[inline(always)]
168 pub fn is_not_a(&self) -> bool {
169 *self == FNSEL_A::NOT_A
170 }
171 #[doc = "Checks if the value of the field is `A_AND_NOT_B`"]
172 #[inline(always)]
173 pub fn is_a_and_not_b(&self) -> bool {
174 *self == FNSEL_A::A_AND_NOT_B
175 }
176 #[doc = "Checks if the value of the field is `NOT_B`"]
177 #[inline(always)]
178 pub fn is_not_b(&self) -> bool {
179 *self == FNSEL_A::NOT_B
180 }
181 #[doc = "Checks if the value of the field is `A_XOR_B`"]
182 #[inline(always)]
183 pub fn is_a_xor_b(&self) -> bool {
184 *self == FNSEL_A::A_XOR_B
185 }
186 #[doc = "Checks if the value of the field is `A_NAND_B`"]
187 #[inline(always)]
188 pub fn is_a_nand_b(&self) -> bool {
189 *self == FNSEL_A::A_NAND_B
190 }
191 #[doc = "Checks if the value of the field is `A_AND_B`"]
192 #[inline(always)]
193 pub fn is_a_and_b(&self) -> bool {
194 *self == FNSEL_A::A_AND_B
195 }
196 #[doc = "Checks if the value of the field is `A_XNOR_B`"]
197 #[inline(always)]
198 pub fn is_a_xnor_b(&self) -> bool {
199 *self == FNSEL_A::A_XNOR_B
200 }
201 #[doc = "Checks if the value of the field is `B`"]
202 #[inline(always)]
203 pub fn is_b(&self) -> bool {
204 *self == FNSEL_A::B
205 }
206 #[doc = "Checks if the value of the field is `NOT_A_OR_B`"]
207 #[inline(always)]
208 pub fn is_not_a_or_b(&self) -> bool {
209 *self == FNSEL_A::NOT_A_OR_B
210 }
211 #[doc = "Checks if the value of the field is `A`"]
212 #[inline(always)]
213 pub fn is_a(&self) -> bool {
214 *self == FNSEL_A::A
215 }
216 #[doc = "Checks if the value of the field is `A_OR_NOT_B`"]
217 #[inline(always)]
218 pub fn is_a_or_not_b(&self) -> bool {
219 *self == FNSEL_A::A_OR_NOT_B
220 }
221 #[doc = "Checks if the value of the field is `A_OR_B`"]
222 #[inline(always)]
223 pub fn is_a_or_b(&self) -> bool {
224 *self == FNSEL_A::A_OR_B
225 }
226 #[doc = "Checks if the value of the field is `LOGICAL_ONE`"]
227 #[inline(always)]
228 pub fn is_logical_one(&self) -> bool {
229 *self == FNSEL_A::LOGICAL_ONE
230 }
231}
232#[doc = "Field `FNSEL` writer - Function Select"]
233pub type FNSEL_W<'a, const O: u8> =
234 crate::FieldWriterSafe<'a, u32, ASYNC_CH0_CTRL_SPEC, u8, FNSEL_A, 4, O>;
235impl<'a, const O: u8> FNSEL_W<'a, O> {
236 #[doc = "Logical 0"]
237 #[inline(always)]
238 pub fn logical_zero(self) -> &'a mut W {
239 self.variant(FNSEL_A::LOGICAL_ZERO)
240 }
241 #[doc = "A NOR B"]
242 #[inline(always)]
243 pub fn a_nor_b(self) -> &'a mut W {
244 self.variant(FNSEL_A::A_NOR_B)
245 }
246 #[doc = "(!A) AND B"]
247 #[inline(always)]
248 pub fn not_a_and_b(self) -> &'a mut W {
249 self.variant(FNSEL_A::NOT_A_AND_B)
250 }
251 #[doc = "!A"]
252 #[inline(always)]
253 pub fn not_a(self) -> &'a mut W {
254 self.variant(FNSEL_A::NOT_A)
255 }
256 #[doc = "A AND (!B)"]
257 #[inline(always)]
258 pub fn a_and_not_b(self) -> &'a mut W {
259 self.variant(FNSEL_A::A_AND_NOT_B)
260 }
261 #[doc = "!B"]
262 #[inline(always)]
263 pub fn not_b(self) -> &'a mut W {
264 self.variant(FNSEL_A::NOT_B)
265 }
266 #[doc = "A XOR B"]
267 #[inline(always)]
268 pub fn a_xor_b(self) -> &'a mut W {
269 self.variant(FNSEL_A::A_XOR_B)
270 }
271 #[doc = "A NAND B"]
272 #[inline(always)]
273 pub fn a_nand_b(self) -> &'a mut W {
274 self.variant(FNSEL_A::A_NAND_B)
275 }
276 #[doc = "A AND B"]
277 #[inline(always)]
278 pub fn a_and_b(self) -> &'a mut W {
279 self.variant(FNSEL_A::A_AND_B)
280 }
281 #[doc = "A XNOR B"]
282 #[inline(always)]
283 pub fn a_xnor_b(self) -> &'a mut W {
284 self.variant(FNSEL_A::A_XNOR_B)
285 }
286 #[doc = "B"]
287 #[inline(always)]
288 pub fn b(self) -> &'a mut W {
289 self.variant(FNSEL_A::B)
290 }
291 #[doc = "(!A) OR B"]
292 #[inline(always)]
293 pub fn not_a_or_b(self) -> &'a mut W {
294 self.variant(FNSEL_A::NOT_A_OR_B)
295 }
296 #[doc = "A"]
297 #[inline(always)]
298 pub fn a(self) -> &'a mut W {
299 self.variant(FNSEL_A::A)
300 }
301 #[doc = "A OR (!B)"]
302 #[inline(always)]
303 pub fn a_or_not_b(self) -> &'a mut W {
304 self.variant(FNSEL_A::A_OR_NOT_B)
305 }
306 #[doc = "A OR B"]
307 #[inline(always)]
308 pub fn a_or_b(self) -> &'a mut W {
309 self.variant(FNSEL_A::A_OR_B)
310 }
311 #[doc = "Logical 1"]
312 #[inline(always)]
313 pub fn logical_one(self) -> &'a mut W {
314 self.variant(FNSEL_A::LOGICAL_ONE)
315 }
316}
317#[doc = "Field `AUXSEL` reader - Auxiliary LUT Input Select"]
318pub type AUXSEL_R = crate::FieldReader<u8, u8>;
319#[doc = "Field `AUXSEL` writer - Auxiliary LUT Input Select"]
320pub type AUXSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ASYNC_CH0_CTRL_SPEC, u8, u8, 4, O>;
321impl R {
322 #[doc = "Bits 0:2 - Signal Select"]
323 #[inline(always)]
324 pub fn sigsel(&self) -> SIGSEL_R {
325 SIGSEL_R::new((self.bits & 7) as u8)
326 }
327 #[doc = "Bits 8:14 - Source Select"]
328 #[inline(always)]
329 pub fn sourcesel(&self) -> SOURCESEL_R {
330 SOURCESEL_R::new(((self.bits >> 8) & 0x7f) as u8)
331 }
332 #[doc = "Bits 16:19 - Function Select"]
333 #[inline(always)]
334 pub fn fnsel(&self) -> FNSEL_R {
335 FNSEL_R::new(((self.bits >> 16) & 0x0f) as u8)
336 }
337 #[doc = "Bits 24:27 - Auxiliary LUT Input Select"]
338 #[inline(always)]
339 pub fn auxsel(&self) -> AUXSEL_R {
340 AUXSEL_R::new(((self.bits >> 24) & 0x0f) as u8)
341 }
342}
343impl W {
344 #[doc = "Bits 0:2 - Signal Select"]
345 #[inline(always)]
346 #[must_use]
347 pub fn sigsel(&mut self) -> SIGSEL_W<0> {
348 SIGSEL_W::new(self)
349 }
350 #[doc = "Bits 8:14 - Source Select"]
351 #[inline(always)]
352 #[must_use]
353 pub fn sourcesel(&mut self) -> SOURCESEL_W<8> {
354 SOURCESEL_W::new(self)
355 }
356 #[doc = "Bits 16:19 - Function Select"]
357 #[inline(always)]
358 #[must_use]
359 pub fn fnsel(&mut self) -> FNSEL_W<16> {
360 FNSEL_W::new(self)
361 }
362 #[doc = "Bits 24:27 - Auxiliary LUT Input Select"]
363 #[inline(always)]
364 #[must_use]
365 pub fn auxsel(&mut self) -> AUXSEL_W<24> {
366 AUXSEL_W::new(self)
367 }
368 #[doc = "Writes raw bits to the register."]
369 #[inline(always)]
370 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
371 self.0.bits(bits);
372 self
373 }
374}
375#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [async_ch0_ctrl](index.html) module"]
376pub struct ASYNC_CH0_CTRL_SPEC;
377impl crate::RegisterSpec for ASYNC_CH0_CTRL_SPEC {
378 type Ux = u32;
379}
380#[doc = "`read()` method returns [async_ch0_ctrl::R](R) reader structure"]
381impl crate::Readable for ASYNC_CH0_CTRL_SPEC {
382 type Reader = R;
383}
384#[doc = "`write(|w| ..)` method takes [async_ch0_ctrl::W](W) writer structure"]
385impl crate::Writable for ASYNC_CH0_CTRL_SPEC {
386 type Writer = W;
387 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
388 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
389}
390#[doc = "`reset()` method sets ASYNC_CH0_CTRL to value 0x000c_0000"]
391impl crate::Resettable for ASYNC_CH0_CTRL_SPEC {
392 const RESET_VALUE: Self::Ux = 0x000c_0000;
393}