efm32pg22_pac/efm32pg22c200/pdm_ns/
cfg0.rs

1#[doc = "Register `CFG0` reader"]
2pub struct R(crate::R<CFG0_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CFG0_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CFG0_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CFG0_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CFG0` writer"]
17pub struct W(crate::W<CFG0_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CFG0_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CFG0_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CFG0_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `FORDER` reader - Filter order"]
38pub type FORDER_R = crate::FieldReader<u8, FORDER_A>;
39#[doc = "Filter order\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum FORDER_A {
43    #[doc = "0: Second order filter."]
44    SECOND = 0,
45    #[doc = "1: Third order filter."]
46    THIRD = 1,
47    #[doc = "2: Fourth order filter."]
48    FOURTH = 2,
49    #[doc = "3: Fifth order filter."]
50    FIFTH = 3,
51}
52impl From<FORDER_A> for u8 {
53    #[inline(always)]
54    fn from(variant: FORDER_A) -> Self {
55        variant as _
56    }
57}
58impl FORDER_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> FORDER_A {
62        match self.bits {
63            0 => FORDER_A::SECOND,
64            1 => FORDER_A::THIRD,
65            2 => FORDER_A::FOURTH,
66            3 => FORDER_A::FIFTH,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `SECOND`"]
71    #[inline(always)]
72    pub fn is_second(&self) -> bool {
73        *self == FORDER_A::SECOND
74    }
75    #[doc = "Checks if the value of the field is `THIRD`"]
76    #[inline(always)]
77    pub fn is_third(&self) -> bool {
78        *self == FORDER_A::THIRD
79    }
80    #[doc = "Checks if the value of the field is `FOURTH`"]
81    #[inline(always)]
82    pub fn is_fourth(&self) -> bool {
83        *self == FORDER_A::FOURTH
84    }
85    #[doc = "Checks if the value of the field is `FIFTH`"]
86    #[inline(always)]
87    pub fn is_fifth(&self) -> bool {
88        *self == FORDER_A::FIFTH
89    }
90}
91#[doc = "Field `FORDER` writer - Filter order"]
92pub type FORDER_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, CFG0_SPEC, u8, FORDER_A, 2, O>;
93impl<'a, const O: u8> FORDER_W<'a, O> {
94    #[doc = "Second order filter."]
95    #[inline(always)]
96    pub fn second(self) -> &'a mut W {
97        self.variant(FORDER_A::SECOND)
98    }
99    #[doc = "Third order filter."]
100    #[inline(always)]
101    pub fn third(self) -> &'a mut W {
102        self.variant(FORDER_A::THIRD)
103    }
104    #[doc = "Fourth order filter."]
105    #[inline(always)]
106    pub fn fourth(self) -> &'a mut W {
107        self.variant(FORDER_A::FOURTH)
108    }
109    #[doc = "Fifth order filter."]
110    #[inline(always)]
111    pub fn fifth(self) -> &'a mut W {
112        self.variant(FORDER_A::FIFTH)
113    }
114}
115#[doc = "Field `NUMCH` reader - Number of Channels"]
116pub type NUMCH_R = crate::BitReader<NUMCH_A>;
117#[doc = "Number of Channels\n\nValue on reset: 0"]
118#[derive(Clone, Copy, Debug, PartialEq, Eq)]
119pub enum NUMCH_A {
120    #[doc = "0: One channel."]
121    ONE = 0,
122    #[doc = "1: Two channels."]
123    TWO = 1,
124}
125impl From<NUMCH_A> for bool {
126    #[inline(always)]
127    fn from(variant: NUMCH_A) -> Self {
128        variant as u8 != 0
129    }
130}
131impl NUMCH_R {
132    #[doc = "Get enumerated values variant"]
133    #[inline(always)]
134    pub fn variant(&self) -> NUMCH_A {
135        match self.bits {
136            false => NUMCH_A::ONE,
137            true => NUMCH_A::TWO,
138        }
139    }
140    #[doc = "Checks if the value of the field is `ONE`"]
141    #[inline(always)]
142    pub fn is_one(&self) -> bool {
143        *self == NUMCH_A::ONE
144    }
145    #[doc = "Checks if the value of the field is `TWO`"]
146    #[inline(always)]
147    pub fn is_two(&self) -> bool {
148        *self == NUMCH_A::TWO
149    }
150}
151#[doc = "Field `NUMCH` writer - Number of Channels"]
152pub type NUMCH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, NUMCH_A, O>;
153impl<'a, const O: u8> NUMCH_W<'a, O> {
154    #[doc = "One channel."]
155    #[inline(always)]
156    pub fn one(self) -> &'a mut W {
157        self.variant(NUMCH_A::ONE)
158    }
159    #[doc = "Two channels."]
160    #[inline(always)]
161    pub fn two(self) -> &'a mut W {
162        self.variant(NUMCH_A::TWO)
163    }
164}
165#[doc = "Field `DATAFORMAT` reader - Filter output format"]
166pub type DATAFORMAT_R = crate::FieldReader<u8, DATAFORMAT_A>;
167#[doc = "Filter output format\n\nValue on reset: 0"]
168#[derive(Clone, Copy, Debug, PartialEq, Eq)]
169#[repr(u8)]
170pub enum DATAFORMAT_A {
171    #[doc = "0: Right aligned 16-bit, left bits are sign extended."]
172    RIGHT16 = 0,
173    #[doc = "1: Pack two 16-bit samples into one 32-bit word."]
174    DOUBLE16 = 1,
175    #[doc = "2: Right aligned 24bit, left bits are sign extended."]
176    RIGHT24 = 2,
177    #[doc = "3: 32 bit data."]
178    FULL32BIT = 3,
179    #[doc = "4: Left aligned 16-bit, right bits are zeros."]
180    LEFT16 = 4,
181    #[doc = "5: Left aligned 24-bit, right bits are zeros."]
182    LEFT24 = 5,
183    #[doc = "6: RAW 32 bit data from Integrator."]
184    RAW32BIT = 6,
185}
186impl From<DATAFORMAT_A> for u8 {
187    #[inline(always)]
188    fn from(variant: DATAFORMAT_A) -> Self {
189        variant as _
190    }
191}
192impl DATAFORMAT_R {
193    #[doc = "Get enumerated values variant"]
194    #[inline(always)]
195    pub fn variant(&self) -> Option<DATAFORMAT_A> {
196        match self.bits {
197            0 => Some(DATAFORMAT_A::RIGHT16),
198            1 => Some(DATAFORMAT_A::DOUBLE16),
199            2 => Some(DATAFORMAT_A::RIGHT24),
200            3 => Some(DATAFORMAT_A::FULL32BIT),
201            4 => Some(DATAFORMAT_A::LEFT16),
202            5 => Some(DATAFORMAT_A::LEFT24),
203            6 => Some(DATAFORMAT_A::RAW32BIT),
204            _ => None,
205        }
206    }
207    #[doc = "Checks if the value of the field is `RIGHT16`"]
208    #[inline(always)]
209    pub fn is_right16(&self) -> bool {
210        *self == DATAFORMAT_A::RIGHT16
211    }
212    #[doc = "Checks if the value of the field is `DOUBLE16`"]
213    #[inline(always)]
214    pub fn is_double16(&self) -> bool {
215        *self == DATAFORMAT_A::DOUBLE16
216    }
217    #[doc = "Checks if the value of the field is `RIGHT24`"]
218    #[inline(always)]
219    pub fn is_right24(&self) -> bool {
220        *self == DATAFORMAT_A::RIGHT24
221    }
222    #[doc = "Checks if the value of the field is `FULL32BIT`"]
223    #[inline(always)]
224    pub fn is_full32bit(&self) -> bool {
225        *self == DATAFORMAT_A::FULL32BIT
226    }
227    #[doc = "Checks if the value of the field is `LEFT16`"]
228    #[inline(always)]
229    pub fn is_left16(&self) -> bool {
230        *self == DATAFORMAT_A::LEFT16
231    }
232    #[doc = "Checks if the value of the field is `LEFT24`"]
233    #[inline(always)]
234    pub fn is_left24(&self) -> bool {
235        *self == DATAFORMAT_A::LEFT24
236    }
237    #[doc = "Checks if the value of the field is `RAW32BIT`"]
238    #[inline(always)]
239    pub fn is_raw32bit(&self) -> bool {
240        *self == DATAFORMAT_A::RAW32BIT
241    }
242}
243#[doc = "Field `DATAFORMAT` writer - Filter output format"]
244pub type DATAFORMAT_W<'a, const O: u8> =
245    crate::FieldWriter<'a, u32, CFG0_SPEC, u8, DATAFORMAT_A, 3, O>;
246impl<'a, const O: u8> DATAFORMAT_W<'a, O> {
247    #[doc = "Right aligned 16-bit, left bits are sign extended."]
248    #[inline(always)]
249    pub fn right16(self) -> &'a mut W {
250        self.variant(DATAFORMAT_A::RIGHT16)
251    }
252    #[doc = "Pack two 16-bit samples into one 32-bit word."]
253    #[inline(always)]
254    pub fn double16(self) -> &'a mut W {
255        self.variant(DATAFORMAT_A::DOUBLE16)
256    }
257    #[doc = "Right aligned 24bit, left bits are sign extended."]
258    #[inline(always)]
259    pub fn right24(self) -> &'a mut W {
260        self.variant(DATAFORMAT_A::RIGHT24)
261    }
262    #[doc = "32 bit data."]
263    #[inline(always)]
264    pub fn full32bit(self) -> &'a mut W {
265        self.variant(DATAFORMAT_A::FULL32BIT)
266    }
267    #[doc = "Left aligned 16-bit, right bits are zeros."]
268    #[inline(always)]
269    pub fn left16(self) -> &'a mut W {
270        self.variant(DATAFORMAT_A::LEFT16)
271    }
272    #[doc = "Left aligned 24-bit, right bits are zeros."]
273    #[inline(always)]
274    pub fn left24(self) -> &'a mut W {
275        self.variant(DATAFORMAT_A::LEFT24)
276    }
277    #[doc = "RAW 32 bit data from Integrator."]
278    #[inline(always)]
279    pub fn raw32bit(self) -> &'a mut W {
280        self.variant(DATAFORMAT_A::RAW32BIT)
281    }
282}
283#[doc = "Field `FIFODVL` reader - Data Valid level in FIFO"]
284pub type FIFODVL_R = crate::FieldReader<u8, FIFODVL_A>;
285#[doc = "Data Valid level in FIFO\n\nValue on reset: 0"]
286#[derive(Clone, Copy, Debug, PartialEq, Eq)]
287#[repr(u8)]
288pub enum FIFODVL_A {
289    #[doc = "0: Atleast one word."]
290    ONE = 0,
291    #[doc = "1: Two words."]
292    TWO = 1,
293    #[doc = "2: Three words."]
294    THREE = 2,
295    #[doc = "3: Four words."]
296    FOUR = 3,
297}
298impl From<FIFODVL_A> for u8 {
299    #[inline(always)]
300    fn from(variant: FIFODVL_A) -> Self {
301        variant as _
302    }
303}
304impl FIFODVL_R {
305    #[doc = "Get enumerated values variant"]
306    #[inline(always)]
307    pub fn variant(&self) -> FIFODVL_A {
308        match self.bits {
309            0 => FIFODVL_A::ONE,
310            1 => FIFODVL_A::TWO,
311            2 => FIFODVL_A::THREE,
312            3 => FIFODVL_A::FOUR,
313            _ => unreachable!(),
314        }
315    }
316    #[doc = "Checks if the value of the field is `ONE`"]
317    #[inline(always)]
318    pub fn is_one(&self) -> bool {
319        *self == FIFODVL_A::ONE
320    }
321    #[doc = "Checks if the value of the field is `TWO`"]
322    #[inline(always)]
323    pub fn is_two(&self) -> bool {
324        *self == FIFODVL_A::TWO
325    }
326    #[doc = "Checks if the value of the field is `THREE`"]
327    #[inline(always)]
328    pub fn is_three(&self) -> bool {
329        *self == FIFODVL_A::THREE
330    }
331    #[doc = "Checks if the value of the field is `FOUR`"]
332    #[inline(always)]
333    pub fn is_four(&self) -> bool {
334        *self == FIFODVL_A::FOUR
335    }
336}
337#[doc = "Field `FIFODVL` writer - Data Valid level in FIFO"]
338pub type FIFODVL_W<'a, const O: u8> =
339    crate::FieldWriterSafe<'a, u32, CFG0_SPEC, u8, FIFODVL_A, 2, O>;
340impl<'a, const O: u8> FIFODVL_W<'a, O> {
341    #[doc = "Atleast one word."]
342    #[inline(always)]
343    pub fn one(self) -> &'a mut W {
344        self.variant(FIFODVL_A::ONE)
345    }
346    #[doc = "Two words."]
347    #[inline(always)]
348    pub fn two(self) -> &'a mut W {
349        self.variant(FIFODVL_A::TWO)
350    }
351    #[doc = "Three words."]
352    #[inline(always)]
353    pub fn three(self) -> &'a mut W {
354        self.variant(FIFODVL_A::THREE)
355    }
356    #[doc = "Four words."]
357    #[inline(always)]
358    pub fn four(self) -> &'a mut W {
359        self.variant(FIFODVL_A::FOUR)
360    }
361}
362#[doc = "Field `STEREOMODECH01` reader - Stereo mode CH01"]
363pub type STEREOMODECH01_R = crate::BitReader<STEREOMODECH01_A>;
364#[doc = "Stereo mode CH01\n\nValue on reset: 0"]
365#[derive(Clone, Copy, Debug, PartialEq, Eq)]
366pub enum STEREOMODECH01_A {
367    #[doc = "0: No Stereo mode."]
368    DISABLE = 0,
369    #[doc = "1: CH0 and CH1 in Stereo mode."]
370    CH01ENABLE = 1,
371}
372impl From<STEREOMODECH01_A> for bool {
373    #[inline(always)]
374    fn from(variant: STEREOMODECH01_A) -> Self {
375        variant as u8 != 0
376    }
377}
378impl STEREOMODECH01_R {
379    #[doc = "Get enumerated values variant"]
380    #[inline(always)]
381    pub fn variant(&self) -> STEREOMODECH01_A {
382        match self.bits {
383            false => STEREOMODECH01_A::DISABLE,
384            true => STEREOMODECH01_A::CH01ENABLE,
385        }
386    }
387    #[doc = "Checks if the value of the field is `DISABLE`"]
388    #[inline(always)]
389    pub fn is_disable(&self) -> bool {
390        *self == STEREOMODECH01_A::DISABLE
391    }
392    #[doc = "Checks if the value of the field is `CH01ENABLE`"]
393    #[inline(always)]
394    pub fn is_ch01enable(&self) -> bool {
395        *self == STEREOMODECH01_A::CH01ENABLE
396    }
397}
398#[doc = "Field `STEREOMODECH01` writer - Stereo mode CH01"]
399pub type STEREOMODECH01_W<'a, const O: u8> =
400    crate::BitWriter<'a, u32, CFG0_SPEC, STEREOMODECH01_A, O>;
401impl<'a, const O: u8> STEREOMODECH01_W<'a, O> {
402    #[doc = "No Stereo mode."]
403    #[inline(always)]
404    pub fn disable(self) -> &'a mut W {
405        self.variant(STEREOMODECH01_A::DISABLE)
406    }
407    #[doc = "CH0 and CH1 in Stereo mode."]
408    #[inline(always)]
409    pub fn ch01enable(self) -> &'a mut W {
410        self.variant(STEREOMODECH01_A::CH01ENABLE)
411    }
412}
413#[doc = "Field `CH0CLKPOL` reader - CH0 CLK Polarity"]
414pub type CH0CLKPOL_R = crate::BitReader<CH0CLKPOL_A>;
415#[doc = "CH0 CLK Polarity\n\nValue on reset: 0"]
416#[derive(Clone, Copy, Debug, PartialEq, Eq)]
417pub enum CH0CLKPOL_A {
418    #[doc = "0: Input data clocked on rising clock edge."]
419    NORMAL = 0,
420    #[doc = "1: Input data clocked on falling clock edge."]
421    INVERT = 1,
422}
423impl From<CH0CLKPOL_A> for bool {
424    #[inline(always)]
425    fn from(variant: CH0CLKPOL_A) -> Self {
426        variant as u8 != 0
427    }
428}
429impl CH0CLKPOL_R {
430    #[doc = "Get enumerated values variant"]
431    #[inline(always)]
432    pub fn variant(&self) -> CH0CLKPOL_A {
433        match self.bits {
434            false => CH0CLKPOL_A::NORMAL,
435            true => CH0CLKPOL_A::INVERT,
436        }
437    }
438    #[doc = "Checks if the value of the field is `NORMAL`"]
439    #[inline(always)]
440    pub fn is_normal(&self) -> bool {
441        *self == CH0CLKPOL_A::NORMAL
442    }
443    #[doc = "Checks if the value of the field is `INVERT`"]
444    #[inline(always)]
445    pub fn is_invert(&self) -> bool {
446        *self == CH0CLKPOL_A::INVERT
447    }
448}
449#[doc = "Field `CH0CLKPOL` writer - CH0 CLK Polarity"]
450pub type CH0CLKPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, CH0CLKPOL_A, O>;
451impl<'a, const O: u8> CH0CLKPOL_W<'a, O> {
452    #[doc = "Input data clocked on rising clock edge."]
453    #[inline(always)]
454    pub fn normal(self) -> &'a mut W {
455        self.variant(CH0CLKPOL_A::NORMAL)
456    }
457    #[doc = "Input data clocked on falling clock edge."]
458    #[inline(always)]
459    pub fn invert(self) -> &'a mut W {
460        self.variant(CH0CLKPOL_A::INVERT)
461    }
462}
463#[doc = "Field `CH1CLKPOL` reader - CH1 CLK Polarity"]
464pub type CH1CLKPOL_R = crate::BitReader<CH1CLKPOL_A>;
465#[doc = "CH1 CLK Polarity\n\nValue on reset: 0"]
466#[derive(Clone, Copy, Debug, PartialEq, Eq)]
467pub enum CH1CLKPOL_A {
468    #[doc = "0: Input data clocked on rising clock edge."]
469    NORMAL = 0,
470    #[doc = "1: Input data clocked on falling clock edge."]
471    INVERT = 1,
472}
473impl From<CH1CLKPOL_A> for bool {
474    #[inline(always)]
475    fn from(variant: CH1CLKPOL_A) -> Self {
476        variant as u8 != 0
477    }
478}
479impl CH1CLKPOL_R {
480    #[doc = "Get enumerated values variant"]
481    #[inline(always)]
482    pub fn variant(&self) -> CH1CLKPOL_A {
483        match self.bits {
484            false => CH1CLKPOL_A::NORMAL,
485            true => CH1CLKPOL_A::INVERT,
486        }
487    }
488    #[doc = "Checks if the value of the field is `NORMAL`"]
489    #[inline(always)]
490    pub fn is_normal(&self) -> bool {
491        *self == CH1CLKPOL_A::NORMAL
492    }
493    #[doc = "Checks if the value of the field is `INVERT`"]
494    #[inline(always)]
495    pub fn is_invert(&self) -> bool {
496        *self == CH1CLKPOL_A::INVERT
497    }
498}
499#[doc = "Field `CH1CLKPOL` writer - CH1 CLK Polarity"]
500pub type CH1CLKPOL_W<'a, const O: u8> = crate::BitWriter<'a, u32, CFG0_SPEC, CH1CLKPOL_A, O>;
501impl<'a, const O: u8> CH1CLKPOL_W<'a, O> {
502    #[doc = "Input data clocked on rising clock edge."]
503    #[inline(always)]
504    pub fn normal(self) -> &'a mut W {
505        self.variant(CH1CLKPOL_A::NORMAL)
506    }
507    #[doc = "Input data clocked on falling clock edge."]
508    #[inline(always)]
509    pub fn invert(self) -> &'a mut W {
510        self.variant(CH1CLKPOL_A::INVERT)
511    }
512}
513impl R {
514    #[doc = "Bits 0:1 - Filter order"]
515    #[inline(always)]
516    pub fn forder(&self) -> FORDER_R {
517        FORDER_R::new((self.bits & 3) as u8)
518    }
519    #[doc = "Bit 4 - Number of Channels"]
520    #[inline(always)]
521    pub fn numch(&self) -> NUMCH_R {
522        NUMCH_R::new(((self.bits >> 4) & 1) != 0)
523    }
524    #[doc = "Bits 8:10 - Filter output format"]
525    #[inline(always)]
526    pub fn dataformat(&self) -> DATAFORMAT_R {
527        DATAFORMAT_R::new(((self.bits >> 8) & 7) as u8)
528    }
529    #[doc = "Bits 12:13 - Data Valid level in FIFO"]
530    #[inline(always)]
531    pub fn fifodvl(&self) -> FIFODVL_R {
532        FIFODVL_R::new(((self.bits >> 12) & 3) as u8)
533    }
534    #[doc = "Bit 16 - Stereo mode CH01"]
535    #[inline(always)]
536    pub fn stereomodech01(&self) -> STEREOMODECH01_R {
537        STEREOMODECH01_R::new(((self.bits >> 16) & 1) != 0)
538    }
539    #[doc = "Bit 24 - CH0 CLK Polarity"]
540    #[inline(always)]
541    pub fn ch0clkpol(&self) -> CH0CLKPOL_R {
542        CH0CLKPOL_R::new(((self.bits >> 24) & 1) != 0)
543    }
544    #[doc = "Bit 25 - CH1 CLK Polarity"]
545    #[inline(always)]
546    pub fn ch1clkpol(&self) -> CH1CLKPOL_R {
547        CH1CLKPOL_R::new(((self.bits >> 25) & 1) != 0)
548    }
549}
550impl W {
551    #[doc = "Bits 0:1 - Filter order"]
552    #[inline(always)]
553    #[must_use]
554    pub fn forder(&mut self) -> FORDER_W<0> {
555        FORDER_W::new(self)
556    }
557    #[doc = "Bit 4 - Number of Channels"]
558    #[inline(always)]
559    #[must_use]
560    pub fn numch(&mut self) -> NUMCH_W<4> {
561        NUMCH_W::new(self)
562    }
563    #[doc = "Bits 8:10 - Filter output format"]
564    #[inline(always)]
565    #[must_use]
566    pub fn dataformat(&mut self) -> DATAFORMAT_W<8> {
567        DATAFORMAT_W::new(self)
568    }
569    #[doc = "Bits 12:13 - Data Valid level in FIFO"]
570    #[inline(always)]
571    #[must_use]
572    pub fn fifodvl(&mut self) -> FIFODVL_W<12> {
573        FIFODVL_W::new(self)
574    }
575    #[doc = "Bit 16 - Stereo mode CH01"]
576    #[inline(always)]
577    #[must_use]
578    pub fn stereomodech01(&mut self) -> STEREOMODECH01_W<16> {
579        STEREOMODECH01_W::new(self)
580    }
581    #[doc = "Bit 24 - CH0 CLK Polarity"]
582    #[inline(always)]
583    #[must_use]
584    pub fn ch0clkpol(&mut self) -> CH0CLKPOL_W<24> {
585        CH0CLKPOL_W::new(self)
586    }
587    #[doc = "Bit 25 - CH1 CLK Polarity"]
588    #[inline(always)]
589    #[must_use]
590    pub fn ch1clkpol(&mut self) -> CH1CLKPOL_W<25> {
591        CH1CLKPOL_W::new(self)
592    }
593    #[doc = "Writes raw bits to the register."]
594    #[inline(always)]
595    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
596        self.0.bits(bits);
597        self
598    }
599}
600#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cfg0](index.html) module"]
601pub struct CFG0_SPEC;
602impl crate::RegisterSpec for CFG0_SPEC {
603    type Ux = u32;
604}
605#[doc = "`read()` method returns [cfg0::R](R) reader structure"]
606impl crate::Readable for CFG0_SPEC {
607    type Reader = R;
608}
609#[doc = "`write(|w| ..)` method takes [cfg0::W](W) writer structure"]
610impl crate::Writable for CFG0_SPEC {
611    type Writer = W;
612    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
613    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
614}
615#[doc = "`reset()` method sets CFG0 to value 0"]
616impl crate::Resettable for CFG0_SPEC {
617    const RESET_VALUE: Self::Ux = 0;
618}
efm32pg22_pac/efm32pg22c200/pdm_ns/cfg0.rs

efm32pg22_pac/efm32pg22c200/pdm_ns/
cfg0.rs
