efm32pg22_pac/efm32pg22c200/msc_ns/
readctrl.rs

1#[doc = "Register `READCTRL` reader"]
2pub struct R(crate::R<READCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<READCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<READCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<READCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `READCTRL` writer"]
17pub struct W(crate::W<READCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<READCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<READCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<READCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `DOUTBUFEN` reader - Flash dout pipeline buffer enable"]
38pub type DOUTBUFEN_R = crate::BitReader<bool>;
39#[doc = "Field `DOUTBUFEN` writer - Flash dout pipeline buffer enable"]
40pub type DOUTBUFEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, READCTRL_SPEC, bool, O>;
41#[doc = "Field `MODE` reader - Read Mode"]
42pub type MODE_R = crate::FieldReader<u8, MODE_A>;
43#[doc = "Read Mode\n\nValue on reset: 2"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum MODE_A {
47    #[doc = "0: Zero wait-states inserted in fetch or read transfers"]
48    WS0 = 0,
49    #[doc = "1: One wait-state inserted for each fetch or read transfer"]
50    WS1 = 1,
51    #[doc = "2: Two wait-states inserted for eatch fetch or read transfer"]
52    WS2 = 2,
53    #[doc = "3: Three wait-states inserted for eatch fetch or read transfer"]
54    WS3 = 3,
55}
56impl From<MODE_A> for u8 {
57    #[inline(always)]
58    fn from(variant: MODE_A) -> Self {
59        variant as _
60    }
61}
62impl MODE_R {
63    #[doc = "Get enumerated values variant"]
64    #[inline(always)]
65    pub fn variant(&self) -> MODE_A {
66        match self.bits {
67            0 => MODE_A::WS0,
68            1 => MODE_A::WS1,
69            2 => MODE_A::WS2,
70            3 => MODE_A::WS3,
71            _ => unreachable!(),
72        }
73    }
74    #[doc = "Checks if the value of the field is `WS0`"]
75    #[inline(always)]
76    pub fn is_ws0(&self) -> bool {
77        *self == MODE_A::WS0
78    }
79    #[doc = "Checks if the value of the field is `WS1`"]
80    #[inline(always)]
81    pub fn is_ws1(&self) -> bool {
82        *self == MODE_A::WS1
83    }
84    #[doc = "Checks if the value of the field is `WS2`"]
85    #[inline(always)]
86    pub fn is_ws2(&self) -> bool {
87        *self == MODE_A::WS2
88    }
89    #[doc = "Checks if the value of the field is `WS3`"]
90    #[inline(always)]
91    pub fn is_ws3(&self) -> bool {
92        *self == MODE_A::WS3
93    }
94}
95#[doc = "Field `MODE` writer - Read Mode"]
96pub type MODE_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, READCTRL_SPEC, u8, MODE_A, 2, O>;
97impl<'a, const O: u8> MODE_W<'a, O> {
98    #[doc = "Zero wait-states inserted in fetch or read transfers"]
99    #[inline(always)]
100    pub fn ws0(self) -> &'a mut W {
101        self.variant(MODE_A::WS0)
102    }
103    #[doc = "One wait-state inserted for each fetch or read transfer"]
104    #[inline(always)]
105    pub fn ws1(self) -> &'a mut W {
106        self.variant(MODE_A::WS1)
107    }
108    #[doc = "Two wait-states inserted for eatch fetch or read transfer"]
109    #[inline(always)]
110    pub fn ws2(self) -> &'a mut W {
111        self.variant(MODE_A::WS2)
112    }
113    #[doc = "Three wait-states inserted for eatch fetch or read transfer"]
114    #[inline(always)]
115    pub fn ws3(self) -> &'a mut W {
116        self.variant(MODE_A::WS3)
117    }
118}
119impl R {
120    #[doc = "Bit 12 - Flash dout pipeline buffer enable"]
121    #[inline(always)]
122    pub fn doutbufen(&self) -> DOUTBUFEN_R {
123        DOUTBUFEN_R::new(((self.bits >> 12) & 1) != 0)
124    }
125    #[doc = "Bits 20:21 - Read Mode"]
126    #[inline(always)]
127    pub fn mode(&self) -> MODE_R {
128        MODE_R::new(((self.bits >> 20) & 3) as u8)
129    }
130}
131impl W {
132    #[doc = "Bit 12 - Flash dout pipeline buffer enable"]
133    #[inline(always)]
134    #[must_use]
135    pub fn doutbufen(&mut self) -> DOUTBUFEN_W<12> {
136        DOUTBUFEN_W::new(self)
137    }
138    #[doc = "Bits 20:21 - Read Mode"]
139    #[inline(always)]
140    #[must_use]
141    pub fn mode(&mut self) -> MODE_W<20> {
142        MODE_W::new(self)
143    }
144    #[doc = "Writes raw bits to the register."]
145    #[inline(always)]
146    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
147        self.0.bits(bits);
148        self
149    }
150}
151#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [readctrl](index.html) module"]
152pub struct READCTRL_SPEC;
153impl crate::RegisterSpec for READCTRL_SPEC {
154    type Ux = u32;
155}
156#[doc = "`read()` method returns [readctrl::R](R) reader structure"]
157impl crate::Readable for READCTRL_SPEC {
158    type Reader = R;
159}
160#[doc = "`write(|w| ..)` method takes [readctrl::W](W) writer structure"]
161impl crate::Writable for READCTRL_SPEC {
162    type Writer = W;
163    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
164    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
165}
166#[doc = "`reset()` method sets READCTRL to value 0x0020_0000"]
167impl crate::Resettable for READCTRL_SPEC {
168    const RESET_VALUE: Self::Ux = 0x0020_0000;
169}
efm32pg22_pac/efm32pg22c200/msc_ns/readctrl.rs

efm32pg22_pac/efm32pg22c200/msc_ns/
readctrl.rs
