efm32pg22_pac/efm32pg22c200/icache0_ns/
ien.rs

1#[doc = "Register `IEN` reader"]
2pub struct R(crate::R<IEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `IEN` writer"]
17pub struct W(crate::W<IEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<IEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<IEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<IEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `HITOF` reader - Hit Overflow Interrupt Enable"]
38pub type HITOF_R = crate::BitReader<bool>;
39#[doc = "Field `HITOF` writer - Hit Overflow Interrupt Enable"]
40pub type HITOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
41#[doc = "Field `MISSOF` reader - Miss Overflow Interrupt Enable"]
42pub type MISSOF_R = crate::BitReader<bool>;
43#[doc = "Field `MISSOF` writer - Miss Overflow Interrupt Enable"]
44pub type MISSOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
45#[doc = "Field `AHITOF` reader - Advanced Hit Overflow Interrupt Enable"]
46pub type AHITOF_R = crate::BitReader<bool>;
47#[doc = "Field `AHITOF` writer - Advanced Hit Overflow Interrupt Enable"]
48pub type AHITOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
49#[doc = "Field `RAMERROR` reader - RAM error Interrupt Enable"]
50pub type RAMERROR_R = crate::BitReader<bool>;
51#[doc = "Field `RAMERROR` writer - RAM error Interrupt Enable"]
52pub type RAMERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
53impl R {
54    #[doc = "Bit 0 - Hit Overflow Interrupt Enable"]
55    #[inline(always)]
56    pub fn hitof(&self) -> HITOF_R {
57        HITOF_R::new((self.bits & 1) != 0)
58    }
59    #[doc = "Bit 1 - Miss Overflow Interrupt Enable"]
60    #[inline(always)]
61    pub fn missof(&self) -> MISSOF_R {
62        MISSOF_R::new(((self.bits >> 1) & 1) != 0)
63    }
64    #[doc = "Bit 2 - Advanced Hit Overflow Interrupt Enable"]
65    #[inline(always)]
66    pub fn ahitof(&self) -> AHITOF_R {
67        AHITOF_R::new(((self.bits >> 2) & 1) != 0)
68    }
69    #[doc = "Bit 8 - RAM error Interrupt Enable"]
70    #[inline(always)]
71    pub fn ramerror(&self) -> RAMERROR_R {
72        RAMERROR_R::new(((self.bits >> 8) & 1) != 0)
73    }
74}
75impl W {
76    #[doc = "Bit 0 - Hit Overflow Interrupt Enable"]
77    #[inline(always)]
78    #[must_use]
79    pub fn hitof(&mut self) -> HITOF_W<0> {
80        HITOF_W::new(self)
81    }
82    #[doc = "Bit 1 - Miss Overflow Interrupt Enable"]
83    #[inline(always)]
84    #[must_use]
85    pub fn missof(&mut self) -> MISSOF_W<1> {
86        MISSOF_W::new(self)
87    }
88    #[doc = "Bit 2 - Advanced Hit Overflow Interrupt Enable"]
89    #[inline(always)]
90    #[must_use]
91    pub fn ahitof(&mut self) -> AHITOF_W<2> {
92        AHITOF_W::new(self)
93    }
94    #[doc = "Bit 8 - RAM error Interrupt Enable"]
95    #[inline(always)]
96    #[must_use]
97    pub fn ramerror(&mut self) -> RAMERROR_W<8> {
98        RAMERROR_W::new(self)
99    }
100    #[doc = "Writes raw bits to the register."]
101    #[inline(always)]
102    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
103        self.0.bits(bits);
104        self
105    }
106}
107#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
108pub struct IEN_SPEC;
109impl crate::RegisterSpec for IEN_SPEC {
110    type Ux = u32;
111}
112#[doc = "`read()` method returns [ien::R](R) reader structure"]
113impl crate::Readable for IEN_SPEC {
114    type Reader = R;
115}
116#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
117impl crate::Writable for IEN_SPEC {
118    type Writer = W;
119    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
120    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
121}
122#[doc = "`reset()` method sets IEN to value 0"]
123impl crate::Resettable for IEN_SPEC {
124    const RESET_VALUE: Self::Ux = 0;
125}
efm32pg22_pac/efm32pg22c200/icache0_ns/ien.rs

efm32pg22_pac/efm32pg22c200/icache0_ns/
ien.rs
