efm32pg22_pac/efm32pg22c200/iadc0_ns/
scan5.rs

1#[doc = "Register `SCAN5` reader"]
2pub struct R(crate::R<SCAN5_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SCAN5_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SCAN5_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SCAN5_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SCAN5` writer"]
17pub struct W(crate::W<SCAN5_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SCAN5_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SCAN5_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SCAN5_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `PINNEG` reader - Negative Pin Select"]
38pub type PINNEG_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `PINNEG` writer - Negative Pin Select"]
40pub type PINNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN5_SPEC, u8, u8, 4, O>;
41#[doc = "Field `PORTNEG` reader - Negative Port Select"]
42pub type PORTNEG_R = crate::FieldReader<u8, PORTNEG_A>;
43#[doc = "Negative Port Select\n\nValue on reset: 0"]
44#[derive(Clone, Copy, Debug, PartialEq, Eq)]
45#[repr(u8)]
46pub enum PORTNEG_A {
47    #[doc = "0: Ground (single-ended)"]
48    GND = 0,
49    #[doc = "8: Port A - Select pin number using PINNEG"]
50    PORTA = 8,
51    #[doc = "9: Port B - Select pin number using PINNEG"]
52    PORTB = 9,
53    #[doc = "10: Port C - Select pin number using PINNEG"]
54    PORTC = 10,
55    #[doc = "11: Port D - Select pin number using PINNEG"]
56    PORTD = 11,
57}
58impl From<PORTNEG_A> for u8 {
59    #[inline(always)]
60    fn from(variant: PORTNEG_A) -> Self {
61        variant as _
62    }
63}
64impl PORTNEG_R {
65    #[doc = "Get enumerated values variant"]
66    #[inline(always)]
67    pub fn variant(&self) -> Option<PORTNEG_A> {
68        match self.bits {
69            0 => Some(PORTNEG_A::GND),
70            8 => Some(PORTNEG_A::PORTA),
71            9 => Some(PORTNEG_A::PORTB),
72            10 => Some(PORTNEG_A::PORTC),
73            11 => Some(PORTNEG_A::PORTD),
74            _ => None,
75        }
76    }
77    #[doc = "Checks if the value of the field is `GND`"]
78    #[inline(always)]
79    pub fn is_gnd(&self) -> bool {
80        *self == PORTNEG_A::GND
81    }
82    #[doc = "Checks if the value of the field is `PORTA`"]
83    #[inline(always)]
84    pub fn is_porta(&self) -> bool {
85        *self == PORTNEG_A::PORTA
86    }
87    #[doc = "Checks if the value of the field is `PORTB`"]
88    #[inline(always)]
89    pub fn is_portb(&self) -> bool {
90        *self == PORTNEG_A::PORTB
91    }
92    #[doc = "Checks if the value of the field is `PORTC`"]
93    #[inline(always)]
94    pub fn is_portc(&self) -> bool {
95        *self == PORTNEG_A::PORTC
96    }
97    #[doc = "Checks if the value of the field is `PORTD`"]
98    #[inline(always)]
99    pub fn is_portd(&self) -> bool {
100        *self == PORTNEG_A::PORTD
101    }
102}
103#[doc = "Field `PORTNEG` writer - Negative Port Select"]
104pub type PORTNEG_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN5_SPEC, u8, PORTNEG_A, 4, O>;
105impl<'a, const O: u8> PORTNEG_W<'a, O> {
106    #[doc = "Ground (single-ended)"]
107    #[inline(always)]
108    pub fn gnd(self) -> &'a mut W {
109        self.variant(PORTNEG_A::GND)
110    }
111    #[doc = "Port A - Select pin number using PINNEG"]
112    #[inline(always)]
113    pub fn porta(self) -> &'a mut W {
114        self.variant(PORTNEG_A::PORTA)
115    }
116    #[doc = "Port B - Select pin number using PINNEG"]
117    #[inline(always)]
118    pub fn portb(self) -> &'a mut W {
119        self.variant(PORTNEG_A::PORTB)
120    }
121    #[doc = "Port C - Select pin number using PINNEG"]
122    #[inline(always)]
123    pub fn portc(self) -> &'a mut W {
124        self.variant(PORTNEG_A::PORTC)
125    }
126    #[doc = "Port D - Select pin number using PINNEG"]
127    #[inline(always)]
128    pub fn portd(self) -> &'a mut W {
129        self.variant(PORTNEG_A::PORTD)
130    }
131}
132#[doc = "Field `PINPOS` reader - Positive Pin Select"]
133pub type PINPOS_R = crate::FieldReader<u8, u8>;
134#[doc = "Field `PINPOS` writer - Positive Pin Select"]
135pub type PINPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN5_SPEC, u8, u8, 4, O>;
136#[doc = "Field `PORTPOS` reader - Positive Port Select"]
137pub type PORTPOS_R = crate::FieldReader<u8, PORTPOS_A>;
138#[doc = "Positive Port Select\n\nValue on reset: 0"]
139#[derive(Clone, Copy, Debug, PartialEq, Eq)]
140#[repr(u8)]
141pub enum PORTPOS_A {
142    #[doc = "0: Ground"]
143    GND = 0,
144    #[doc = "1: Supply Pin - Select specific supply using PINPOS"]
145    SUPPLY = 1,
146    #[doc = "8: Port A - Select pin number using PINPOS"]
147    PORTA = 8,
148    #[doc = "9: Port B - Select pin number using PINPOS"]
149    PORTB = 9,
150    #[doc = "10: Port C - Select pin number using PINPOS"]
151    PORTC = 10,
152    #[doc = "11: Port D - Select pin number using PINPOS"]
153    PORTD = 11,
154}
155impl From<PORTPOS_A> for u8 {
156    #[inline(always)]
157    fn from(variant: PORTPOS_A) -> Self {
158        variant as _
159    }
160}
161impl PORTPOS_R {
162    #[doc = "Get enumerated values variant"]
163    #[inline(always)]
164    pub fn variant(&self) -> Option<PORTPOS_A> {
165        match self.bits {
166            0 => Some(PORTPOS_A::GND),
167            1 => Some(PORTPOS_A::SUPPLY),
168            8 => Some(PORTPOS_A::PORTA),
169            9 => Some(PORTPOS_A::PORTB),
170            10 => Some(PORTPOS_A::PORTC),
171            11 => Some(PORTPOS_A::PORTD),
172            _ => None,
173        }
174    }
175    #[doc = "Checks if the value of the field is `GND`"]
176    #[inline(always)]
177    pub fn is_gnd(&self) -> bool {
178        *self == PORTPOS_A::GND
179    }
180    #[doc = "Checks if the value of the field is `SUPPLY`"]
181    #[inline(always)]
182    pub fn is_supply(&self) -> bool {
183        *self == PORTPOS_A::SUPPLY
184    }
185    #[doc = "Checks if the value of the field is `PORTA`"]
186    #[inline(always)]
187    pub fn is_porta(&self) -> bool {
188        *self == PORTPOS_A::PORTA
189    }
190    #[doc = "Checks if the value of the field is `PORTB`"]
191    #[inline(always)]
192    pub fn is_portb(&self) -> bool {
193        *self == PORTPOS_A::PORTB
194    }
195    #[doc = "Checks if the value of the field is `PORTC`"]
196    #[inline(always)]
197    pub fn is_portc(&self) -> bool {
198        *self == PORTPOS_A::PORTC
199    }
200    #[doc = "Checks if the value of the field is `PORTD`"]
201    #[inline(always)]
202    pub fn is_portd(&self) -> bool {
203        *self == PORTPOS_A::PORTD
204    }
205}
206#[doc = "Field `PORTPOS` writer - Positive Port Select"]
207pub type PORTPOS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, SCAN5_SPEC, u8, PORTPOS_A, 4, O>;
208impl<'a, const O: u8> PORTPOS_W<'a, O> {
209    #[doc = "Ground"]
210    #[inline(always)]
211    pub fn gnd(self) -> &'a mut W {
212        self.variant(PORTPOS_A::GND)
213    }
214    #[doc = "Supply Pin - Select specific supply using PINPOS"]
215    #[inline(always)]
216    pub fn supply(self) -> &'a mut W {
217        self.variant(PORTPOS_A::SUPPLY)
218    }
219    #[doc = "Port A - Select pin number using PINPOS"]
220    #[inline(always)]
221    pub fn porta(self) -> &'a mut W {
222        self.variant(PORTPOS_A::PORTA)
223    }
224    #[doc = "Port B - Select pin number using PINPOS"]
225    #[inline(always)]
226    pub fn portb(self) -> &'a mut W {
227        self.variant(PORTPOS_A::PORTB)
228    }
229    #[doc = "Port C - Select pin number using PINPOS"]
230    #[inline(always)]
231    pub fn portc(self) -> &'a mut W {
232        self.variant(PORTPOS_A::PORTC)
233    }
234    #[doc = "Port D - Select pin number using PINPOS"]
235    #[inline(always)]
236    pub fn portd(self) -> &'a mut W {
237        self.variant(PORTPOS_A::PORTD)
238    }
239}
240#[doc = "Field `CFG` reader - Configuration Group Select"]
241pub type CFG_R = crate::BitReader<CFG_A>;
242#[doc = "Configuration Group Select\n\nValue on reset: 0"]
243#[derive(Clone, Copy, Debug, PartialEq, Eq)]
244pub enum CFG_A {
245    #[doc = "0: Use configuration group 0"]
246    CONFIG0 = 0,
247    #[doc = "1: Use configuration group 1"]
248    CONFIG1 = 1,
249}
250impl From<CFG_A> for bool {
251    #[inline(always)]
252    fn from(variant: CFG_A) -> Self {
253        variant as u8 != 0
254    }
255}
256impl CFG_R {
257    #[doc = "Get enumerated values variant"]
258    #[inline(always)]
259    pub fn variant(&self) -> CFG_A {
260        match self.bits {
261            false => CFG_A::CONFIG0,
262            true => CFG_A::CONFIG1,
263        }
264    }
265    #[doc = "Checks if the value of the field is `CONFIG0`"]
266    #[inline(always)]
267    pub fn is_config0(&self) -> bool {
268        *self == CFG_A::CONFIG0
269    }
270    #[doc = "Checks if the value of the field is `CONFIG1`"]
271    #[inline(always)]
272    pub fn is_config1(&self) -> bool {
273        *self == CFG_A::CONFIG1
274    }
275}
276#[doc = "Field `CFG` writer - Configuration Group Select"]
277pub type CFG_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN5_SPEC, CFG_A, O>;
278impl<'a, const O: u8> CFG_W<'a, O> {
279    #[doc = "Use configuration group 0"]
280    #[inline(always)]
281    pub fn config0(self) -> &'a mut W {
282        self.variant(CFG_A::CONFIG0)
283    }
284    #[doc = "Use configuration group 1"]
285    #[inline(always)]
286    pub fn config1(self) -> &'a mut W {
287        self.variant(CFG_A::CONFIG1)
288    }
289}
290#[doc = "Field `CMP` reader - Comparison Enable"]
291pub type CMP_R = crate::BitReader<bool>;
292#[doc = "Field `CMP` writer - Comparison Enable"]
293pub type CMP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SCAN5_SPEC, bool, O>;
294impl R {
295    #[doc = "Bits 0:3 - Negative Pin Select"]
296    #[inline(always)]
297    pub fn pinneg(&self) -> PINNEG_R {
298        PINNEG_R::new((self.bits & 0x0f) as u8)
299    }
300    #[doc = "Bits 4:7 - Negative Port Select"]
301    #[inline(always)]
302    pub fn portneg(&self) -> PORTNEG_R {
303        PORTNEG_R::new(((self.bits >> 4) & 0x0f) as u8)
304    }
305    #[doc = "Bits 8:11 - Positive Pin Select"]
306    #[inline(always)]
307    pub fn pinpos(&self) -> PINPOS_R {
308        PINPOS_R::new(((self.bits >> 8) & 0x0f) as u8)
309    }
310    #[doc = "Bits 12:15 - Positive Port Select"]
311    #[inline(always)]
312    pub fn portpos(&self) -> PORTPOS_R {
313        PORTPOS_R::new(((self.bits >> 12) & 0x0f) as u8)
314    }
315    #[doc = "Bit 16 - Configuration Group Select"]
316    #[inline(always)]
317    pub fn cfg(&self) -> CFG_R {
318        CFG_R::new(((self.bits >> 16) & 1) != 0)
319    }
320    #[doc = "Bit 17 - Comparison Enable"]
321    #[inline(always)]
322    pub fn cmp(&self) -> CMP_R {
323        CMP_R::new(((self.bits >> 17) & 1) != 0)
324    }
325}
326impl W {
327    #[doc = "Bits 0:3 - Negative Pin Select"]
328    #[inline(always)]
329    #[must_use]
330    pub fn pinneg(&mut self) -> PINNEG_W<0> {
331        PINNEG_W::new(self)
332    }
333    #[doc = "Bits 4:7 - Negative Port Select"]
334    #[inline(always)]
335    #[must_use]
336    pub fn portneg(&mut self) -> PORTNEG_W<4> {
337        PORTNEG_W::new(self)
338    }
339    #[doc = "Bits 8:11 - Positive Pin Select"]
340    #[inline(always)]
341    #[must_use]
342    pub fn pinpos(&mut self) -> PINPOS_W<8> {
343        PINPOS_W::new(self)
344    }
345    #[doc = "Bits 12:15 - Positive Port Select"]
346    #[inline(always)]
347    #[must_use]
348    pub fn portpos(&mut self) -> PORTPOS_W<12> {
349        PORTPOS_W::new(self)
350    }
351    #[doc = "Bit 16 - Configuration Group Select"]
352    #[inline(always)]
353    #[must_use]
354    pub fn cfg(&mut self) -> CFG_W<16> {
355        CFG_W::new(self)
356    }
357    #[doc = "Bit 17 - Comparison Enable"]
358    #[inline(always)]
359    #[must_use]
360    pub fn cmp(&mut self) -> CMP_W<17> {
361        CMP_W::new(self)
362    }
363    #[doc = "Writes raw bits to the register."]
364    #[inline(always)]
365    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
366        self.0.bits(bits);
367        self
368    }
369}
370#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scan5](index.html) module"]
371pub struct SCAN5_SPEC;
372impl crate::RegisterSpec for SCAN5_SPEC {
373    type Ux = u32;
374}
375#[doc = "`read()` method returns [scan5::R](R) reader structure"]
376impl crate::Readable for SCAN5_SPEC {
377    type Reader = R;
378}
379#[doc = "`write(|w| ..)` method takes [scan5::W](W) writer structure"]
380impl crate::Writable for SCAN5_SPEC {
381    type Writer = W;
382    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
383    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
384}
385#[doc = "`reset()` method sets SCAN5 to value 0"]
386impl crate::Resettable for SCAN5_SPEC {
387    const RESET_VALUE: Self::Ux = 0;
388}
efm32pg22_pac/efm32pg22c200/iadc0_ns/scan5.rs

efm32pg22_pac/efm32pg22c200/iadc0_ns/
scan5.rs
