efm32pg22_pac/efm32pg22c200/iadc0_ns/
cmd.rs

1#[doc = "Register `CMD` writer"]
2pub struct W(crate::W<CMD_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<CMD_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<CMD_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<CMD_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `SINGLESTART` writer - Single Queue Start"]
23pub type SINGLESTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
24#[doc = "Field `SINGLESTOP` writer - Single Queue Stop"]
25pub type SINGLESTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
26#[doc = "Field `SCANSTART` writer - Scan Queue Start"]
27pub type SCANSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
28#[doc = "Field `SCANSTOP` writer - Scan Queue Stop"]
29pub type SCANSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
30#[doc = "Field `TIMEREN` writer - Timer Enable"]
31pub type TIMEREN_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
32#[doc = "Field `TIMERDIS` writer - Timer Disable"]
33pub type TIMERDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
34#[doc = "Field `SINGLEFIFOFLUSH` writer - Flush the Single FIFO"]
35pub type SINGLEFIFOFLUSH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
36#[doc = "Field `SCANFIFOFLUSH` writer - Flush the Scan FIFO"]
37pub type SCANFIFOFLUSH_W<'a, const O: u8> = crate::BitWriter<'a, u32, CMD_SPEC, bool, O>;
38impl W {
39    #[doc = "Bit 0 - Single Queue Start"]
40    #[inline(always)]
41    #[must_use]
42    pub fn singlestart(&mut self) -> SINGLESTART_W<0> {
43        SINGLESTART_W::new(self)
44    }
45    #[doc = "Bit 1 - Single Queue Stop"]
46    #[inline(always)]
47    #[must_use]
48    pub fn singlestop(&mut self) -> SINGLESTOP_W<1> {
49        SINGLESTOP_W::new(self)
50    }
51    #[doc = "Bit 3 - Scan Queue Start"]
52    #[inline(always)]
53    #[must_use]
54    pub fn scanstart(&mut self) -> SCANSTART_W<3> {
55        SCANSTART_W::new(self)
56    }
57    #[doc = "Bit 4 - Scan Queue Stop"]
58    #[inline(always)]
59    #[must_use]
60    pub fn scanstop(&mut self) -> SCANSTOP_W<4> {
61        SCANSTOP_W::new(self)
62    }
63    #[doc = "Bit 16 - Timer Enable"]
64    #[inline(always)]
65    #[must_use]
66    pub fn timeren(&mut self) -> TIMEREN_W<16> {
67        TIMEREN_W::new(self)
68    }
69    #[doc = "Bit 17 - Timer Disable"]
70    #[inline(always)]
71    #[must_use]
72    pub fn timerdis(&mut self) -> TIMERDIS_W<17> {
73        TIMERDIS_W::new(self)
74    }
75    #[doc = "Bit 24 - Flush the Single FIFO"]
76    #[inline(always)]
77    #[must_use]
78    pub fn singlefifoflush(&mut self) -> SINGLEFIFOFLUSH_W<24> {
79        SINGLEFIFOFLUSH_W::new(self)
80    }
81    #[doc = "Bit 25 - Flush the Scan FIFO"]
82    #[inline(always)]
83    #[must_use]
84    pub fn scanfifoflush(&mut self) -> SCANFIFOFLUSH_W<25> {
85        SCANFIFOFLUSH_W::new(self)
86    }
87    #[doc = "Writes raw bits to the register."]
88    #[inline(always)]
89    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
90        self.0.bits(bits);
91        self
92    }
93}
94#[doc = "Command\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cmd](index.html) module"]
95pub struct CMD_SPEC;
96impl crate::RegisterSpec for CMD_SPEC {
97    type Ux = u32;
98}
99#[doc = "`write(|w| ..)` method takes [cmd::W](W) writer structure"]
100impl crate::Writable for CMD_SPEC {
101    type Writer = W;
102    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
103    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
104}
105#[doc = "`reset()` method sets CMD to value 0"]
106impl crate::Resettable for CMD_SPEC {
107    const RESET_VALUE: Self::Ux = 0;
108}
efm32pg22_pac/efm32pg22c200/iadc0_ns/cmd.rs

efm32pg22_pac/efm32pg22c200/iadc0_ns/
cmd.rs
