efm32pg22_pac/efm32pg22c200/i2c0_ns/
ien.rs

1#[doc = "Register `IEN` reader"]
2pub struct R(crate::R<IEN_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<IEN_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<IEN_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<IEN_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `IEN` writer"]
17pub struct W(crate::W<IEN_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<IEN_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<IEN_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<IEN_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `START` reader - START condition Interrupt Flag"]
38pub type START_R = crate::BitReader<bool>;
39#[doc = "Field `START` writer - START condition Interrupt Flag"]
40pub type START_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
41#[doc = "Field `RSTART` reader - Repeated START condition Interrupt Flag"]
42pub type RSTART_R = crate::BitReader<bool>;
43#[doc = "Field `RSTART` writer - Repeated START condition Interrupt Flag"]
44pub type RSTART_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
45#[doc = "Field `ADDR` reader - Address Interrupt Flag"]
46pub type ADDR_R = crate::BitReader<bool>;
47#[doc = "Field `ADDR` writer - Address Interrupt Flag"]
48pub type ADDR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
49#[doc = "Field `TXC` reader - Transfer Completed Interrupt Flag"]
50pub type TXC_R = crate::BitReader<bool>;
51#[doc = "Field `TXC` writer - Transfer Completed Interrupt Flag"]
52pub type TXC_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
53#[doc = "Field `TXBL` reader - Transmit Buffer Level Interrupt Flag"]
54pub type TXBL_R = crate::BitReader<bool>;
55#[doc = "Field `TXBL` writer - Transmit Buffer Level Interrupt Flag"]
56pub type TXBL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
57#[doc = "Field `RXDATAV` reader - Receive Data Valid Interrupt Flag"]
58pub type RXDATAV_R = crate::BitReader<bool>;
59#[doc = "Field `RXDATAV` writer - Receive Data Valid Interrupt Flag"]
60pub type RXDATAV_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
61#[doc = "Field `ACK` reader - Acknowledge Received Interrupt Flag"]
62pub type ACK_R = crate::BitReader<bool>;
63#[doc = "Field `ACK` writer - Acknowledge Received Interrupt Flag"]
64pub type ACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
65#[doc = "Field `NACK` reader - Not Acknowledge Received Interrupt Flag"]
66pub type NACK_R = crate::BitReader<bool>;
67#[doc = "Field `NACK` writer - Not Acknowledge Received Interrupt Flag"]
68pub type NACK_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
69#[doc = "Field `MSTOP` reader - Leader STOP Condition Interrupt Flag"]
70pub type MSTOP_R = crate::BitReader<bool>;
71#[doc = "Field `MSTOP` writer - Leader STOP Condition Interrupt Flag"]
72pub type MSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
73#[doc = "Field `ARBLOST` reader - Arbitration Lost Interrupt Flag"]
74pub type ARBLOST_R = crate::BitReader<bool>;
75#[doc = "Field `ARBLOST` writer - Arbitration Lost Interrupt Flag"]
76pub type ARBLOST_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
77#[doc = "Field `BUSERR` reader - Bus Error Interrupt Flag"]
78pub type BUSERR_R = crate::BitReader<bool>;
79#[doc = "Field `BUSERR` writer - Bus Error Interrupt Flag"]
80pub type BUSERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
81#[doc = "Field `BUSHOLD` reader - Bus Held Interrupt Flag"]
82pub type BUSHOLD_R = crate::BitReader<bool>;
83#[doc = "Field `BUSHOLD` writer - Bus Held Interrupt Flag"]
84pub type BUSHOLD_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
85#[doc = "Field `TXOF` reader - Transmit Buffer Overflow Interrupt Flag"]
86pub type TXOF_R = crate::BitReader<bool>;
87#[doc = "Field `TXOF` writer - Transmit Buffer Overflow Interrupt Flag"]
88pub type TXOF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
89#[doc = "Field `RXUF` reader - Receive Buffer Underflow Interrupt Flag"]
90pub type RXUF_R = crate::BitReader<bool>;
91#[doc = "Field `RXUF` writer - Receive Buffer Underflow Interrupt Flag"]
92pub type RXUF_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
93#[doc = "Field `BITO` reader - Bus Idle Timeout Interrupt Flag"]
94pub type BITO_R = crate::BitReader<bool>;
95#[doc = "Field `BITO` writer - Bus Idle Timeout Interrupt Flag"]
96pub type BITO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
97#[doc = "Field `CLTO` reader - Clock Low Timeout Interrupt Flag"]
98pub type CLTO_R = crate::BitReader<bool>;
99#[doc = "Field `CLTO` writer - Clock Low Timeout Interrupt Flag"]
100pub type CLTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
101#[doc = "Field `SSTOP` reader - Follower STOP condition Interrupt Flag"]
102pub type SSTOP_R = crate::BitReader<bool>;
103#[doc = "Field `SSTOP` writer - Follower STOP condition Interrupt Flag"]
104pub type SSTOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
105#[doc = "Field `RXFULL` reader - Receive Buffer Full Interrupt Flag"]
106pub type RXFULL_R = crate::BitReader<bool>;
107#[doc = "Field `RXFULL` writer - Receive Buffer Full Interrupt Flag"]
108pub type RXFULL_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
109#[doc = "Field `CLERR` reader - Clock Low Error Interrupt Flag"]
110pub type CLERR_R = crate::BitReader<bool>;
111#[doc = "Field `CLERR` writer - Clock Low Error Interrupt Flag"]
112pub type CLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
113#[doc = "Field `SCLERR` reader - SCL Error Interrupt Flag"]
114pub type SCLERR_R = crate::BitReader<bool>;
115#[doc = "Field `SCLERR` writer - SCL Error Interrupt Flag"]
116pub type SCLERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
117#[doc = "Field `SDAERR` reader - SDA Error Interrupt Flag"]
118pub type SDAERR_R = crate::BitReader<bool>;
119#[doc = "Field `SDAERR` writer - SDA Error Interrupt Flag"]
120pub type SDAERR_W<'a, const O: u8> = crate::BitWriter<'a, u32, IEN_SPEC, bool, O>;
121impl R {
122    #[doc = "Bit 0 - START condition Interrupt Flag"]
123    #[inline(always)]
124    pub fn start(&self) -> START_R {
125        START_R::new((self.bits & 1) != 0)
126    }
127    #[doc = "Bit 1 - Repeated START condition Interrupt Flag"]
128    #[inline(always)]
129    pub fn rstart(&self) -> RSTART_R {
130        RSTART_R::new(((self.bits >> 1) & 1) != 0)
131    }
132    #[doc = "Bit 2 - Address Interrupt Flag"]
133    #[inline(always)]
134    pub fn addr(&self) -> ADDR_R {
135        ADDR_R::new(((self.bits >> 2) & 1) != 0)
136    }
137    #[doc = "Bit 3 - Transfer Completed Interrupt Flag"]
138    #[inline(always)]
139    pub fn txc(&self) -> TXC_R {
140        TXC_R::new(((self.bits >> 3) & 1) != 0)
141    }
142    #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"]
143    #[inline(always)]
144    pub fn txbl(&self) -> TXBL_R {
145        TXBL_R::new(((self.bits >> 4) & 1) != 0)
146    }
147    #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"]
148    #[inline(always)]
149    pub fn rxdatav(&self) -> RXDATAV_R {
150        RXDATAV_R::new(((self.bits >> 5) & 1) != 0)
151    }
152    #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"]
153    #[inline(always)]
154    pub fn ack(&self) -> ACK_R {
155        ACK_R::new(((self.bits >> 6) & 1) != 0)
156    }
157    #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"]
158    #[inline(always)]
159    pub fn nack(&self) -> NACK_R {
160        NACK_R::new(((self.bits >> 7) & 1) != 0)
161    }
162    #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"]
163    #[inline(always)]
164    pub fn mstop(&self) -> MSTOP_R {
165        MSTOP_R::new(((self.bits >> 8) & 1) != 0)
166    }
167    #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"]
168    #[inline(always)]
169    pub fn arblost(&self) -> ARBLOST_R {
170        ARBLOST_R::new(((self.bits >> 9) & 1) != 0)
171    }
172    #[doc = "Bit 10 - Bus Error Interrupt Flag"]
173    #[inline(always)]
174    pub fn buserr(&self) -> BUSERR_R {
175        BUSERR_R::new(((self.bits >> 10) & 1) != 0)
176    }
177    #[doc = "Bit 11 - Bus Held Interrupt Flag"]
178    #[inline(always)]
179    pub fn bushold(&self) -> BUSHOLD_R {
180        BUSHOLD_R::new(((self.bits >> 11) & 1) != 0)
181    }
182    #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"]
183    #[inline(always)]
184    pub fn txof(&self) -> TXOF_R {
185        TXOF_R::new(((self.bits >> 12) & 1) != 0)
186    }
187    #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"]
188    #[inline(always)]
189    pub fn rxuf(&self) -> RXUF_R {
190        RXUF_R::new(((self.bits >> 13) & 1) != 0)
191    }
192    #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"]
193    #[inline(always)]
194    pub fn bito(&self) -> BITO_R {
195        BITO_R::new(((self.bits >> 14) & 1) != 0)
196    }
197    #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"]
198    #[inline(always)]
199    pub fn clto(&self) -> CLTO_R {
200        CLTO_R::new(((self.bits >> 15) & 1) != 0)
201    }
202    #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"]
203    #[inline(always)]
204    pub fn sstop(&self) -> SSTOP_R {
205        SSTOP_R::new(((self.bits >> 16) & 1) != 0)
206    }
207    #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"]
208    #[inline(always)]
209    pub fn rxfull(&self) -> RXFULL_R {
210        RXFULL_R::new(((self.bits >> 17) & 1) != 0)
211    }
212    #[doc = "Bit 18 - Clock Low Error Interrupt Flag"]
213    #[inline(always)]
214    pub fn clerr(&self) -> CLERR_R {
215        CLERR_R::new(((self.bits >> 18) & 1) != 0)
216    }
217    #[doc = "Bit 19 - SCL Error Interrupt Flag"]
218    #[inline(always)]
219    pub fn sclerr(&self) -> SCLERR_R {
220        SCLERR_R::new(((self.bits >> 19) & 1) != 0)
221    }
222    #[doc = "Bit 20 - SDA Error Interrupt Flag"]
223    #[inline(always)]
224    pub fn sdaerr(&self) -> SDAERR_R {
225        SDAERR_R::new(((self.bits >> 20) & 1) != 0)
226    }
227}
228impl W {
229    #[doc = "Bit 0 - START condition Interrupt Flag"]
230    #[inline(always)]
231    #[must_use]
232    pub fn start(&mut self) -> START_W<0> {
233        START_W::new(self)
234    }
235    #[doc = "Bit 1 - Repeated START condition Interrupt Flag"]
236    #[inline(always)]
237    #[must_use]
238    pub fn rstart(&mut self) -> RSTART_W<1> {
239        RSTART_W::new(self)
240    }
241    #[doc = "Bit 2 - Address Interrupt Flag"]
242    #[inline(always)]
243    #[must_use]
244    pub fn addr(&mut self) -> ADDR_W<2> {
245        ADDR_W::new(self)
246    }
247    #[doc = "Bit 3 - Transfer Completed Interrupt Flag"]
248    #[inline(always)]
249    #[must_use]
250    pub fn txc(&mut self) -> TXC_W<3> {
251        TXC_W::new(self)
252    }
253    #[doc = "Bit 4 - Transmit Buffer Level Interrupt Flag"]
254    #[inline(always)]
255    #[must_use]
256    pub fn txbl(&mut self) -> TXBL_W<4> {
257        TXBL_W::new(self)
258    }
259    #[doc = "Bit 5 - Receive Data Valid Interrupt Flag"]
260    #[inline(always)]
261    #[must_use]
262    pub fn rxdatav(&mut self) -> RXDATAV_W<5> {
263        RXDATAV_W::new(self)
264    }
265    #[doc = "Bit 6 - Acknowledge Received Interrupt Flag"]
266    #[inline(always)]
267    #[must_use]
268    pub fn ack(&mut self) -> ACK_W<6> {
269        ACK_W::new(self)
270    }
271    #[doc = "Bit 7 - Not Acknowledge Received Interrupt Flag"]
272    #[inline(always)]
273    #[must_use]
274    pub fn nack(&mut self) -> NACK_W<7> {
275        NACK_W::new(self)
276    }
277    #[doc = "Bit 8 - Leader STOP Condition Interrupt Flag"]
278    #[inline(always)]
279    #[must_use]
280    pub fn mstop(&mut self) -> MSTOP_W<8> {
281        MSTOP_W::new(self)
282    }
283    #[doc = "Bit 9 - Arbitration Lost Interrupt Flag"]
284    #[inline(always)]
285    #[must_use]
286    pub fn arblost(&mut self) -> ARBLOST_W<9> {
287        ARBLOST_W::new(self)
288    }
289    #[doc = "Bit 10 - Bus Error Interrupt Flag"]
290    #[inline(always)]
291    #[must_use]
292    pub fn buserr(&mut self) -> BUSERR_W<10> {
293        BUSERR_W::new(self)
294    }
295    #[doc = "Bit 11 - Bus Held Interrupt Flag"]
296    #[inline(always)]
297    #[must_use]
298    pub fn bushold(&mut self) -> BUSHOLD_W<11> {
299        BUSHOLD_W::new(self)
300    }
301    #[doc = "Bit 12 - Transmit Buffer Overflow Interrupt Flag"]
302    #[inline(always)]
303    #[must_use]
304    pub fn txof(&mut self) -> TXOF_W<12> {
305        TXOF_W::new(self)
306    }
307    #[doc = "Bit 13 - Receive Buffer Underflow Interrupt Flag"]
308    #[inline(always)]
309    #[must_use]
310    pub fn rxuf(&mut self) -> RXUF_W<13> {
311        RXUF_W::new(self)
312    }
313    #[doc = "Bit 14 - Bus Idle Timeout Interrupt Flag"]
314    #[inline(always)]
315    #[must_use]
316    pub fn bito(&mut self) -> BITO_W<14> {
317        BITO_W::new(self)
318    }
319    #[doc = "Bit 15 - Clock Low Timeout Interrupt Flag"]
320    #[inline(always)]
321    #[must_use]
322    pub fn clto(&mut self) -> CLTO_W<15> {
323        CLTO_W::new(self)
324    }
325    #[doc = "Bit 16 - Follower STOP condition Interrupt Flag"]
326    #[inline(always)]
327    #[must_use]
328    pub fn sstop(&mut self) -> SSTOP_W<16> {
329        SSTOP_W::new(self)
330    }
331    #[doc = "Bit 17 - Receive Buffer Full Interrupt Flag"]
332    #[inline(always)]
333    #[must_use]
334    pub fn rxfull(&mut self) -> RXFULL_W<17> {
335        RXFULL_W::new(self)
336    }
337    #[doc = "Bit 18 - Clock Low Error Interrupt Flag"]
338    #[inline(always)]
339    #[must_use]
340    pub fn clerr(&mut self) -> CLERR_W<18> {
341        CLERR_W::new(self)
342    }
343    #[doc = "Bit 19 - SCL Error Interrupt Flag"]
344    #[inline(always)]
345    #[must_use]
346    pub fn sclerr(&mut self) -> SCLERR_W<19> {
347        SCLERR_W::new(self)
348    }
349    #[doc = "Bit 20 - SDA Error Interrupt Flag"]
350    #[inline(always)]
351    #[must_use]
352    pub fn sdaerr(&mut self) -> SDAERR_W<20> {
353        SDAERR_W::new(self)
354    }
355    #[doc = "Writes raw bits to the register."]
356    #[inline(always)]
357    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
358        self.0.bits(bits);
359        self
360    }
361}
362#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ien](index.html) module"]
363pub struct IEN_SPEC;
364impl crate::RegisterSpec for IEN_SPEC {
365    type Ux = u32;
366}
367#[doc = "`read()` method returns [ien::R](R) reader structure"]
368impl crate::Readable for IEN_SPEC {
369    type Reader = R;
370}
371#[doc = "`write(|w| ..)` method takes [ien::W](W) writer structure"]
372impl crate::Writable for IEN_SPEC {
373    type Writer = W;
374    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
375    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
376}
377#[doc = "`reset()` method sets IEN to value 0"]
378impl crate::Resettable for IEN_SPEC {
379    const RESET_VALUE: Self::Ux = 0;
380}
efm32pg22_pac/efm32pg22c200/i2c0_ns/ien.rs

efm32pg22_pac/efm32pg22c200/i2c0_ns/
ien.rs
