efm32pg22_pac/efm32pg22c200/hfrco0_s/
cal.rs

1#[doc = "Register `CAL` reader"]
2pub struct R(crate::R<CAL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CAL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CAL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CAL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CAL` writer"]
17pub struct W(crate::W<CAL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CAL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CAL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CAL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `TUNING` reader - Tuning Value"]
38pub type TUNING_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `TUNING` writer - Tuning Value"]
40pub type TUNING_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 7, O>;
41#[doc = "Field `FINETUNING` reader - Fine Tuning Value"]
42pub type FINETUNING_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `FINETUNING` writer - Fine Tuning Value"]
44pub type FINETUNING_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 6, O>;
45#[doc = "Field `LDOHP` reader - LDO High Power Mode"]
46pub type LDOHP_R = crate::BitReader<bool>;
47#[doc = "Field `LDOHP` writer - LDO High Power Mode"]
48pub type LDOHP_W<'a, const O: u8> = crate::BitWriter<'a, u32, CAL_SPEC, bool, O>;
49#[doc = "Field `FREQRANGE` reader - Frequency Range"]
50pub type FREQRANGE_R = crate::FieldReader<u8, u8>;
51#[doc = "Field `FREQRANGE` writer - Frequency Range"]
52pub type FREQRANGE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 5, O>;
53#[doc = "Field `CMPBIAS` reader - Comparator Bias Current"]
54pub type CMPBIAS_R = crate::FieldReader<u8, u8>;
55#[doc = "Field `CMPBIAS` writer - Comparator Bias Current"]
56pub type CMPBIAS_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 3, O>;
57#[doc = "Field `CLKDIV` reader - Locally Divide HFRCO Clock Output"]
58pub type CLKDIV_R = crate::FieldReader<u8, CLKDIV_A>;
59#[doc = "Locally Divide HFRCO Clock Output\n\nValue on reset: 0"]
60#[derive(Clone, Copy, Debug, PartialEq, Eq)]
61#[repr(u8)]
62pub enum CLKDIV_A {
63    #[doc = "0: Divide by 1."]
64    DIV1 = 0,
65    #[doc = "1: Divide by 2."]
66    DIV2 = 1,
67    #[doc = "2: Divide by 4."]
68    DIV4 = 2,
69}
70impl From<CLKDIV_A> for u8 {
71    #[inline(always)]
72    fn from(variant: CLKDIV_A) -> Self {
73        variant as _
74    }
75}
76impl CLKDIV_R {
77    #[doc = "Get enumerated values variant"]
78    #[inline(always)]
79    pub fn variant(&self) -> Option<CLKDIV_A> {
80        match self.bits {
81            0 => Some(CLKDIV_A::DIV1),
82            1 => Some(CLKDIV_A::DIV2),
83            2 => Some(CLKDIV_A::DIV4),
84            _ => None,
85        }
86    }
87    #[doc = "Checks if the value of the field is `DIV1`"]
88    #[inline(always)]
89    pub fn is_div1(&self) -> bool {
90        *self == CLKDIV_A::DIV1
91    }
92    #[doc = "Checks if the value of the field is `DIV2`"]
93    #[inline(always)]
94    pub fn is_div2(&self) -> bool {
95        *self == CLKDIV_A::DIV2
96    }
97    #[doc = "Checks if the value of the field is `DIV4`"]
98    #[inline(always)]
99    pub fn is_div4(&self) -> bool {
100        *self == CLKDIV_A::DIV4
101    }
102}
103#[doc = "Field `CLKDIV` writer - Locally Divide HFRCO Clock Output"]
104pub type CLKDIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, CLKDIV_A, 2, O>;
105impl<'a, const O: u8> CLKDIV_W<'a, O> {
106    #[doc = "Divide by 1."]
107    #[inline(always)]
108    pub fn div1(self) -> &'a mut W {
109        self.variant(CLKDIV_A::DIV1)
110    }
111    #[doc = "Divide by 2."]
112    #[inline(always)]
113    pub fn div2(self) -> &'a mut W {
114        self.variant(CLKDIV_A::DIV2)
115    }
116    #[doc = "Divide by 4."]
117    #[inline(always)]
118    pub fn div4(self) -> &'a mut W {
119        self.variant(CLKDIV_A::DIV4)
120    }
121}
122#[doc = "Field `CMPSEL` reader - Comparator Load Select"]
123pub type CMPSEL_R = crate::FieldReader<u8, u8>;
124#[doc = "Field `CMPSEL` writer - Comparator Load Select"]
125pub type CMPSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 2, O>;
126#[doc = "Field `IREFTC` reader - Tempco Trim on Comparator Current"]
127pub type IREFTC_R = crate::FieldReader<u8, u8>;
128#[doc = "Field `IREFTC` writer - Tempco Trim on Comparator Current"]
129pub type IREFTC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CAL_SPEC, u8, u8, 4, O>;
130impl R {
131    #[doc = "Bits 0:6 - Tuning Value"]
132    #[inline(always)]
133    pub fn tuning(&self) -> TUNING_R {
134        TUNING_R::new((self.bits & 0x7f) as u8)
135    }
136    #[doc = "Bits 8:13 - Fine Tuning Value"]
137    #[inline(always)]
138    pub fn finetuning(&self) -> FINETUNING_R {
139        FINETUNING_R::new(((self.bits >> 8) & 0x3f) as u8)
140    }
141    #[doc = "Bit 15 - LDO High Power Mode"]
142    #[inline(always)]
143    pub fn ldohp(&self) -> LDOHP_R {
144        LDOHP_R::new(((self.bits >> 15) & 1) != 0)
145    }
146    #[doc = "Bits 16:20 - Frequency Range"]
147    #[inline(always)]
148    pub fn freqrange(&self) -> FREQRANGE_R {
149        FREQRANGE_R::new(((self.bits >> 16) & 0x1f) as u8)
150    }
151    #[doc = "Bits 21:23 - Comparator Bias Current"]
152    #[inline(always)]
153    pub fn cmpbias(&self) -> CMPBIAS_R {
154        CMPBIAS_R::new(((self.bits >> 21) & 7) as u8)
155    }
156    #[doc = "Bits 24:25 - Locally Divide HFRCO Clock Output"]
157    #[inline(always)]
158    pub fn clkdiv(&self) -> CLKDIV_R {
159        CLKDIV_R::new(((self.bits >> 24) & 3) as u8)
160    }
161    #[doc = "Bits 26:27 - Comparator Load Select"]
162    #[inline(always)]
163    pub fn cmpsel(&self) -> CMPSEL_R {
164        CMPSEL_R::new(((self.bits >> 26) & 3) as u8)
165    }
166    #[doc = "Bits 28:31 - Tempco Trim on Comparator Current"]
167    #[inline(always)]
168    pub fn ireftc(&self) -> IREFTC_R {
169        IREFTC_R::new(((self.bits >> 28) & 0x0f) as u8)
170    }
171}
172impl W {
173    #[doc = "Bits 0:6 - Tuning Value"]
174    #[inline(always)]
175    #[must_use]
176    pub fn tuning(&mut self) -> TUNING_W<0> {
177        TUNING_W::new(self)
178    }
179    #[doc = "Bits 8:13 - Fine Tuning Value"]
180    #[inline(always)]
181    #[must_use]
182    pub fn finetuning(&mut self) -> FINETUNING_W<8> {
183        FINETUNING_W::new(self)
184    }
185    #[doc = "Bit 15 - LDO High Power Mode"]
186    #[inline(always)]
187    #[must_use]
188    pub fn ldohp(&mut self) -> LDOHP_W<15> {
189        LDOHP_W::new(self)
190    }
191    #[doc = "Bits 16:20 - Frequency Range"]
192    #[inline(always)]
193    #[must_use]
194    pub fn freqrange(&mut self) -> FREQRANGE_W<16> {
195        FREQRANGE_W::new(self)
196    }
197    #[doc = "Bits 21:23 - Comparator Bias Current"]
198    #[inline(always)]
199    #[must_use]
200    pub fn cmpbias(&mut self) -> CMPBIAS_W<21> {
201        CMPBIAS_W::new(self)
202    }
203    #[doc = "Bits 24:25 - Locally Divide HFRCO Clock Output"]
204    #[inline(always)]
205    #[must_use]
206    pub fn clkdiv(&mut self) -> CLKDIV_W<24> {
207        CLKDIV_W::new(self)
208    }
209    #[doc = "Bits 26:27 - Comparator Load Select"]
210    #[inline(always)]
211    #[must_use]
212    pub fn cmpsel(&mut self) -> CMPSEL_W<26> {
213        CMPSEL_W::new(self)
214    }
215    #[doc = "Bits 28:31 - Tempco Trim on Comparator Current"]
216    #[inline(always)]
217    #[must_use]
218    pub fn ireftc(&mut self) -> IREFTC_W<28> {
219        IREFTC_W::new(self)
220    }
221    #[doc = "Writes raw bits to the register."]
222    #[inline(always)]
223    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
224        self.0.bits(bits);
225        self
226    }
227}
228#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cal](index.html) module"]
229pub struct CAL_SPEC;
230impl crate::RegisterSpec for CAL_SPEC {
231    type Ux = u32;
232}
233#[doc = "`read()` method returns [cal::R](R) reader structure"]
234impl crate::Readable for CAL_SPEC {
235    type Reader = R;
236}
237#[doc = "`write(|w| ..)` method takes [cal::W](W) writer structure"]
238impl crate::Writable for CAL_SPEC {
239    type Writer = W;
240    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
241    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
242}
243#[doc = "`reset()` method sets CAL to value 0xa868_9f7f"]
244impl crate::Resettable for CAL_SPEC {
245    const RESET_VALUE: Self::Ux = 0xa868_9f7f;
246}
efm32pg22_pac/efm32pg22c200/hfrco0_s/cal.rs

efm32pg22_pac/efm32pg22c200/hfrco0_s/
cal.rs
