efm32pg22_pac/efm32pg22c200/gpio_s/
extipsell.rs

1#[doc = "Register `EXTIPSELL` reader"]
2pub struct R(crate::R<EXTIPSELL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<EXTIPSELL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<EXTIPSELL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<EXTIPSELL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `EXTIPSELL` writer"]
17pub struct W(crate::W<EXTIPSELL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<EXTIPSELL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<EXTIPSELL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<EXTIPSELL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `EXTIPSEL0` reader - External Interrupt Port Select"]
38pub type EXTIPSEL0_R = crate::FieldReader<u8, EXTIPSEL0_A>;
39#[doc = "External Interrupt Port Select\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum EXTIPSEL0_A {
43    #[doc = "0: Port A group selected"]
44    PORTA = 0,
45    #[doc = "1: Port B group selected"]
46    PORTB = 1,
47    #[doc = "2: Port C group selected"]
48    PORTC = 2,
49    #[doc = "3: Port D group selected"]
50    PORTD = 3,
51}
52impl From<EXTIPSEL0_A> for u8 {
53    #[inline(always)]
54    fn from(variant: EXTIPSEL0_A) -> Self {
55        variant as _
56    }
57}
58impl EXTIPSEL0_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> EXTIPSEL0_A {
62        match self.bits {
63            0 => EXTIPSEL0_A::PORTA,
64            1 => EXTIPSEL0_A::PORTB,
65            2 => EXTIPSEL0_A::PORTC,
66            3 => EXTIPSEL0_A::PORTD,
67            _ => unreachable!(),
68        }
69    }
70    #[doc = "Checks if the value of the field is `PORTA`"]
71    #[inline(always)]
72    pub fn is_porta(&self) -> bool {
73        *self == EXTIPSEL0_A::PORTA
74    }
75    #[doc = "Checks if the value of the field is `PORTB`"]
76    #[inline(always)]
77    pub fn is_portb(&self) -> bool {
78        *self == EXTIPSEL0_A::PORTB
79    }
80    #[doc = "Checks if the value of the field is `PORTC`"]
81    #[inline(always)]
82    pub fn is_portc(&self) -> bool {
83        *self == EXTIPSEL0_A::PORTC
84    }
85    #[doc = "Checks if the value of the field is `PORTD`"]
86    #[inline(always)]
87    pub fn is_portd(&self) -> bool {
88        *self == EXTIPSEL0_A::PORTD
89    }
90}
91#[doc = "Field `EXTIPSEL0` writer - External Interrupt Port Select"]
92pub type EXTIPSEL0_W<'a, const O: u8> =
93    crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL0_A, 2, O>;
94impl<'a, const O: u8> EXTIPSEL0_W<'a, O> {
95    #[doc = "Port A group selected"]
96    #[inline(always)]
97    pub fn porta(self) -> &'a mut W {
98        self.variant(EXTIPSEL0_A::PORTA)
99    }
100    #[doc = "Port B group selected"]
101    #[inline(always)]
102    pub fn portb(self) -> &'a mut W {
103        self.variant(EXTIPSEL0_A::PORTB)
104    }
105    #[doc = "Port C group selected"]
106    #[inline(always)]
107    pub fn portc(self) -> &'a mut W {
108        self.variant(EXTIPSEL0_A::PORTC)
109    }
110    #[doc = "Port D group selected"]
111    #[inline(always)]
112    pub fn portd(self) -> &'a mut W {
113        self.variant(EXTIPSEL0_A::PORTD)
114    }
115}
116#[doc = "Field `EXTIPSEL1` reader - External Interrupt Port Select"]
117pub type EXTIPSEL1_R = crate::FieldReader<u8, EXTIPSEL1_A>;
118#[doc = "External Interrupt Port Select\n\nValue on reset: 0"]
119#[derive(Clone, Copy, Debug, PartialEq, Eq)]
120#[repr(u8)]
121pub enum EXTIPSEL1_A {
122    #[doc = "0: Port A group selected"]
123    PORTA = 0,
124    #[doc = "1: Port B group selected"]
125    PORTB = 1,
126    #[doc = "2: Port C group selected"]
127    PORTC = 2,
128    #[doc = "3: Port D group selected"]
129    PORTD = 3,
130}
131impl From<EXTIPSEL1_A> for u8 {
132    #[inline(always)]
133    fn from(variant: EXTIPSEL1_A) -> Self {
134        variant as _
135    }
136}
137impl EXTIPSEL1_R {
138    #[doc = "Get enumerated values variant"]
139    #[inline(always)]
140    pub fn variant(&self) -> EXTIPSEL1_A {
141        match self.bits {
142            0 => EXTIPSEL1_A::PORTA,
143            1 => EXTIPSEL1_A::PORTB,
144            2 => EXTIPSEL1_A::PORTC,
145            3 => EXTIPSEL1_A::PORTD,
146            _ => unreachable!(),
147        }
148    }
149    #[doc = "Checks if the value of the field is `PORTA`"]
150    #[inline(always)]
151    pub fn is_porta(&self) -> bool {
152        *self == EXTIPSEL1_A::PORTA
153    }
154    #[doc = "Checks if the value of the field is `PORTB`"]
155    #[inline(always)]
156    pub fn is_portb(&self) -> bool {
157        *self == EXTIPSEL1_A::PORTB
158    }
159    #[doc = "Checks if the value of the field is `PORTC`"]
160    #[inline(always)]
161    pub fn is_portc(&self) -> bool {
162        *self == EXTIPSEL1_A::PORTC
163    }
164    #[doc = "Checks if the value of the field is `PORTD`"]
165    #[inline(always)]
166    pub fn is_portd(&self) -> bool {
167        *self == EXTIPSEL1_A::PORTD
168    }
169}
170#[doc = "Field `EXTIPSEL1` writer - External Interrupt Port Select"]
171pub type EXTIPSEL1_W<'a, const O: u8> =
172    crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL1_A, 2, O>;
173impl<'a, const O: u8> EXTIPSEL1_W<'a, O> {
174    #[doc = "Port A group selected"]
175    #[inline(always)]
176    pub fn porta(self) -> &'a mut W {
177        self.variant(EXTIPSEL1_A::PORTA)
178    }
179    #[doc = "Port B group selected"]
180    #[inline(always)]
181    pub fn portb(self) -> &'a mut W {
182        self.variant(EXTIPSEL1_A::PORTB)
183    }
184    #[doc = "Port C group selected"]
185    #[inline(always)]
186    pub fn portc(self) -> &'a mut W {
187        self.variant(EXTIPSEL1_A::PORTC)
188    }
189    #[doc = "Port D group selected"]
190    #[inline(always)]
191    pub fn portd(self) -> &'a mut W {
192        self.variant(EXTIPSEL1_A::PORTD)
193    }
194}
195#[doc = "Field `EXTIPSEL2` reader - External Interrupt Port Select"]
196pub type EXTIPSEL2_R = crate::FieldReader<u8, EXTIPSEL2_A>;
197#[doc = "External Interrupt Port Select\n\nValue on reset: 0"]
198#[derive(Clone, Copy, Debug, PartialEq, Eq)]
199#[repr(u8)]
200pub enum EXTIPSEL2_A {
201    #[doc = "0: Port A group selected"]
202    PORTA = 0,
203    #[doc = "1: Port B group selected"]
204    PORTB = 1,
205    #[doc = "2: Port C group selected"]
206    PORTC = 2,
207    #[doc = "3: Port D group selected"]
208    PORTD = 3,
209}
210impl From<EXTIPSEL2_A> for u8 {
211    #[inline(always)]
212    fn from(variant: EXTIPSEL2_A) -> Self {
213        variant as _
214    }
215}
216impl EXTIPSEL2_R {
217    #[doc = "Get enumerated values variant"]
218    #[inline(always)]
219    pub fn variant(&self) -> EXTIPSEL2_A {
220        match self.bits {
221            0 => EXTIPSEL2_A::PORTA,
222            1 => EXTIPSEL2_A::PORTB,
223            2 => EXTIPSEL2_A::PORTC,
224            3 => EXTIPSEL2_A::PORTD,
225            _ => unreachable!(),
226        }
227    }
228    #[doc = "Checks if the value of the field is `PORTA`"]
229    #[inline(always)]
230    pub fn is_porta(&self) -> bool {
231        *self == EXTIPSEL2_A::PORTA
232    }
233    #[doc = "Checks if the value of the field is `PORTB`"]
234    #[inline(always)]
235    pub fn is_portb(&self) -> bool {
236        *self == EXTIPSEL2_A::PORTB
237    }
238    #[doc = "Checks if the value of the field is `PORTC`"]
239    #[inline(always)]
240    pub fn is_portc(&self) -> bool {
241        *self == EXTIPSEL2_A::PORTC
242    }
243    #[doc = "Checks if the value of the field is `PORTD`"]
244    #[inline(always)]
245    pub fn is_portd(&self) -> bool {
246        *self == EXTIPSEL2_A::PORTD
247    }
248}
249#[doc = "Field `EXTIPSEL2` writer - External Interrupt Port Select"]
250pub type EXTIPSEL2_W<'a, const O: u8> =
251    crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL2_A, 2, O>;
252impl<'a, const O: u8> EXTIPSEL2_W<'a, O> {
253    #[doc = "Port A group selected"]
254    #[inline(always)]
255    pub fn porta(self) -> &'a mut W {
256        self.variant(EXTIPSEL2_A::PORTA)
257    }
258    #[doc = "Port B group selected"]
259    #[inline(always)]
260    pub fn portb(self) -> &'a mut W {
261        self.variant(EXTIPSEL2_A::PORTB)
262    }
263    #[doc = "Port C group selected"]
264    #[inline(always)]
265    pub fn portc(self) -> &'a mut W {
266        self.variant(EXTIPSEL2_A::PORTC)
267    }
268    #[doc = "Port D group selected"]
269    #[inline(always)]
270    pub fn portd(self) -> &'a mut W {
271        self.variant(EXTIPSEL2_A::PORTD)
272    }
273}
274#[doc = "Field `EXTIPSEL3` reader - External Interrupt Port Select"]
275pub type EXTIPSEL3_R = crate::FieldReader<u8, EXTIPSEL3_A>;
276#[doc = "External Interrupt Port Select\n\nValue on reset: 0"]
277#[derive(Clone, Copy, Debug, PartialEq, Eq)]
278#[repr(u8)]
279pub enum EXTIPSEL3_A {
280    #[doc = "0: Port A group selected"]
281    PORTA = 0,
282    #[doc = "1: Port B group selected"]
283    PORTB = 1,
284    #[doc = "2: Port C group selected"]
285    PORTC = 2,
286    #[doc = "3: Port D group selected"]
287    PORTD = 3,
288}
289impl From<EXTIPSEL3_A> for u8 {
290    #[inline(always)]
291    fn from(variant: EXTIPSEL3_A) -> Self {
292        variant as _
293    }
294}
295impl EXTIPSEL3_R {
296    #[doc = "Get enumerated values variant"]
297    #[inline(always)]
298    pub fn variant(&self) -> EXTIPSEL3_A {
299        match self.bits {
300            0 => EXTIPSEL3_A::PORTA,
301            1 => EXTIPSEL3_A::PORTB,
302            2 => EXTIPSEL3_A::PORTC,
303            3 => EXTIPSEL3_A::PORTD,
304            _ => unreachable!(),
305        }
306    }
307    #[doc = "Checks if the value of the field is `PORTA`"]
308    #[inline(always)]
309    pub fn is_porta(&self) -> bool {
310        *self == EXTIPSEL3_A::PORTA
311    }
312    #[doc = "Checks if the value of the field is `PORTB`"]
313    #[inline(always)]
314    pub fn is_portb(&self) -> bool {
315        *self == EXTIPSEL3_A::PORTB
316    }
317    #[doc = "Checks if the value of the field is `PORTC`"]
318    #[inline(always)]
319    pub fn is_portc(&self) -> bool {
320        *self == EXTIPSEL3_A::PORTC
321    }
322    #[doc = "Checks if the value of the field is `PORTD`"]
323    #[inline(always)]
324    pub fn is_portd(&self) -> bool {
325        *self == EXTIPSEL3_A::PORTD
326    }
327}
328#[doc = "Field `EXTIPSEL3` writer - External Interrupt Port Select"]
329pub type EXTIPSEL3_W<'a, const O: u8> =
330    crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL3_A, 2, O>;
331impl<'a, const O: u8> EXTIPSEL3_W<'a, O> {
332    #[doc = "Port A group selected"]
333    #[inline(always)]
334    pub fn porta(self) -> &'a mut W {
335        self.variant(EXTIPSEL3_A::PORTA)
336    }
337    #[doc = "Port B group selected"]
338    #[inline(always)]
339    pub fn portb(self) -> &'a mut W {
340        self.variant(EXTIPSEL3_A::PORTB)
341    }
342    #[doc = "Port C group selected"]
343    #[inline(always)]
344    pub fn portc(self) -> &'a mut W {
345        self.variant(EXTIPSEL3_A::PORTC)
346    }
347    #[doc = "Port D group selected"]
348    #[inline(always)]
349    pub fn portd(self) -> &'a mut W {
350        self.variant(EXTIPSEL3_A::PORTD)
351    }
352}
353#[doc = "Field `EXTIPSEL4` reader - External Interrupt Port Select"]
354pub type EXTIPSEL4_R = crate::FieldReader<u8, EXTIPSEL4_A>;
355#[doc = "External Interrupt Port Select\n\nValue on reset: 0"]
356#[derive(Clone, Copy, Debug, PartialEq, Eq)]
357#[repr(u8)]
358pub enum EXTIPSEL4_A {
359    #[doc = "0: Port A group selected"]
360    PORTA = 0,
361    #[doc = "1: Port B group selected"]
362    PORTB = 1,
363    #[doc = "2: Port C group selected"]
364    PORTC = 2,
365    #[doc = "3: Port D group selected"]
366    PORTD = 3,
367}
368impl From<EXTIPSEL4_A> for u8 {
369    #[inline(always)]
370    fn from(variant: EXTIPSEL4_A) -> Self {
371        variant as _
372    }
373}
374impl EXTIPSEL4_R {
375    #[doc = "Get enumerated values variant"]
376    #[inline(always)]
377    pub fn variant(&self) -> EXTIPSEL4_A {
378        match self.bits {
379            0 => EXTIPSEL4_A::PORTA,
380            1 => EXTIPSEL4_A::PORTB,
381            2 => EXTIPSEL4_A::PORTC,
382            3 => EXTIPSEL4_A::PORTD,
383            _ => unreachable!(),
384        }
385    }
386    #[doc = "Checks if the value of the field is `PORTA`"]
387    #[inline(always)]
388    pub fn is_porta(&self) -> bool {
389        *self == EXTIPSEL4_A::PORTA
390    }
391    #[doc = "Checks if the value of the field is `PORTB`"]
392    #[inline(always)]
393    pub fn is_portb(&self) -> bool {
394        *self == EXTIPSEL4_A::PORTB
395    }
396    #[doc = "Checks if the value of the field is `PORTC`"]
397    #[inline(always)]
398    pub fn is_portc(&self) -> bool {
399        *self == EXTIPSEL4_A::PORTC
400    }
401    #[doc = "Checks if the value of the field is `PORTD`"]
402    #[inline(always)]
403    pub fn is_portd(&self) -> bool {
404        *self == EXTIPSEL4_A::PORTD
405    }
406}
407#[doc = "Field `EXTIPSEL4` writer - External Interrupt Port Select"]
408pub type EXTIPSEL4_W<'a, const O: u8> =
409    crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL4_A, 2, O>;
410impl<'a, const O: u8> EXTIPSEL4_W<'a, O> {
411    #[doc = "Port A group selected"]
412    #[inline(always)]
413    pub fn porta(self) -> &'a mut W {
414        self.variant(EXTIPSEL4_A::PORTA)
415    }
416    #[doc = "Port B group selected"]
417    #[inline(always)]
418    pub fn portb(self) -> &'a mut W {
419        self.variant(EXTIPSEL4_A::PORTB)
420    }
421    #[doc = "Port C group selected"]
422    #[inline(always)]
423    pub fn portc(self) -> &'a mut W {
424        self.variant(EXTIPSEL4_A::PORTC)
425    }
426    #[doc = "Port D group selected"]
427    #[inline(always)]
428    pub fn portd(self) -> &'a mut W {
429        self.variant(EXTIPSEL4_A::PORTD)
430    }
431}
432#[doc = "Field `EXTIPSEL5` reader - External Interrupt Port Select"]
433pub type EXTIPSEL5_R = crate::FieldReader<u8, EXTIPSEL5_A>;
434#[doc = "External Interrupt Port Select\n\nValue on reset: 0"]
435#[derive(Clone, Copy, Debug, PartialEq, Eq)]
436#[repr(u8)]
437pub enum EXTIPSEL5_A {
438    #[doc = "0: Port A group selected"]
439    PORTA = 0,
440    #[doc = "1: Port B group selected"]
441    PORTB = 1,
442    #[doc = "2: Port C group selected"]
443    PORTC = 2,
444    #[doc = "3: Port D group selected"]
445    PORTD = 3,
446}
447impl From<EXTIPSEL5_A> for u8 {
448    #[inline(always)]
449    fn from(variant: EXTIPSEL5_A) -> Self {
450        variant as _
451    }
452}
453impl EXTIPSEL5_R {
454    #[doc = "Get enumerated values variant"]
455    #[inline(always)]
456    pub fn variant(&self) -> EXTIPSEL5_A {
457        match self.bits {
458            0 => EXTIPSEL5_A::PORTA,
459            1 => EXTIPSEL5_A::PORTB,
460            2 => EXTIPSEL5_A::PORTC,
461            3 => EXTIPSEL5_A::PORTD,
462            _ => unreachable!(),
463        }
464    }
465    #[doc = "Checks if the value of the field is `PORTA`"]
466    #[inline(always)]
467    pub fn is_porta(&self) -> bool {
468        *self == EXTIPSEL5_A::PORTA
469    }
470    #[doc = "Checks if the value of the field is `PORTB`"]
471    #[inline(always)]
472    pub fn is_portb(&self) -> bool {
473        *self == EXTIPSEL5_A::PORTB
474    }
475    #[doc = "Checks if the value of the field is `PORTC`"]
476    #[inline(always)]
477    pub fn is_portc(&self) -> bool {
478        *self == EXTIPSEL5_A::PORTC
479    }
480    #[doc = "Checks if the value of the field is `PORTD`"]
481    #[inline(always)]
482    pub fn is_portd(&self) -> bool {
483        *self == EXTIPSEL5_A::PORTD
484    }
485}
486#[doc = "Field `EXTIPSEL5` writer - External Interrupt Port Select"]
487pub type EXTIPSEL5_W<'a, const O: u8> =
488    crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL5_A, 2, O>;
489impl<'a, const O: u8> EXTIPSEL5_W<'a, O> {
490    #[doc = "Port A group selected"]
491    #[inline(always)]
492    pub fn porta(self) -> &'a mut W {
493        self.variant(EXTIPSEL5_A::PORTA)
494    }
495    #[doc = "Port B group selected"]
496    #[inline(always)]
497    pub fn portb(self) -> &'a mut W {
498        self.variant(EXTIPSEL5_A::PORTB)
499    }
500    #[doc = "Port C group selected"]
501    #[inline(always)]
502    pub fn portc(self) -> &'a mut W {
503        self.variant(EXTIPSEL5_A::PORTC)
504    }
505    #[doc = "Port D group selected"]
506    #[inline(always)]
507    pub fn portd(self) -> &'a mut W {
508        self.variant(EXTIPSEL5_A::PORTD)
509    }
510}
511#[doc = "Field `EXTIPSEL6` reader - External Interrupt Port Select"]
512pub type EXTIPSEL6_R = crate::FieldReader<u8, EXTIPSEL6_A>;
513#[doc = "External Interrupt Port Select\n\nValue on reset: 0"]
514#[derive(Clone, Copy, Debug, PartialEq, Eq)]
515#[repr(u8)]
516pub enum EXTIPSEL6_A {
517    #[doc = "0: Port A group selected"]
518    PORTA = 0,
519    #[doc = "1: Port B group selected"]
520    PORTB = 1,
521    #[doc = "2: Port C group selected"]
522    PORTC = 2,
523    #[doc = "3: Port D group selected"]
524    PORTD = 3,
525}
526impl From<EXTIPSEL6_A> for u8 {
527    #[inline(always)]
528    fn from(variant: EXTIPSEL6_A) -> Self {
529        variant as _
530    }
531}
532impl EXTIPSEL6_R {
533    #[doc = "Get enumerated values variant"]
534    #[inline(always)]
535    pub fn variant(&self) -> EXTIPSEL6_A {
536        match self.bits {
537            0 => EXTIPSEL6_A::PORTA,
538            1 => EXTIPSEL6_A::PORTB,
539            2 => EXTIPSEL6_A::PORTC,
540            3 => EXTIPSEL6_A::PORTD,
541            _ => unreachable!(),
542        }
543    }
544    #[doc = "Checks if the value of the field is `PORTA`"]
545    #[inline(always)]
546    pub fn is_porta(&self) -> bool {
547        *self == EXTIPSEL6_A::PORTA
548    }
549    #[doc = "Checks if the value of the field is `PORTB`"]
550    #[inline(always)]
551    pub fn is_portb(&self) -> bool {
552        *self == EXTIPSEL6_A::PORTB
553    }
554    #[doc = "Checks if the value of the field is `PORTC`"]
555    #[inline(always)]
556    pub fn is_portc(&self) -> bool {
557        *self == EXTIPSEL6_A::PORTC
558    }
559    #[doc = "Checks if the value of the field is `PORTD`"]
560    #[inline(always)]
561    pub fn is_portd(&self) -> bool {
562        *self == EXTIPSEL6_A::PORTD
563    }
564}
565#[doc = "Field `EXTIPSEL6` writer - External Interrupt Port Select"]
566pub type EXTIPSEL6_W<'a, const O: u8> =
567    crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL6_A, 2, O>;
568impl<'a, const O: u8> EXTIPSEL6_W<'a, O> {
569    #[doc = "Port A group selected"]
570    #[inline(always)]
571    pub fn porta(self) -> &'a mut W {
572        self.variant(EXTIPSEL6_A::PORTA)
573    }
574    #[doc = "Port B group selected"]
575    #[inline(always)]
576    pub fn portb(self) -> &'a mut W {
577        self.variant(EXTIPSEL6_A::PORTB)
578    }
579    #[doc = "Port C group selected"]
580    #[inline(always)]
581    pub fn portc(self) -> &'a mut W {
582        self.variant(EXTIPSEL6_A::PORTC)
583    }
584    #[doc = "Port D group selected"]
585    #[inline(always)]
586    pub fn portd(self) -> &'a mut W {
587        self.variant(EXTIPSEL6_A::PORTD)
588    }
589}
590#[doc = "Field `EXTIPSEL7` reader - External Interrupt Port Select"]
591pub type EXTIPSEL7_R = crate::FieldReader<u8, EXTIPSEL7_A>;
592#[doc = "External Interrupt Port Select\n\nValue on reset: 0"]
593#[derive(Clone, Copy, Debug, PartialEq, Eq)]
594#[repr(u8)]
595pub enum EXTIPSEL7_A {
596    #[doc = "0: Port A group selected"]
597    PORTA = 0,
598    #[doc = "1: Port B group selected"]
599    PORTB = 1,
600    #[doc = "2: Port C group selected"]
601    PORTC = 2,
602    #[doc = "3: Port D group selected"]
603    PORTD = 3,
604}
605impl From<EXTIPSEL7_A> for u8 {
606    #[inline(always)]
607    fn from(variant: EXTIPSEL7_A) -> Self {
608        variant as _
609    }
610}
611impl EXTIPSEL7_R {
612    #[doc = "Get enumerated values variant"]
613    #[inline(always)]
614    pub fn variant(&self) -> EXTIPSEL7_A {
615        match self.bits {
616            0 => EXTIPSEL7_A::PORTA,
617            1 => EXTIPSEL7_A::PORTB,
618            2 => EXTIPSEL7_A::PORTC,
619            3 => EXTIPSEL7_A::PORTD,
620            _ => unreachable!(),
621        }
622    }
623    #[doc = "Checks if the value of the field is `PORTA`"]
624    #[inline(always)]
625    pub fn is_porta(&self) -> bool {
626        *self == EXTIPSEL7_A::PORTA
627    }
628    #[doc = "Checks if the value of the field is `PORTB`"]
629    #[inline(always)]
630    pub fn is_portb(&self) -> bool {
631        *self == EXTIPSEL7_A::PORTB
632    }
633    #[doc = "Checks if the value of the field is `PORTC`"]
634    #[inline(always)]
635    pub fn is_portc(&self) -> bool {
636        *self == EXTIPSEL7_A::PORTC
637    }
638    #[doc = "Checks if the value of the field is `PORTD`"]
639    #[inline(always)]
640    pub fn is_portd(&self) -> bool {
641        *self == EXTIPSEL7_A::PORTD
642    }
643}
644#[doc = "Field `EXTIPSEL7` writer - External Interrupt Port Select"]
645pub type EXTIPSEL7_W<'a, const O: u8> =
646    crate::FieldWriterSafe<'a, u32, EXTIPSELL_SPEC, u8, EXTIPSEL7_A, 2, O>;
647impl<'a, const O: u8> EXTIPSEL7_W<'a, O> {
648    #[doc = "Port A group selected"]
649    #[inline(always)]
650    pub fn porta(self) -> &'a mut W {
651        self.variant(EXTIPSEL7_A::PORTA)
652    }
653    #[doc = "Port B group selected"]
654    #[inline(always)]
655    pub fn portb(self) -> &'a mut W {
656        self.variant(EXTIPSEL7_A::PORTB)
657    }
658    #[doc = "Port C group selected"]
659    #[inline(always)]
660    pub fn portc(self) -> &'a mut W {
661        self.variant(EXTIPSEL7_A::PORTC)
662    }
663    #[doc = "Port D group selected"]
664    #[inline(always)]
665    pub fn portd(self) -> &'a mut W {
666        self.variant(EXTIPSEL7_A::PORTD)
667    }
668}
669impl R {
670    #[doc = "Bits 0:1 - External Interrupt Port Select"]
671    #[inline(always)]
672    pub fn extipsel0(&self) -> EXTIPSEL0_R {
673        EXTIPSEL0_R::new((self.bits & 3) as u8)
674    }
675    #[doc = "Bits 4:5 - External Interrupt Port Select"]
676    #[inline(always)]
677    pub fn extipsel1(&self) -> EXTIPSEL1_R {
678        EXTIPSEL1_R::new(((self.bits >> 4) & 3) as u8)
679    }
680    #[doc = "Bits 8:9 - External Interrupt Port Select"]
681    #[inline(always)]
682    pub fn extipsel2(&self) -> EXTIPSEL2_R {
683        EXTIPSEL2_R::new(((self.bits >> 8) & 3) as u8)
684    }
685    #[doc = "Bits 12:13 - External Interrupt Port Select"]
686    #[inline(always)]
687    pub fn extipsel3(&self) -> EXTIPSEL3_R {
688        EXTIPSEL3_R::new(((self.bits >> 12) & 3) as u8)
689    }
690    #[doc = "Bits 16:17 - External Interrupt Port Select"]
691    #[inline(always)]
692    pub fn extipsel4(&self) -> EXTIPSEL4_R {
693        EXTIPSEL4_R::new(((self.bits >> 16) & 3) as u8)
694    }
695    #[doc = "Bits 20:21 - External Interrupt Port Select"]
696    #[inline(always)]
697    pub fn extipsel5(&self) -> EXTIPSEL5_R {
698        EXTIPSEL5_R::new(((self.bits >> 20) & 3) as u8)
699    }
700    #[doc = "Bits 24:25 - External Interrupt Port Select"]
701    #[inline(always)]
702    pub fn extipsel6(&self) -> EXTIPSEL6_R {
703        EXTIPSEL6_R::new(((self.bits >> 24) & 3) as u8)
704    }
705    #[doc = "Bits 28:29 - External Interrupt Port Select"]
706    #[inline(always)]
707    pub fn extipsel7(&self) -> EXTIPSEL7_R {
708        EXTIPSEL7_R::new(((self.bits >> 28) & 3) as u8)
709    }
710}
711impl W {
712    #[doc = "Bits 0:1 - External Interrupt Port Select"]
713    #[inline(always)]
714    #[must_use]
715    pub fn extipsel0(&mut self) -> EXTIPSEL0_W<0> {
716        EXTIPSEL0_W::new(self)
717    }
718    #[doc = "Bits 4:5 - External Interrupt Port Select"]
719    #[inline(always)]
720    #[must_use]
721    pub fn extipsel1(&mut self) -> EXTIPSEL1_W<4> {
722        EXTIPSEL1_W::new(self)
723    }
724    #[doc = "Bits 8:9 - External Interrupt Port Select"]
725    #[inline(always)]
726    #[must_use]
727    pub fn extipsel2(&mut self) -> EXTIPSEL2_W<8> {
728        EXTIPSEL2_W::new(self)
729    }
730    #[doc = "Bits 12:13 - External Interrupt Port Select"]
731    #[inline(always)]
732    #[must_use]
733    pub fn extipsel3(&mut self) -> EXTIPSEL3_W<12> {
734        EXTIPSEL3_W::new(self)
735    }
736    #[doc = "Bits 16:17 - External Interrupt Port Select"]
737    #[inline(always)]
738    #[must_use]
739    pub fn extipsel4(&mut self) -> EXTIPSEL4_W<16> {
740        EXTIPSEL4_W::new(self)
741    }
742    #[doc = "Bits 20:21 - External Interrupt Port Select"]
743    #[inline(always)]
744    #[must_use]
745    pub fn extipsel5(&mut self) -> EXTIPSEL5_W<20> {
746        EXTIPSEL5_W::new(self)
747    }
748    #[doc = "Bits 24:25 - External Interrupt Port Select"]
749    #[inline(always)]
750    #[must_use]
751    pub fn extipsel6(&mut self) -> EXTIPSEL6_W<24> {
752        EXTIPSEL6_W::new(self)
753    }
754    #[doc = "Bits 28:29 - External Interrupt Port Select"]
755    #[inline(always)]
756    #[must_use]
757    pub fn extipsel7(&mut self) -> EXTIPSEL7_W<28> {
758        EXTIPSEL7_W::new(self)
759    }
760    #[doc = "Writes raw bits to the register."]
761    #[inline(always)]
762    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
763        self.0.bits(bits);
764        self
765    }
766}
767#[doc = "External Interrupt Port Select Low\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extipsell](index.html) module"]
768pub struct EXTIPSELL_SPEC;
769impl crate::RegisterSpec for EXTIPSELL_SPEC {
770    type Ux = u32;
771}
772#[doc = "`read()` method returns [extipsell::R](R) reader structure"]
773impl crate::Readable for EXTIPSELL_SPEC {
774    type Reader = R;
775}
776#[doc = "`write(|w| ..)` method takes [extipsell::W](W) writer structure"]
777impl crate::Writable for EXTIPSELL_SPEC {
778    type Writer = W;
779    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
780    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
781}
782#[doc = "`reset()` method sets EXTIPSELL to value 0"]
783impl crate::Resettable for EXTIPSELL_SPEC {
784    const RESET_VALUE: Self::Ux = 0;
785}
efm32pg22_pac/efm32pg22c200/gpio_s/extipsell.rs

efm32pg22_pac/efm32pg22c200/gpio_s/
extipsell.rs
