efm32pg22_pac/efm32pg22c200/gpio_s/
cdbusalloc.rs1#[doc = "Register `CDBUSALLOC` reader"]
2pub struct R(crate::R<CDBUSALLOC_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<CDBUSALLOC_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<CDBUSALLOC_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<CDBUSALLOC_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `CDBUSALLOC` writer"]
17pub struct W(crate::W<CDBUSALLOC_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<CDBUSALLOC_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<CDBUSALLOC_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<CDBUSALLOC_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `CDEVEN0` reader - CD Bus Even 0"]
38pub type CDEVEN0_R = crate::FieldReader<u8, CDEVEN0_A>;
39#[doc = "CD Bus Even 0\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum CDEVEN0_A {
43 #[doc = "0: The bus is not allocated"]
44 TRISTATE = 0,
45 #[doc = "1: The bus is allocated to ADC0"]
46 ADC0 = 1,
47}
48impl From<CDEVEN0_A> for u8 {
49 #[inline(always)]
50 fn from(variant: CDEVEN0_A) -> Self {
51 variant as _
52 }
53}
54impl CDEVEN0_R {
55 #[doc = "Get enumerated values variant"]
56 #[inline(always)]
57 pub fn variant(&self) -> Option<CDEVEN0_A> {
58 match self.bits {
59 0 => Some(CDEVEN0_A::TRISTATE),
60 1 => Some(CDEVEN0_A::ADC0),
61 _ => None,
62 }
63 }
64 #[doc = "Checks if the value of the field is `TRISTATE`"]
65 #[inline(always)]
66 pub fn is_tristate(&self) -> bool {
67 *self == CDEVEN0_A::TRISTATE
68 }
69 #[doc = "Checks if the value of the field is `ADC0`"]
70 #[inline(always)]
71 pub fn is_adc0(&self) -> bool {
72 *self == CDEVEN0_A::ADC0
73 }
74}
75#[doc = "Field `CDEVEN0` writer - CD Bus Even 0"]
76pub type CDEVEN0_W<'a, const O: u8> =
77 crate::FieldWriter<'a, u32, CDBUSALLOC_SPEC, u8, CDEVEN0_A, 4, O>;
78impl<'a, const O: u8> CDEVEN0_W<'a, O> {
79 #[doc = "The bus is not allocated"]
80 #[inline(always)]
81 pub fn tristate(self) -> &'a mut W {
82 self.variant(CDEVEN0_A::TRISTATE)
83 }
84 #[doc = "The bus is allocated to ADC0"]
85 #[inline(always)]
86 pub fn adc0(self) -> &'a mut W {
87 self.variant(CDEVEN0_A::ADC0)
88 }
89}
90#[doc = "Field `CDEVEN1` reader - CD Bus Even 1"]
91pub type CDEVEN1_R = crate::FieldReader<u8, CDEVEN1_A>;
92#[doc = "CD Bus Even 1\n\nValue on reset: 0"]
93#[derive(Clone, Copy, Debug, PartialEq, Eq)]
94#[repr(u8)]
95pub enum CDEVEN1_A {
96 #[doc = "0: The bus is not allocated"]
97 TRISTATE = 0,
98 #[doc = "1: The bus is allocated to ADC0"]
99 ADC0 = 1,
100}
101impl From<CDEVEN1_A> for u8 {
102 #[inline(always)]
103 fn from(variant: CDEVEN1_A) -> Self {
104 variant as _
105 }
106}
107impl CDEVEN1_R {
108 #[doc = "Get enumerated values variant"]
109 #[inline(always)]
110 pub fn variant(&self) -> Option<CDEVEN1_A> {
111 match self.bits {
112 0 => Some(CDEVEN1_A::TRISTATE),
113 1 => Some(CDEVEN1_A::ADC0),
114 _ => None,
115 }
116 }
117 #[doc = "Checks if the value of the field is `TRISTATE`"]
118 #[inline(always)]
119 pub fn is_tristate(&self) -> bool {
120 *self == CDEVEN1_A::TRISTATE
121 }
122 #[doc = "Checks if the value of the field is `ADC0`"]
123 #[inline(always)]
124 pub fn is_adc0(&self) -> bool {
125 *self == CDEVEN1_A::ADC0
126 }
127}
128#[doc = "Field `CDEVEN1` writer - CD Bus Even 1"]
129pub type CDEVEN1_W<'a, const O: u8> =
130 crate::FieldWriter<'a, u32, CDBUSALLOC_SPEC, u8, CDEVEN1_A, 4, O>;
131impl<'a, const O: u8> CDEVEN1_W<'a, O> {
132 #[doc = "The bus is not allocated"]
133 #[inline(always)]
134 pub fn tristate(self) -> &'a mut W {
135 self.variant(CDEVEN1_A::TRISTATE)
136 }
137 #[doc = "The bus is allocated to ADC0"]
138 #[inline(always)]
139 pub fn adc0(self) -> &'a mut W {
140 self.variant(CDEVEN1_A::ADC0)
141 }
142}
143#[doc = "Field `CDODD0` reader - CD Bus Odd 0"]
144pub type CDODD0_R = crate::FieldReader<u8, CDODD0_A>;
145#[doc = "CD Bus Odd 0\n\nValue on reset: 0"]
146#[derive(Clone, Copy, Debug, PartialEq, Eq)]
147#[repr(u8)]
148pub enum CDODD0_A {
149 #[doc = "0: The bus is not allocated"]
150 TRISTATE = 0,
151 #[doc = "1: The bus is allocated to ADC0"]
152 ADC0 = 1,
153}
154impl From<CDODD0_A> for u8 {
155 #[inline(always)]
156 fn from(variant: CDODD0_A) -> Self {
157 variant as _
158 }
159}
160impl CDODD0_R {
161 #[doc = "Get enumerated values variant"]
162 #[inline(always)]
163 pub fn variant(&self) -> Option<CDODD0_A> {
164 match self.bits {
165 0 => Some(CDODD0_A::TRISTATE),
166 1 => Some(CDODD0_A::ADC0),
167 _ => None,
168 }
169 }
170 #[doc = "Checks if the value of the field is `TRISTATE`"]
171 #[inline(always)]
172 pub fn is_tristate(&self) -> bool {
173 *self == CDODD0_A::TRISTATE
174 }
175 #[doc = "Checks if the value of the field is `ADC0`"]
176 #[inline(always)]
177 pub fn is_adc0(&self) -> bool {
178 *self == CDODD0_A::ADC0
179 }
180}
181#[doc = "Field `CDODD0` writer - CD Bus Odd 0"]
182pub type CDODD0_W<'a, const O: u8> =
183 crate::FieldWriter<'a, u32, CDBUSALLOC_SPEC, u8, CDODD0_A, 4, O>;
184impl<'a, const O: u8> CDODD0_W<'a, O> {
185 #[doc = "The bus is not allocated"]
186 #[inline(always)]
187 pub fn tristate(self) -> &'a mut W {
188 self.variant(CDODD0_A::TRISTATE)
189 }
190 #[doc = "The bus is allocated to ADC0"]
191 #[inline(always)]
192 pub fn adc0(self) -> &'a mut W {
193 self.variant(CDODD0_A::ADC0)
194 }
195}
196#[doc = "Field `CDODD1` reader - CD Bus Odd 1"]
197pub type CDODD1_R = crate::FieldReader<u8, CDODD1_A>;
198#[doc = "CD Bus Odd 1\n\nValue on reset: 0"]
199#[derive(Clone, Copy, Debug, PartialEq, Eq)]
200#[repr(u8)]
201pub enum CDODD1_A {
202 #[doc = "0: The bus is not allocated"]
203 TRISTATE = 0,
204 #[doc = "1: The bus is allocated to ADC0"]
205 ADC0 = 1,
206}
207impl From<CDODD1_A> for u8 {
208 #[inline(always)]
209 fn from(variant: CDODD1_A) -> Self {
210 variant as _
211 }
212}
213impl CDODD1_R {
214 #[doc = "Get enumerated values variant"]
215 #[inline(always)]
216 pub fn variant(&self) -> Option<CDODD1_A> {
217 match self.bits {
218 0 => Some(CDODD1_A::TRISTATE),
219 1 => Some(CDODD1_A::ADC0),
220 _ => None,
221 }
222 }
223 #[doc = "Checks if the value of the field is `TRISTATE`"]
224 #[inline(always)]
225 pub fn is_tristate(&self) -> bool {
226 *self == CDODD1_A::TRISTATE
227 }
228 #[doc = "Checks if the value of the field is `ADC0`"]
229 #[inline(always)]
230 pub fn is_adc0(&self) -> bool {
231 *self == CDODD1_A::ADC0
232 }
233}
234#[doc = "Field `CDODD1` writer - CD Bus Odd 1"]
235pub type CDODD1_W<'a, const O: u8> =
236 crate::FieldWriter<'a, u32, CDBUSALLOC_SPEC, u8, CDODD1_A, 4, O>;
237impl<'a, const O: u8> CDODD1_W<'a, O> {
238 #[doc = "The bus is not allocated"]
239 #[inline(always)]
240 pub fn tristate(self) -> &'a mut W {
241 self.variant(CDODD1_A::TRISTATE)
242 }
243 #[doc = "The bus is allocated to ADC0"]
244 #[inline(always)]
245 pub fn adc0(self) -> &'a mut W {
246 self.variant(CDODD1_A::ADC0)
247 }
248}
249impl R {
250 #[doc = "Bits 0:3 - CD Bus Even 0"]
251 #[inline(always)]
252 pub fn cdeven0(&self) -> CDEVEN0_R {
253 CDEVEN0_R::new((self.bits & 0x0f) as u8)
254 }
255 #[doc = "Bits 8:11 - CD Bus Even 1"]
256 #[inline(always)]
257 pub fn cdeven1(&self) -> CDEVEN1_R {
258 CDEVEN1_R::new(((self.bits >> 8) & 0x0f) as u8)
259 }
260 #[doc = "Bits 16:19 - CD Bus Odd 0"]
261 #[inline(always)]
262 pub fn cdodd0(&self) -> CDODD0_R {
263 CDODD0_R::new(((self.bits >> 16) & 0x0f) as u8)
264 }
265 #[doc = "Bits 24:27 - CD Bus Odd 1"]
266 #[inline(always)]
267 pub fn cdodd1(&self) -> CDODD1_R {
268 CDODD1_R::new(((self.bits >> 24) & 0x0f) as u8)
269 }
270}
271impl W {
272 #[doc = "Bits 0:3 - CD Bus Even 0"]
273 #[inline(always)]
274 #[must_use]
275 pub fn cdeven0(&mut self) -> CDEVEN0_W<0> {
276 CDEVEN0_W::new(self)
277 }
278 #[doc = "Bits 8:11 - CD Bus Even 1"]
279 #[inline(always)]
280 #[must_use]
281 pub fn cdeven1(&mut self) -> CDEVEN1_W<8> {
282 CDEVEN1_W::new(self)
283 }
284 #[doc = "Bits 16:19 - CD Bus Odd 0"]
285 #[inline(always)]
286 #[must_use]
287 pub fn cdodd0(&mut self) -> CDODD0_W<16> {
288 CDODD0_W::new(self)
289 }
290 #[doc = "Bits 24:27 - CD Bus Odd 1"]
291 #[inline(always)]
292 #[must_use]
293 pub fn cdodd1(&mut self) -> CDODD1_W<24> {
294 CDODD1_W::new(self)
295 }
296 #[doc = "Writes raw bits to the register."]
297 #[inline(always)]
298 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
299 self.0.bits(bits);
300 self
301 }
302}
303#[doc = "CD Bus allocation\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cdbusalloc](index.html) module"]
304pub struct CDBUSALLOC_SPEC;
305impl crate::RegisterSpec for CDBUSALLOC_SPEC {
306 type Ux = u32;
307}
308#[doc = "`read()` method returns [cdbusalloc::R](R) reader structure"]
309impl crate::Readable for CDBUSALLOC_SPEC {
310 type Reader = R;
311}
312#[doc = "`write(|w| ..)` method takes [cdbusalloc::W](W) writer structure"]
313impl crate::Writable for CDBUSALLOC_SPEC {
314 type Writer = W;
315 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
316 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
317}
318#[doc = "`reset()` method sets CDBUSALLOC to value 0"]
319impl crate::Resettable for CDBUSALLOC_SPEC {
320 const RESET_VALUE: Self::Ux = 0;
321}