efm32pg22_pac/efm32pg22c200/gpio_ns/
portd_ctrl.rs

1#[doc = "Register `PORTD_CTRL` reader"]
2pub struct R(crate::R<PORTD_CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<PORTD_CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<PORTD_CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<PORTD_CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `PORTD_CTRL` writer"]
17pub struct W(crate::W<PORTD_CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<PORTD_CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<PORTD_CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<PORTD_CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `SLEWRATE` reader - Slew Rate"]
38pub type SLEWRATE_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `SLEWRATE` writer - Slew Rate"]
40pub type SLEWRATE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, PORTD_CTRL_SPEC, u8, u8, 3, O>;
41#[doc = "Field `DINDIS` reader - Data In Disable"]
42pub type DINDIS_R = crate::BitReader<bool>;
43#[doc = "Field `DINDIS` writer - Data In Disable"]
44pub type DINDIS_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTD_CTRL_SPEC, bool, O>;
45#[doc = "Field `SLEWRATEALT` reader - Slew Rate Alt"]
46pub type SLEWRATEALT_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `SLEWRATEALT` writer - Slew Rate Alt"]
48pub type SLEWRATEALT_W<'a, const O: u8> =
49    crate::FieldWriter<'a, u32, PORTD_CTRL_SPEC, u8, u8, 3, O>;
50#[doc = "Field `DINDISALT` reader - Data In Disable Alt"]
51pub type DINDISALT_R = crate::BitReader<bool>;
52#[doc = "Field `DINDISALT` writer - Data In Disable Alt"]
53pub type DINDISALT_W<'a, const O: u8> = crate::BitWriter<'a, u32, PORTD_CTRL_SPEC, bool, O>;
54impl R {
55    #[doc = "Bits 4:6 - Slew Rate"]
56    #[inline(always)]
57    pub fn slewrate(&self) -> SLEWRATE_R {
58        SLEWRATE_R::new(((self.bits >> 4) & 7) as u8)
59    }
60    #[doc = "Bit 12 - Data In Disable"]
61    #[inline(always)]
62    pub fn dindis(&self) -> DINDIS_R {
63        DINDIS_R::new(((self.bits >> 12) & 1) != 0)
64    }
65    #[doc = "Bits 20:22 - Slew Rate Alt"]
66    #[inline(always)]
67    pub fn slewratealt(&self) -> SLEWRATEALT_R {
68        SLEWRATEALT_R::new(((self.bits >> 20) & 7) as u8)
69    }
70    #[doc = "Bit 28 - Data In Disable Alt"]
71    #[inline(always)]
72    pub fn dindisalt(&self) -> DINDISALT_R {
73        DINDISALT_R::new(((self.bits >> 28) & 1) != 0)
74    }
75}
76impl W {
77    #[doc = "Bits 4:6 - Slew Rate"]
78    #[inline(always)]
79    #[must_use]
80    pub fn slewrate(&mut self) -> SLEWRATE_W<4> {
81        SLEWRATE_W::new(self)
82    }
83    #[doc = "Bit 12 - Data In Disable"]
84    #[inline(always)]
85    #[must_use]
86    pub fn dindis(&mut self) -> DINDIS_W<12> {
87        DINDIS_W::new(self)
88    }
89    #[doc = "Bits 20:22 - Slew Rate Alt"]
90    #[inline(always)]
91    #[must_use]
92    pub fn slewratealt(&mut self) -> SLEWRATEALT_W<20> {
93        SLEWRATEALT_W::new(self)
94    }
95    #[doc = "Bit 28 - Data In Disable Alt"]
96    #[inline(always)]
97    #[must_use]
98    pub fn dindisalt(&mut self) -> DINDISALT_W<28> {
99        DINDISALT_W::new(self)
100    }
101    #[doc = "Writes raw bits to the register."]
102    #[inline(always)]
103    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
104        self.0.bits(bits);
105        self
106    }
107}
108#[doc = "Port control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [portd_ctrl](index.html) module"]
109pub struct PORTD_CTRL_SPEC;
110impl crate::RegisterSpec for PORTD_CTRL_SPEC {
111    type Ux = u32;
112}
113#[doc = "`read()` method returns [portd_ctrl::R](R) reader structure"]
114impl crate::Readable for PORTD_CTRL_SPEC {
115    type Reader = R;
116}
117#[doc = "`write(|w| ..)` method takes [portd_ctrl::W](W) writer structure"]
118impl crate::Writable for PORTD_CTRL_SPEC {
119    type Writer = W;
120    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
121    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
122}
123#[doc = "`reset()` method sets PORTD_CTRL to value 0x0040_0040"]
124impl crate::Resettable for PORTD_CTRL_SPEC {
125    const RESET_VALUE: Self::Ux = 0x0040_0040;
126}
efm32pg22_pac/efm32pg22c200/gpio_ns/portd_ctrl.rs

efm32pg22_pac/efm32pg22c200/gpio_ns/
portd_ctrl.rs
