efm32pg22_pac/efm32pg22c200/euart0_s/
status.rs

1#[doc = "Register `STATUS` reader"]
2pub struct R(crate::R<STATUS_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<STATUS_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<STATUS_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `RXENS` reader - Receiver Enable Status"]
17pub type RXENS_R = crate::BitReader<bool>;
18#[doc = "Field `TXENS` reader - Transmitter Enable Status"]
19pub type TXENS_R = crate::BitReader<bool>;
20#[doc = "Field `RXBLOCK` reader - Block Incoming Data"]
21pub type RXBLOCK_R = crate::BitReader<bool>;
22#[doc = "Field `TXTRI` reader - Transmitter Tristated"]
23pub type TXTRI_R = crate::BitReader<bool>;
24#[doc = "Field `TXC` reader - TX Complete"]
25pub type TXC_R = crate::BitReader<bool>;
26#[doc = "Field `TXFL` reader - TX FIFO Level"]
27pub type TXFL_R = crate::BitReader<bool>;
28#[doc = "Field `RXFL` reader - RX FIFO Level"]
29pub type RXFL_R = crate::BitReader<bool>;
30#[doc = "Field `RXFULL` reader - RX FIFO Full"]
31pub type RXFULL_R = crate::BitReader<bool>;
32#[doc = "Field `RXIDLE` reader - RX Idle"]
33pub type RXIDLE_R = crate::BitReader<bool>;
34#[doc = "Field `TXIDLE` reader - TX Idle"]
35pub type TXIDLE_R = crate::BitReader<bool>;
36#[doc = "Field `TXFCNT` reader - Valid entries in TX FIFO"]
37pub type TXFCNT_R = crate::FieldReader<u8, u8>;
38#[doc = "Field `CLEARTXBUSY` reader - TX FIFO Clear Busy"]
39pub type CLEARTXBUSY_R = crate::BitReader<bool>;
40#[doc = "Field `AUTOBAUDDONE` reader - Auto Baud Rate Detection Completed"]
41pub type AUTOBAUDDONE_R = crate::BitReader<bool>;
42impl R {
43    #[doc = "Bit 0 - Receiver Enable Status"]
44    #[inline(always)]
45    pub fn rxens(&self) -> RXENS_R {
46        RXENS_R::new((self.bits & 1) != 0)
47    }
48    #[doc = "Bit 1 - Transmitter Enable Status"]
49    #[inline(always)]
50    pub fn txens(&self) -> TXENS_R {
51        TXENS_R::new(((self.bits >> 1) & 1) != 0)
52    }
53    #[doc = "Bit 3 - Block Incoming Data"]
54    #[inline(always)]
55    pub fn rxblock(&self) -> RXBLOCK_R {
56        RXBLOCK_R::new(((self.bits >> 3) & 1) != 0)
57    }
58    #[doc = "Bit 4 - Transmitter Tristated"]
59    #[inline(always)]
60    pub fn txtri(&self) -> TXTRI_R {
61        TXTRI_R::new(((self.bits >> 4) & 1) != 0)
62    }
63    #[doc = "Bit 5 - TX Complete"]
64    #[inline(always)]
65    pub fn txc(&self) -> TXC_R {
66        TXC_R::new(((self.bits >> 5) & 1) != 0)
67    }
68    #[doc = "Bit 6 - TX FIFO Level"]
69    #[inline(always)]
70    pub fn txfl(&self) -> TXFL_R {
71        TXFL_R::new(((self.bits >> 6) & 1) != 0)
72    }
73    #[doc = "Bit 7 - RX FIFO Level"]
74    #[inline(always)]
75    pub fn rxfl(&self) -> RXFL_R {
76        RXFL_R::new(((self.bits >> 7) & 1) != 0)
77    }
78    #[doc = "Bit 8 - RX FIFO Full"]
79    #[inline(always)]
80    pub fn rxfull(&self) -> RXFULL_R {
81        RXFULL_R::new(((self.bits >> 8) & 1) != 0)
82    }
83    #[doc = "Bit 12 - RX Idle"]
84    #[inline(always)]
85    pub fn rxidle(&self) -> RXIDLE_R {
86        RXIDLE_R::new(((self.bits >> 12) & 1) != 0)
87    }
88    #[doc = "Bit 13 - TX Idle"]
89    #[inline(always)]
90    pub fn txidle(&self) -> TXIDLE_R {
91        TXIDLE_R::new(((self.bits >> 13) & 1) != 0)
92    }
93    #[doc = "Bits 16:18 - Valid entries in TX FIFO"]
94    #[inline(always)]
95    pub fn txfcnt(&self) -> TXFCNT_R {
96        TXFCNT_R::new(((self.bits >> 16) & 7) as u8)
97    }
98    #[doc = "Bit 19 - TX FIFO Clear Busy"]
99    #[inline(always)]
100    pub fn cleartxbusy(&self) -> CLEARTXBUSY_R {
101        CLEARTXBUSY_R::new(((self.bits >> 19) & 1) != 0)
102    }
103    #[doc = "Bit 24 - Auto Baud Rate Detection Completed"]
104    #[inline(always)]
105    pub fn autobauddone(&self) -> AUTOBAUDDONE_R {
106        AUTOBAUDDONE_R::new(((self.bits >> 24) & 1) != 0)
107    }
108}
109#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
110pub struct STATUS_SPEC;
111impl crate::RegisterSpec for STATUS_SPEC {
112    type Ux = u32;
113}
114#[doc = "`read()` method returns [status::R](R) reader structure"]
115impl crate::Readable for STATUS_SPEC {
116    type Reader = R;
117}
118#[doc = "`reset()` method sets STATUS to value 0x3040"]
119impl crate::Resettable for STATUS_SPEC {
120    const RESET_VALUE: Self::Ux = 0x3040;
121}
efm32pg22_pac/efm32pg22c200/euart0_s/status.rs

efm32pg22_pac/efm32pg22c200/euart0_s/
status.rs
