efm32pg22_pac/efm32pg22c200/cmu_s/
exportclkctrl.rs1#[doc = "Register `EXPORTCLKCTRL` reader"]
2pub struct R(crate::R<EXPORTCLKCTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<EXPORTCLKCTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<EXPORTCLKCTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<EXPORTCLKCTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `EXPORTCLKCTRL` writer"]
17pub struct W(crate::W<EXPORTCLKCTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<EXPORTCLKCTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<EXPORTCLKCTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<EXPORTCLKCTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `CLKOUTSEL0` reader - Clock Output Select 0"]
38pub type CLKOUTSEL0_R = crate::FieldReader<u8, CLKOUTSEL0_A>;
39#[doc = "Clock Output Select 0\n\nValue on reset: 0"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum CLKOUTSEL0_A {
43 #[doc = "0: CLKOUT0 is not clocked"]
44 DISABLED = 0,
45 #[doc = "1: HCLK is clocking CLKOUT0"]
46 HCLK = 1,
47 #[doc = "2: EXPORTCLK is clocking CLKOUT0"]
48 HFEXPCLK = 2,
49 #[doc = "3: ULFRCO is clocking CLKOUT0"]
50 ULFRCO = 3,
51 #[doc = "4: LFRCO is clocking CLKOUT0"]
52 LFRCO = 4,
53 #[doc = "5: LFXO is clocking CLKOUT0"]
54 LFXO = 5,
55 #[doc = "6: HFRCODPLL is clocking CLKOUT0"]
56 HFRCODPLL = 6,
57 #[doc = "7: HFXO is clocking CLKOUT0"]
58 HFXO = 7,
59 #[doc = "8: FSRCO is clocking CLKOUT0"]
60 FSRCO = 8,
61}
62impl From<CLKOUTSEL0_A> for u8 {
63 #[inline(always)]
64 fn from(variant: CLKOUTSEL0_A) -> Self {
65 variant as _
66 }
67}
68impl CLKOUTSEL0_R {
69 #[doc = "Get enumerated values variant"]
70 #[inline(always)]
71 pub fn variant(&self) -> Option<CLKOUTSEL0_A> {
72 match self.bits {
73 0 => Some(CLKOUTSEL0_A::DISABLED),
74 1 => Some(CLKOUTSEL0_A::HCLK),
75 2 => Some(CLKOUTSEL0_A::HFEXPCLK),
76 3 => Some(CLKOUTSEL0_A::ULFRCO),
77 4 => Some(CLKOUTSEL0_A::LFRCO),
78 5 => Some(CLKOUTSEL0_A::LFXO),
79 6 => Some(CLKOUTSEL0_A::HFRCODPLL),
80 7 => Some(CLKOUTSEL0_A::HFXO),
81 8 => Some(CLKOUTSEL0_A::FSRCO),
82 _ => None,
83 }
84 }
85 #[doc = "Checks if the value of the field is `DISABLED`"]
86 #[inline(always)]
87 pub fn is_disabled(&self) -> bool {
88 *self == CLKOUTSEL0_A::DISABLED
89 }
90 #[doc = "Checks if the value of the field is `HCLK`"]
91 #[inline(always)]
92 pub fn is_hclk(&self) -> bool {
93 *self == CLKOUTSEL0_A::HCLK
94 }
95 #[doc = "Checks if the value of the field is `HFEXPCLK`"]
96 #[inline(always)]
97 pub fn is_hfexpclk(&self) -> bool {
98 *self == CLKOUTSEL0_A::HFEXPCLK
99 }
100 #[doc = "Checks if the value of the field is `ULFRCO`"]
101 #[inline(always)]
102 pub fn is_ulfrco(&self) -> bool {
103 *self == CLKOUTSEL0_A::ULFRCO
104 }
105 #[doc = "Checks if the value of the field is `LFRCO`"]
106 #[inline(always)]
107 pub fn is_lfrco(&self) -> bool {
108 *self == CLKOUTSEL0_A::LFRCO
109 }
110 #[doc = "Checks if the value of the field is `LFXO`"]
111 #[inline(always)]
112 pub fn is_lfxo(&self) -> bool {
113 *self == CLKOUTSEL0_A::LFXO
114 }
115 #[doc = "Checks if the value of the field is `HFRCODPLL`"]
116 #[inline(always)]
117 pub fn is_hfrcodpll(&self) -> bool {
118 *self == CLKOUTSEL0_A::HFRCODPLL
119 }
120 #[doc = "Checks if the value of the field is `HFXO`"]
121 #[inline(always)]
122 pub fn is_hfxo(&self) -> bool {
123 *self == CLKOUTSEL0_A::HFXO
124 }
125 #[doc = "Checks if the value of the field is `FSRCO`"]
126 #[inline(always)]
127 pub fn is_fsrco(&self) -> bool {
128 *self == CLKOUTSEL0_A::FSRCO
129 }
130}
131#[doc = "Field `CLKOUTSEL0` writer - Clock Output Select 0"]
132pub type CLKOUTSEL0_W<'a, const O: u8> =
133 crate::FieldWriter<'a, u32, EXPORTCLKCTRL_SPEC, u8, CLKOUTSEL0_A, 4, O>;
134impl<'a, const O: u8> CLKOUTSEL0_W<'a, O> {
135 #[doc = "CLKOUT0 is not clocked"]
136 #[inline(always)]
137 pub fn disabled(self) -> &'a mut W {
138 self.variant(CLKOUTSEL0_A::DISABLED)
139 }
140 #[doc = "HCLK is clocking CLKOUT0"]
141 #[inline(always)]
142 pub fn hclk(self) -> &'a mut W {
143 self.variant(CLKOUTSEL0_A::HCLK)
144 }
145 #[doc = "EXPORTCLK is clocking CLKOUT0"]
146 #[inline(always)]
147 pub fn hfexpclk(self) -> &'a mut W {
148 self.variant(CLKOUTSEL0_A::HFEXPCLK)
149 }
150 #[doc = "ULFRCO is clocking CLKOUT0"]
151 #[inline(always)]
152 pub fn ulfrco(self) -> &'a mut W {
153 self.variant(CLKOUTSEL0_A::ULFRCO)
154 }
155 #[doc = "LFRCO is clocking CLKOUT0"]
156 #[inline(always)]
157 pub fn lfrco(self) -> &'a mut W {
158 self.variant(CLKOUTSEL0_A::LFRCO)
159 }
160 #[doc = "LFXO is clocking CLKOUT0"]
161 #[inline(always)]
162 pub fn lfxo(self) -> &'a mut W {
163 self.variant(CLKOUTSEL0_A::LFXO)
164 }
165 #[doc = "HFRCODPLL is clocking CLKOUT0"]
166 #[inline(always)]
167 pub fn hfrcodpll(self) -> &'a mut W {
168 self.variant(CLKOUTSEL0_A::HFRCODPLL)
169 }
170 #[doc = "HFXO is clocking CLKOUT0"]
171 #[inline(always)]
172 pub fn hfxo(self) -> &'a mut W {
173 self.variant(CLKOUTSEL0_A::HFXO)
174 }
175 #[doc = "FSRCO is clocking CLKOUT0"]
176 #[inline(always)]
177 pub fn fsrco(self) -> &'a mut W {
178 self.variant(CLKOUTSEL0_A::FSRCO)
179 }
180}
181#[doc = "Field `CLKOUTSEL1` reader - Clock Output Select 1"]
182pub type CLKOUTSEL1_R = crate::FieldReader<u8, CLKOUTSEL1_A>;
183#[doc = "Clock Output Select 1\n\nValue on reset: 0"]
184#[derive(Clone, Copy, Debug, PartialEq, Eq)]
185#[repr(u8)]
186pub enum CLKOUTSEL1_A {
187 #[doc = "0: CLKOUT1 is not clocked"]
188 DISABLED = 0,
189 #[doc = "1: HCLK is clocking CLKOUT1"]
190 HCLK = 1,
191 #[doc = "2: EXPORTCLK is clocking CLKOUT1"]
192 HFEXPCLK = 2,
193 #[doc = "3: ULFRCO is clocking CLKOUT1"]
194 ULFRCO = 3,
195 #[doc = "4: LFRCO is clocking CLKOUT1"]
196 LFRCO = 4,
197 #[doc = "5: LFXO is clocking CLKOUT1"]
198 LFXO = 5,
199 #[doc = "6: HFRCODPLL is clocking CLKOUT1"]
200 HFRCODPLL = 6,
201 #[doc = "7: HFXO is clocking CLKOUT1"]
202 HFXO = 7,
203 #[doc = "8: FSRCO is clocking CLKOUT1"]
204 FSRCO = 8,
205}
206impl From<CLKOUTSEL1_A> for u8 {
207 #[inline(always)]
208 fn from(variant: CLKOUTSEL1_A) -> Self {
209 variant as _
210 }
211}
212impl CLKOUTSEL1_R {
213 #[doc = "Get enumerated values variant"]
214 #[inline(always)]
215 pub fn variant(&self) -> Option<CLKOUTSEL1_A> {
216 match self.bits {
217 0 => Some(CLKOUTSEL1_A::DISABLED),
218 1 => Some(CLKOUTSEL1_A::HCLK),
219 2 => Some(CLKOUTSEL1_A::HFEXPCLK),
220 3 => Some(CLKOUTSEL1_A::ULFRCO),
221 4 => Some(CLKOUTSEL1_A::LFRCO),
222 5 => Some(CLKOUTSEL1_A::LFXO),
223 6 => Some(CLKOUTSEL1_A::HFRCODPLL),
224 7 => Some(CLKOUTSEL1_A::HFXO),
225 8 => Some(CLKOUTSEL1_A::FSRCO),
226 _ => None,
227 }
228 }
229 #[doc = "Checks if the value of the field is `DISABLED`"]
230 #[inline(always)]
231 pub fn is_disabled(&self) -> bool {
232 *self == CLKOUTSEL1_A::DISABLED
233 }
234 #[doc = "Checks if the value of the field is `HCLK`"]
235 #[inline(always)]
236 pub fn is_hclk(&self) -> bool {
237 *self == CLKOUTSEL1_A::HCLK
238 }
239 #[doc = "Checks if the value of the field is `HFEXPCLK`"]
240 #[inline(always)]
241 pub fn is_hfexpclk(&self) -> bool {
242 *self == CLKOUTSEL1_A::HFEXPCLK
243 }
244 #[doc = "Checks if the value of the field is `ULFRCO`"]
245 #[inline(always)]
246 pub fn is_ulfrco(&self) -> bool {
247 *self == CLKOUTSEL1_A::ULFRCO
248 }
249 #[doc = "Checks if the value of the field is `LFRCO`"]
250 #[inline(always)]
251 pub fn is_lfrco(&self) -> bool {
252 *self == CLKOUTSEL1_A::LFRCO
253 }
254 #[doc = "Checks if the value of the field is `LFXO`"]
255 #[inline(always)]
256 pub fn is_lfxo(&self) -> bool {
257 *self == CLKOUTSEL1_A::LFXO
258 }
259 #[doc = "Checks if the value of the field is `HFRCODPLL`"]
260 #[inline(always)]
261 pub fn is_hfrcodpll(&self) -> bool {
262 *self == CLKOUTSEL1_A::HFRCODPLL
263 }
264 #[doc = "Checks if the value of the field is `HFXO`"]
265 #[inline(always)]
266 pub fn is_hfxo(&self) -> bool {
267 *self == CLKOUTSEL1_A::HFXO
268 }
269 #[doc = "Checks if the value of the field is `FSRCO`"]
270 #[inline(always)]
271 pub fn is_fsrco(&self) -> bool {
272 *self == CLKOUTSEL1_A::FSRCO
273 }
274}
275#[doc = "Field `CLKOUTSEL1` writer - Clock Output Select 1"]
276pub type CLKOUTSEL1_W<'a, const O: u8> =
277 crate::FieldWriter<'a, u32, EXPORTCLKCTRL_SPEC, u8, CLKOUTSEL1_A, 4, O>;
278impl<'a, const O: u8> CLKOUTSEL1_W<'a, O> {
279 #[doc = "CLKOUT1 is not clocked"]
280 #[inline(always)]
281 pub fn disabled(self) -> &'a mut W {
282 self.variant(CLKOUTSEL1_A::DISABLED)
283 }
284 #[doc = "HCLK is clocking CLKOUT1"]
285 #[inline(always)]
286 pub fn hclk(self) -> &'a mut W {
287 self.variant(CLKOUTSEL1_A::HCLK)
288 }
289 #[doc = "EXPORTCLK is clocking CLKOUT1"]
290 #[inline(always)]
291 pub fn hfexpclk(self) -> &'a mut W {
292 self.variant(CLKOUTSEL1_A::HFEXPCLK)
293 }
294 #[doc = "ULFRCO is clocking CLKOUT1"]
295 #[inline(always)]
296 pub fn ulfrco(self) -> &'a mut W {
297 self.variant(CLKOUTSEL1_A::ULFRCO)
298 }
299 #[doc = "LFRCO is clocking CLKOUT1"]
300 #[inline(always)]
301 pub fn lfrco(self) -> &'a mut W {
302 self.variant(CLKOUTSEL1_A::LFRCO)
303 }
304 #[doc = "LFXO is clocking CLKOUT1"]
305 #[inline(always)]
306 pub fn lfxo(self) -> &'a mut W {
307 self.variant(CLKOUTSEL1_A::LFXO)
308 }
309 #[doc = "HFRCODPLL is clocking CLKOUT1"]
310 #[inline(always)]
311 pub fn hfrcodpll(self) -> &'a mut W {
312 self.variant(CLKOUTSEL1_A::HFRCODPLL)
313 }
314 #[doc = "HFXO is clocking CLKOUT1"]
315 #[inline(always)]
316 pub fn hfxo(self) -> &'a mut W {
317 self.variant(CLKOUTSEL1_A::HFXO)
318 }
319 #[doc = "FSRCO is clocking CLKOUT1"]
320 #[inline(always)]
321 pub fn fsrco(self) -> &'a mut W {
322 self.variant(CLKOUTSEL1_A::FSRCO)
323 }
324}
325#[doc = "Field `CLKOUTSEL2` reader - Clock Output Select 2"]
326pub type CLKOUTSEL2_R = crate::FieldReader<u8, CLKOUTSEL2_A>;
327#[doc = "Clock Output Select 2\n\nValue on reset: 0"]
328#[derive(Clone, Copy, Debug, PartialEq, Eq)]
329#[repr(u8)]
330pub enum CLKOUTSEL2_A {
331 #[doc = "0: CLKOUT2 is not clocked"]
332 DISABLED = 0,
333 #[doc = "1: HCLK is clocking CLKOUT2"]
334 HCLK = 1,
335 #[doc = "2: EXPORTCLK is clocking CLKOUT2"]
336 HFEXPCLK = 2,
337 #[doc = "3: ULFRCO is clocking CLKOUT2"]
338 ULFRCO = 3,
339 #[doc = "4: LFRCO is clocking CLKOUT2"]
340 LFRCO = 4,
341 #[doc = "5: LFXO is clocking CLKOUT2"]
342 LFXO = 5,
343 #[doc = "6: HFRCODPLL is clocking CLKOUT2"]
344 HFRCODPLL = 6,
345 #[doc = "7: HFXO is clocking CLKOUT2"]
346 HFXO = 7,
347 #[doc = "8: FSRCO is clocking CLKOUT2"]
348 FSRCO = 8,
349}
350impl From<CLKOUTSEL2_A> for u8 {
351 #[inline(always)]
352 fn from(variant: CLKOUTSEL2_A) -> Self {
353 variant as _
354 }
355}
356impl CLKOUTSEL2_R {
357 #[doc = "Get enumerated values variant"]
358 #[inline(always)]
359 pub fn variant(&self) -> Option<CLKOUTSEL2_A> {
360 match self.bits {
361 0 => Some(CLKOUTSEL2_A::DISABLED),
362 1 => Some(CLKOUTSEL2_A::HCLK),
363 2 => Some(CLKOUTSEL2_A::HFEXPCLK),
364 3 => Some(CLKOUTSEL2_A::ULFRCO),
365 4 => Some(CLKOUTSEL2_A::LFRCO),
366 5 => Some(CLKOUTSEL2_A::LFXO),
367 6 => Some(CLKOUTSEL2_A::HFRCODPLL),
368 7 => Some(CLKOUTSEL2_A::HFXO),
369 8 => Some(CLKOUTSEL2_A::FSRCO),
370 _ => None,
371 }
372 }
373 #[doc = "Checks if the value of the field is `DISABLED`"]
374 #[inline(always)]
375 pub fn is_disabled(&self) -> bool {
376 *self == CLKOUTSEL2_A::DISABLED
377 }
378 #[doc = "Checks if the value of the field is `HCLK`"]
379 #[inline(always)]
380 pub fn is_hclk(&self) -> bool {
381 *self == CLKOUTSEL2_A::HCLK
382 }
383 #[doc = "Checks if the value of the field is `HFEXPCLK`"]
384 #[inline(always)]
385 pub fn is_hfexpclk(&self) -> bool {
386 *self == CLKOUTSEL2_A::HFEXPCLK
387 }
388 #[doc = "Checks if the value of the field is `ULFRCO`"]
389 #[inline(always)]
390 pub fn is_ulfrco(&self) -> bool {
391 *self == CLKOUTSEL2_A::ULFRCO
392 }
393 #[doc = "Checks if the value of the field is `LFRCO`"]
394 #[inline(always)]
395 pub fn is_lfrco(&self) -> bool {
396 *self == CLKOUTSEL2_A::LFRCO
397 }
398 #[doc = "Checks if the value of the field is `LFXO`"]
399 #[inline(always)]
400 pub fn is_lfxo(&self) -> bool {
401 *self == CLKOUTSEL2_A::LFXO
402 }
403 #[doc = "Checks if the value of the field is `HFRCODPLL`"]
404 #[inline(always)]
405 pub fn is_hfrcodpll(&self) -> bool {
406 *self == CLKOUTSEL2_A::HFRCODPLL
407 }
408 #[doc = "Checks if the value of the field is `HFXO`"]
409 #[inline(always)]
410 pub fn is_hfxo(&self) -> bool {
411 *self == CLKOUTSEL2_A::HFXO
412 }
413 #[doc = "Checks if the value of the field is `FSRCO`"]
414 #[inline(always)]
415 pub fn is_fsrco(&self) -> bool {
416 *self == CLKOUTSEL2_A::FSRCO
417 }
418}
419#[doc = "Field `CLKOUTSEL2` writer - Clock Output Select 2"]
420pub type CLKOUTSEL2_W<'a, const O: u8> =
421 crate::FieldWriter<'a, u32, EXPORTCLKCTRL_SPEC, u8, CLKOUTSEL2_A, 4, O>;
422impl<'a, const O: u8> CLKOUTSEL2_W<'a, O> {
423 #[doc = "CLKOUT2 is not clocked"]
424 #[inline(always)]
425 pub fn disabled(self) -> &'a mut W {
426 self.variant(CLKOUTSEL2_A::DISABLED)
427 }
428 #[doc = "HCLK is clocking CLKOUT2"]
429 #[inline(always)]
430 pub fn hclk(self) -> &'a mut W {
431 self.variant(CLKOUTSEL2_A::HCLK)
432 }
433 #[doc = "EXPORTCLK is clocking CLKOUT2"]
434 #[inline(always)]
435 pub fn hfexpclk(self) -> &'a mut W {
436 self.variant(CLKOUTSEL2_A::HFEXPCLK)
437 }
438 #[doc = "ULFRCO is clocking CLKOUT2"]
439 #[inline(always)]
440 pub fn ulfrco(self) -> &'a mut W {
441 self.variant(CLKOUTSEL2_A::ULFRCO)
442 }
443 #[doc = "LFRCO is clocking CLKOUT2"]
444 #[inline(always)]
445 pub fn lfrco(self) -> &'a mut W {
446 self.variant(CLKOUTSEL2_A::LFRCO)
447 }
448 #[doc = "LFXO is clocking CLKOUT2"]
449 #[inline(always)]
450 pub fn lfxo(self) -> &'a mut W {
451 self.variant(CLKOUTSEL2_A::LFXO)
452 }
453 #[doc = "HFRCODPLL is clocking CLKOUT2"]
454 #[inline(always)]
455 pub fn hfrcodpll(self) -> &'a mut W {
456 self.variant(CLKOUTSEL2_A::HFRCODPLL)
457 }
458 #[doc = "HFXO is clocking CLKOUT2"]
459 #[inline(always)]
460 pub fn hfxo(self) -> &'a mut W {
461 self.variant(CLKOUTSEL2_A::HFXO)
462 }
463 #[doc = "FSRCO is clocking CLKOUT2"]
464 #[inline(always)]
465 pub fn fsrco(self) -> &'a mut W {
466 self.variant(CLKOUTSEL2_A::FSRCO)
467 }
468}
469#[doc = "Field `PRESC` reader - EXPORTCLK Prescaler"]
470pub type PRESC_R = crate::FieldReader<u8, u8>;
471#[doc = "Field `PRESC` writer - EXPORTCLK Prescaler"]
472pub type PRESC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, EXPORTCLKCTRL_SPEC, u8, u8, 5, O>;
473impl R {
474 #[doc = "Bits 0:3 - Clock Output Select 0"]
475 #[inline(always)]
476 pub fn clkoutsel0(&self) -> CLKOUTSEL0_R {
477 CLKOUTSEL0_R::new((self.bits & 0x0f) as u8)
478 }
479 #[doc = "Bits 8:11 - Clock Output Select 1"]
480 #[inline(always)]
481 pub fn clkoutsel1(&self) -> CLKOUTSEL1_R {
482 CLKOUTSEL1_R::new(((self.bits >> 8) & 0x0f) as u8)
483 }
484 #[doc = "Bits 16:19 - Clock Output Select 2"]
485 #[inline(always)]
486 pub fn clkoutsel2(&self) -> CLKOUTSEL2_R {
487 CLKOUTSEL2_R::new(((self.bits >> 16) & 0x0f) as u8)
488 }
489 #[doc = "Bits 24:28 - EXPORTCLK Prescaler"]
490 #[inline(always)]
491 pub fn presc(&self) -> PRESC_R {
492 PRESC_R::new(((self.bits >> 24) & 0x1f) as u8)
493 }
494}
495impl W {
496 #[doc = "Bits 0:3 - Clock Output Select 0"]
497 #[inline(always)]
498 #[must_use]
499 pub fn clkoutsel0(&mut self) -> CLKOUTSEL0_W<0> {
500 CLKOUTSEL0_W::new(self)
501 }
502 #[doc = "Bits 8:11 - Clock Output Select 1"]
503 #[inline(always)]
504 #[must_use]
505 pub fn clkoutsel1(&mut self) -> CLKOUTSEL1_W<8> {
506 CLKOUTSEL1_W::new(self)
507 }
508 #[doc = "Bits 16:19 - Clock Output Select 2"]
509 #[inline(always)]
510 #[must_use]
511 pub fn clkoutsel2(&mut self) -> CLKOUTSEL2_W<16> {
512 CLKOUTSEL2_W::new(self)
513 }
514 #[doc = "Bits 24:28 - EXPORTCLK Prescaler"]
515 #[inline(always)]
516 #[must_use]
517 pub fn presc(&mut self) -> PRESC_W<24> {
518 PRESC_W::new(self)
519 }
520 #[doc = "Writes raw bits to the register."]
521 #[inline(always)]
522 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
523 self.0.bits(bits);
524 self
525 }
526}
527#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [exportclkctrl](index.html) module"]
528pub struct EXPORTCLKCTRL_SPEC;
529impl crate::RegisterSpec for EXPORTCLKCTRL_SPEC {
530 type Ux = u32;
531}
532#[doc = "`read()` method returns [exportclkctrl::R](R) reader structure"]
533impl crate::Readable for EXPORTCLKCTRL_SPEC {
534 type Reader = R;
535}
536#[doc = "`write(|w| ..)` method takes [exportclkctrl::W](W) writer structure"]
537impl crate::Writable for EXPORTCLKCTRL_SPEC {
538 type Writer = W;
539 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
540 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
541}
542#[doc = "`reset()` method sets EXPORTCLKCTRL to value 0"]
543impl crate::Resettable for EXPORTCLKCTRL_SPEC {
544 const RESET_VALUE: Self::Ux = 0;
545}