efm32pg22_pac/efm32pg22c200/cmu_s/
em01grpbclkctrl.rs1#[doc = "Register `EM01GRPBCLKCTRL` reader"]
2pub struct R(crate::R<EM01GRPBCLKCTRL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<EM01GRPBCLKCTRL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<EM01GRPBCLKCTRL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<EM01GRPBCLKCTRL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `EM01GRPBCLKCTRL` writer"]
17pub struct W(crate::W<EM01GRPBCLKCTRL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<EM01GRPBCLKCTRL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<EM01GRPBCLKCTRL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<EM01GRPBCLKCTRL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `CLKSEL` reader - Clock Select"]
38pub type CLKSEL_R = crate::FieldReader<u8, CLKSEL_A>;
39#[doc = "Clock Select\n\nValue on reset: 1"]
40#[derive(Clone, Copy, Debug, PartialEq, Eq)]
41#[repr(u8)]
42pub enum CLKSEL_A {
43 #[doc = "1: HFRCODPLL is clocking EM01GRPBCLK"]
44 HFRCODPLL = 1,
45 #[doc = "2: HFXO is clocking EM01GRPBCLK"]
46 HFXO = 2,
47 #[doc = "3: FSRCO is clocking EM01GRPBCLK"]
48 FSRCO = 3,
49 #[doc = "4: CLKIN0 is clocking EM01GRPBCLK"]
50 CLKIN0 = 4,
51 #[doc = "5: HFRCODPLL (re-timed) is clocking EM01GRPBCLK"]
52 HFRCODPLLRT = 5,
53 #[doc = "6: HFXO (re-timed) is clocking EM01GRPBCLK"]
54 HFXORT = 6,
55}
56impl From<CLKSEL_A> for u8 {
57 #[inline(always)]
58 fn from(variant: CLKSEL_A) -> Self {
59 variant as _
60 }
61}
62impl CLKSEL_R {
63 #[doc = "Get enumerated values variant"]
64 #[inline(always)]
65 pub fn variant(&self) -> Option<CLKSEL_A> {
66 match self.bits {
67 1 => Some(CLKSEL_A::HFRCODPLL),
68 2 => Some(CLKSEL_A::HFXO),
69 3 => Some(CLKSEL_A::FSRCO),
70 4 => Some(CLKSEL_A::CLKIN0),
71 5 => Some(CLKSEL_A::HFRCODPLLRT),
72 6 => Some(CLKSEL_A::HFXORT),
73 _ => None,
74 }
75 }
76 #[doc = "Checks if the value of the field is `HFRCODPLL`"]
77 #[inline(always)]
78 pub fn is_hfrcodpll(&self) -> bool {
79 *self == CLKSEL_A::HFRCODPLL
80 }
81 #[doc = "Checks if the value of the field is `HFXO`"]
82 #[inline(always)]
83 pub fn is_hfxo(&self) -> bool {
84 *self == CLKSEL_A::HFXO
85 }
86 #[doc = "Checks if the value of the field is `FSRCO`"]
87 #[inline(always)]
88 pub fn is_fsrco(&self) -> bool {
89 *self == CLKSEL_A::FSRCO
90 }
91 #[doc = "Checks if the value of the field is `CLKIN0`"]
92 #[inline(always)]
93 pub fn is_clkin0(&self) -> bool {
94 *self == CLKSEL_A::CLKIN0
95 }
96 #[doc = "Checks if the value of the field is `HFRCODPLLRT`"]
97 #[inline(always)]
98 pub fn is_hfrcodpllrt(&self) -> bool {
99 *self == CLKSEL_A::HFRCODPLLRT
100 }
101 #[doc = "Checks if the value of the field is `HFXORT`"]
102 #[inline(always)]
103 pub fn is_hfxort(&self) -> bool {
104 *self == CLKSEL_A::HFXORT
105 }
106}
107#[doc = "Field `CLKSEL` writer - Clock Select"]
108pub type CLKSEL_W<'a, const O: u8> =
109 crate::FieldWriter<'a, u32, EM01GRPBCLKCTRL_SPEC, u8, CLKSEL_A, 3, O>;
110impl<'a, const O: u8> CLKSEL_W<'a, O> {
111 #[doc = "HFRCODPLL is clocking EM01GRPBCLK"]
112 #[inline(always)]
113 pub fn hfrcodpll(self) -> &'a mut W {
114 self.variant(CLKSEL_A::HFRCODPLL)
115 }
116 #[doc = "HFXO is clocking EM01GRPBCLK"]
117 #[inline(always)]
118 pub fn hfxo(self) -> &'a mut W {
119 self.variant(CLKSEL_A::HFXO)
120 }
121 #[doc = "FSRCO is clocking EM01GRPBCLK"]
122 #[inline(always)]
123 pub fn fsrco(self) -> &'a mut W {
124 self.variant(CLKSEL_A::FSRCO)
125 }
126 #[doc = "CLKIN0 is clocking EM01GRPBCLK"]
127 #[inline(always)]
128 pub fn clkin0(self) -> &'a mut W {
129 self.variant(CLKSEL_A::CLKIN0)
130 }
131 #[doc = "HFRCODPLL (re-timed) is clocking EM01GRPBCLK"]
132 #[inline(always)]
133 pub fn hfrcodpllrt(self) -> &'a mut W {
134 self.variant(CLKSEL_A::HFRCODPLLRT)
135 }
136 #[doc = "HFXO (re-timed) is clocking EM01GRPBCLK"]
137 #[inline(always)]
138 pub fn hfxort(self) -> &'a mut W {
139 self.variant(CLKSEL_A::HFXORT)
140 }
141}
142impl R {
143 #[doc = "Bits 0:2 - Clock Select"]
144 #[inline(always)]
145 pub fn clksel(&self) -> CLKSEL_R {
146 CLKSEL_R::new((self.bits & 7) as u8)
147 }
148}
149impl W {
150 #[doc = "Bits 0:2 - Clock Select"]
151 #[inline(always)]
152 #[must_use]
153 pub fn clksel(&mut self) -> CLKSEL_W<0> {
154 CLKSEL_W::new(self)
155 }
156 #[doc = "Writes raw bits to the register."]
157 #[inline(always)]
158 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
159 self.0.bits(bits);
160 self
161 }
162}
163#[doc = "No Description\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [em01grpbclkctrl](index.html) module"]
164pub struct EM01GRPBCLKCTRL_SPEC;
165impl crate::RegisterSpec for EM01GRPBCLKCTRL_SPEC {
166 type Ux = u32;
167}
168#[doc = "`read()` method returns [em01grpbclkctrl::R](R) reader structure"]
169impl crate::Readable for EM01GRPBCLKCTRL_SPEC {
170 type Reader = R;
171}
172#[doc = "`write(|w| ..)` method takes [em01grpbclkctrl::W](W) writer structure"]
173impl crate::Writable for EM01GRPBCLKCTRL_SPEC {
174 type Writer = W;
175 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
176 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
177}
178#[doc = "`reset()` method sets EM01GRPBCLKCTRL to value 0x01"]
179impl crate::Resettable for EM01GRPBCLKCTRL_SPEC {
180 const RESET_VALUE: Self::Ux = 0x01;
181}