efm32pg1b200_pac/wdog0/
ctrl.rs

1#[doc = "Register `CTRL` reader"]
2pub struct R(crate::R<CTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<CTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<CTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<CTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `CTRL` writer"]
17pub struct W(crate::W<CTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<CTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<CTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<CTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `EN` reader - Watchdog Timer Enable"]
38pub type EN_R = crate::BitReader<bool>;
39#[doc = "Field `EN` writer - Watchdog Timer Enable"]
40pub type EN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 0>;
41#[doc = "Field `DEBUGRUN` reader - Debug Mode Run Enable"]
42pub type DEBUGRUN_R = crate::BitReader<bool>;
43#[doc = "Field `DEBUGRUN` writer - Debug Mode Run Enable"]
44pub type DEBUGRUN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 1>;
45#[doc = "Field `EM2RUN` reader - Energy Mode 2 Run Enable"]
46pub type EM2RUN_R = crate::BitReader<bool>;
47#[doc = "Field `EM2RUN` writer - Energy Mode 2 Run Enable"]
48pub type EM2RUN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 2>;
49#[doc = "Field `EM3RUN` reader - Energy Mode 3 Run Enable"]
50pub type EM3RUN_R = crate::BitReader<bool>;
51#[doc = "Field `EM3RUN` writer - Energy Mode 3 Run Enable"]
52pub type EM3RUN_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 3>;
53#[doc = "Field `LOCK` reader - Configuration Lock"]
54pub type LOCK_R = crate::BitReader<bool>;
55#[doc = "Field `LOCK` writer - Configuration Lock"]
56pub type LOCK_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 4>;
57#[doc = "Field `EM4BLOCK` reader - Energy Mode 4 Block"]
58pub type EM4BLOCK_R = crate::BitReader<bool>;
59#[doc = "Field `EM4BLOCK` writer - Energy Mode 4 Block"]
60pub type EM4BLOCK_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 5>;
61#[doc = "Field `SWOSCBLOCK` reader - Software Oscillator Disable Block"]
62pub type SWOSCBLOCK_R = crate::BitReader<bool>;
63#[doc = "Field `SWOSCBLOCK` writer - Software Oscillator Disable Block"]
64pub type SWOSCBLOCK_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 6>;
65#[doc = "Field `PERSEL` reader - Watchdog Timeout Period Select"]
66pub type PERSEL_R = crate::FieldReader<u8, u8>;
67#[doc = "Field `PERSEL` writer - Watchdog Timeout Period Select"]
68pub type PERSEL_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 4, 8>;
69#[doc = "Watchdog Clock Select\n\nValue on reset: 0"]
70#[derive(Clone, Copy, Debug, PartialEq)]
71#[repr(u8)]
72pub enum CLKSEL_A {
73    #[doc = "0: ULFRCO"]
74    ULFRCO = 0,
75    #[doc = "1: LFRCO"]
76    LFRCO = 1,
77    #[doc = "2: LFXO"]
78    LFXO = 2,
79}
80impl From<CLKSEL_A> for u8 {
81    #[inline(always)]
82    fn from(variant: CLKSEL_A) -> Self {
83        variant as _
84    }
85}
86#[doc = "Field `CLKSEL` reader - Watchdog Clock Select"]
87pub type CLKSEL_R = crate::FieldReader<u8, CLKSEL_A>;
88impl CLKSEL_R {
89    #[doc = "Get enumerated values variant"]
90    #[inline(always)]
91    pub fn variant(&self) -> Option<CLKSEL_A> {
92        match self.bits {
93            0 => Some(CLKSEL_A::ULFRCO),
94            1 => Some(CLKSEL_A::LFRCO),
95            2 => Some(CLKSEL_A::LFXO),
96            _ => None,
97        }
98    }
99    #[doc = "Checks if the value of the field is `ULFRCO`"]
100    #[inline(always)]
101    pub fn is_ulfrco(&self) -> bool {
102        *self == CLKSEL_A::ULFRCO
103    }
104    #[doc = "Checks if the value of the field is `LFRCO`"]
105    #[inline(always)]
106    pub fn is_lfrco(&self) -> bool {
107        *self == CLKSEL_A::LFRCO
108    }
109    #[doc = "Checks if the value of the field is `LFXO`"]
110    #[inline(always)]
111    pub fn is_lfxo(&self) -> bool {
112        *self == CLKSEL_A::LFXO
113    }
114}
115#[doc = "Field `CLKSEL` writer - Watchdog Clock Select"]
116pub type CLKSEL_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, CLKSEL_A, 2, 12>;
117impl<'a> CLKSEL_W<'a> {
118    #[doc = "ULFRCO"]
119    #[inline(always)]
120    pub fn ulfrco(self) -> &'a mut W {
121        self.variant(CLKSEL_A::ULFRCO)
122    }
123    #[doc = "LFRCO"]
124    #[inline(always)]
125    pub fn lfrco(self) -> &'a mut W {
126        self.variant(CLKSEL_A::LFRCO)
127    }
128    #[doc = "LFXO"]
129    #[inline(always)]
130    pub fn lfxo(self) -> &'a mut W {
131        self.variant(CLKSEL_A::LFXO)
132    }
133}
134#[doc = "Field `WARNSEL` reader - Watchdog Timeout Period Select"]
135pub type WARNSEL_R = crate::FieldReader<u8, u8>;
136#[doc = "Field `WARNSEL` writer - Watchdog Timeout Period Select"]
137pub type WARNSEL_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 2, 16>;
138#[doc = "Field `WINSEL` reader - Watchdog Illegal Window Select"]
139pub type WINSEL_R = crate::FieldReader<u8, u8>;
140#[doc = "Field `WINSEL` writer - Watchdog Illegal Window Select"]
141pub type WINSEL_W<'a> = crate::FieldWriter<'a, u32, CTRL_SPEC, u8, u8, 3, 24>;
142#[doc = "Field `CLRSRC` reader - Watchdog Clear Source"]
143pub type CLRSRC_R = crate::BitReader<bool>;
144#[doc = "Field `CLRSRC` writer - Watchdog Clear Source"]
145pub type CLRSRC_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 30>;
146#[doc = "Field `WDOGRSTDIS` reader - Watchdog Reset Disable"]
147pub type WDOGRSTDIS_R = crate::BitReader<bool>;
148#[doc = "Field `WDOGRSTDIS` writer - Watchdog Reset Disable"]
149pub type WDOGRSTDIS_W<'a> = crate::BitWriter<'a, u32, CTRL_SPEC, bool, 31>;
150impl R {
151    #[doc = "Bit 0 - Watchdog Timer Enable"]
152    #[inline(always)]
153    pub fn en(&self) -> EN_R {
154        EN_R::new((self.bits & 1) != 0)
155    }
156    #[doc = "Bit 1 - Debug Mode Run Enable"]
157    #[inline(always)]
158    pub fn debugrun(&self) -> DEBUGRUN_R {
159        DEBUGRUN_R::new(((self.bits >> 1) & 1) != 0)
160    }
161    #[doc = "Bit 2 - Energy Mode 2 Run Enable"]
162    #[inline(always)]
163    pub fn em2run(&self) -> EM2RUN_R {
164        EM2RUN_R::new(((self.bits >> 2) & 1) != 0)
165    }
166    #[doc = "Bit 3 - Energy Mode 3 Run Enable"]
167    #[inline(always)]
168    pub fn em3run(&self) -> EM3RUN_R {
169        EM3RUN_R::new(((self.bits >> 3) & 1) != 0)
170    }
171    #[doc = "Bit 4 - Configuration Lock"]
172    #[inline(always)]
173    pub fn lock(&self) -> LOCK_R {
174        LOCK_R::new(((self.bits >> 4) & 1) != 0)
175    }
176    #[doc = "Bit 5 - Energy Mode 4 Block"]
177    #[inline(always)]
178    pub fn em4block(&self) -> EM4BLOCK_R {
179        EM4BLOCK_R::new(((self.bits >> 5) & 1) != 0)
180    }
181    #[doc = "Bit 6 - Software Oscillator Disable Block"]
182    #[inline(always)]
183    pub fn swoscblock(&self) -> SWOSCBLOCK_R {
184        SWOSCBLOCK_R::new(((self.bits >> 6) & 1) != 0)
185    }
186    #[doc = "Bits 8:11 - Watchdog Timeout Period Select"]
187    #[inline(always)]
188    pub fn persel(&self) -> PERSEL_R {
189        PERSEL_R::new(((self.bits >> 8) & 0x0f) as u8)
190    }
191    #[doc = "Bits 12:13 - Watchdog Clock Select"]
192    #[inline(always)]
193    pub fn clksel(&self) -> CLKSEL_R {
194        CLKSEL_R::new(((self.bits >> 12) & 3) as u8)
195    }
196    #[doc = "Bits 16:17 - Watchdog Timeout Period Select"]
197    #[inline(always)]
198    pub fn warnsel(&self) -> WARNSEL_R {
199        WARNSEL_R::new(((self.bits >> 16) & 3) as u8)
200    }
201    #[doc = "Bits 24:26 - Watchdog Illegal Window Select"]
202    #[inline(always)]
203    pub fn winsel(&self) -> WINSEL_R {
204        WINSEL_R::new(((self.bits >> 24) & 7) as u8)
205    }
206    #[doc = "Bit 30 - Watchdog Clear Source"]
207    #[inline(always)]
208    pub fn clrsrc(&self) -> CLRSRC_R {
209        CLRSRC_R::new(((self.bits >> 30) & 1) != 0)
210    }
211    #[doc = "Bit 31 - Watchdog Reset Disable"]
212    #[inline(always)]
213    pub fn wdogrstdis(&self) -> WDOGRSTDIS_R {
214        WDOGRSTDIS_R::new(((self.bits >> 31) & 1) != 0)
215    }
216}
217impl W {
218    #[doc = "Bit 0 - Watchdog Timer Enable"]
219    #[inline(always)]
220    pub fn en(&mut self) -> EN_W {
221        EN_W::new(self)
222    }
223    #[doc = "Bit 1 - Debug Mode Run Enable"]
224    #[inline(always)]
225    pub fn debugrun(&mut self) -> DEBUGRUN_W {
226        DEBUGRUN_W::new(self)
227    }
228    #[doc = "Bit 2 - Energy Mode 2 Run Enable"]
229    #[inline(always)]
230    pub fn em2run(&mut self) -> EM2RUN_W {
231        EM2RUN_W::new(self)
232    }
233    #[doc = "Bit 3 - Energy Mode 3 Run Enable"]
234    #[inline(always)]
235    pub fn em3run(&mut self) -> EM3RUN_W {
236        EM3RUN_W::new(self)
237    }
238    #[doc = "Bit 4 - Configuration Lock"]
239    #[inline(always)]
240    pub fn lock(&mut self) -> LOCK_W {
241        LOCK_W::new(self)
242    }
243    #[doc = "Bit 5 - Energy Mode 4 Block"]
244    #[inline(always)]
245    pub fn em4block(&mut self) -> EM4BLOCK_W {
246        EM4BLOCK_W::new(self)
247    }
248    #[doc = "Bit 6 - Software Oscillator Disable Block"]
249    #[inline(always)]
250    pub fn swoscblock(&mut self) -> SWOSCBLOCK_W {
251        SWOSCBLOCK_W::new(self)
252    }
253    #[doc = "Bits 8:11 - Watchdog Timeout Period Select"]
254    #[inline(always)]
255    pub fn persel(&mut self) -> PERSEL_W {
256        PERSEL_W::new(self)
257    }
258    #[doc = "Bits 12:13 - Watchdog Clock Select"]
259    #[inline(always)]
260    pub fn clksel(&mut self) -> CLKSEL_W {
261        CLKSEL_W::new(self)
262    }
263    #[doc = "Bits 16:17 - Watchdog Timeout Period Select"]
264    #[inline(always)]
265    pub fn warnsel(&mut self) -> WARNSEL_W {
266        WARNSEL_W::new(self)
267    }
268    #[doc = "Bits 24:26 - Watchdog Illegal Window Select"]
269    #[inline(always)]
270    pub fn winsel(&mut self) -> WINSEL_W {
271        WINSEL_W::new(self)
272    }
273    #[doc = "Bit 30 - Watchdog Clear Source"]
274    #[inline(always)]
275    pub fn clrsrc(&mut self) -> CLRSRC_W {
276        CLRSRC_W::new(self)
277    }
278    #[doc = "Bit 31 - Watchdog Reset Disable"]
279    #[inline(always)]
280    pub fn wdogrstdis(&mut self) -> WDOGRSTDIS_W {
281        WDOGRSTDIS_W::new(self)
282    }
283    #[doc = "Writes raw bits to the register."]
284    #[inline(always)]
285    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
286        self.0.bits(bits);
287        self
288    }
289}
290#[doc = "Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctrl](index.html) module"]
291pub struct CTRL_SPEC;
292impl crate::RegisterSpec for CTRL_SPEC {
293    type Ux = u32;
294}
295#[doc = "`read()` method returns [ctrl::R](R) reader structure"]
296impl crate::Readable for CTRL_SPEC {
297    type Reader = R;
298}
299#[doc = "`write(|w| ..)` method takes [ctrl::W](W) writer structure"]
300impl crate::Writable for CTRL_SPEC {
301    type Writer = W;
302}
303#[doc = "`reset()` method sets CTRL to value 0x0f00"]
304impl crate::Resettable for CTRL_SPEC {
305    #[inline(always)]
306    fn reset_value() -> Self::Ux {
307        0x0f00
308    }
309}
efm32pg1b200_pac/wdog0/ctrl.rs

efm32pg1b200_pac/wdog0/
ctrl.rs
