efm32pg1b200_pac/idac0/
aportconflict.rs

1#[doc = "Register `APORTCONFLICT` reader"]
2pub struct R(crate::R<APORTCONFLICT_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<APORTCONFLICT_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<APORTCONFLICT_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<APORTCONFLICT_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Field `APORT1XCONFLICT` reader - 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral"]
17pub type APORT1XCONFLICT_R = crate::BitReader<bool>;
18#[doc = "Field `APORT1YCONFLICT` reader - 1 If the Bus Connected to APORT1Y is in Conflict With Another Peripheral"]
19pub type APORT1YCONFLICT_R = crate::BitReader<bool>;
20impl R {
21    #[doc = "Bit 2 - 1 If the Bus Connected to APORT1X is in Conflict With Another Peripheral"]
22    #[inline(always)]
23    pub fn aport1xconflict(&self) -> APORT1XCONFLICT_R {
24        APORT1XCONFLICT_R::new(((self.bits >> 2) & 1) != 0)
25    }
26    #[doc = "Bit 3 - 1 If the Bus Connected to APORT1Y is in Conflict With Another Peripheral"]
27    #[inline(always)]
28    pub fn aport1yconflict(&self) -> APORT1YCONFLICT_R {
29        APORT1YCONFLICT_R::new(((self.bits >> 3) & 1) != 0)
30    }
31}
32#[doc = "APORT Request Status Register\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [aportconflict](index.html) module"]
33pub struct APORTCONFLICT_SPEC;
34impl crate::RegisterSpec for APORTCONFLICT_SPEC {
35    type Ux = u32;
36}
37#[doc = "`read()` method returns [aportconflict::R](R) reader structure"]
38impl crate::Readable for APORTCONFLICT_SPEC {
39    type Reader = R;
40}
41#[doc = "`reset()` method sets APORTCONFLICT to value 0"]
42impl crate::Resettable for APORTCONFLICT_SPEC {
43    #[inline(always)]
44    fn reset_value() -> Self::Ux {
45        0
46    }
47}
efm32pg1b200_pac/idac0/aportconflict.rs

efm32pg1b200_pac/idac0/
aportconflict.rs
