efm32pg1b200_pac/gpio/
extilevel.rs1#[doc = "Register `EXTILEVEL` reader"]
2pub struct R(crate::R<EXTILEVEL_SPEC>);
3impl core::ops::Deref for R {
4 type Target = crate::R<EXTILEVEL_SPEC>;
5 #[inline(always)]
6 fn deref(&self) -> &Self::Target {
7 &self.0
8 }
9}
10impl From<crate::R<EXTILEVEL_SPEC>> for R {
11 #[inline(always)]
12 fn from(reader: crate::R<EXTILEVEL_SPEC>) -> Self {
13 R(reader)
14 }
15}
16#[doc = "Register `EXTILEVEL` writer"]
17pub struct W(crate::W<EXTILEVEL_SPEC>);
18impl core::ops::Deref for W {
19 type Target = crate::W<EXTILEVEL_SPEC>;
20 #[inline(always)]
21 fn deref(&self) -> &Self::Target {
22 &self.0
23 }
24}
25impl core::ops::DerefMut for W {
26 #[inline(always)]
27 fn deref_mut(&mut self) -> &mut Self::Target {
28 &mut self.0
29 }
30}
31impl From<crate::W<EXTILEVEL_SPEC>> for W {
32 #[inline(always)]
33 fn from(writer: crate::W<EXTILEVEL_SPEC>) -> Self {
34 W(writer)
35 }
36}
37#[doc = "Field `EM4WU0` reader - EM4 Wake Up Level for EM4WU0 Pin"]
38pub type EM4WU0_R = crate::BitReader<bool>;
39#[doc = "Field `EM4WU0` writer - EM4 Wake Up Level for EM4WU0 Pin"]
40pub type EM4WU0_W<'a> = crate::BitWriter<'a, u32, EXTILEVEL_SPEC, bool, 16>;
41#[doc = "Field `EM4WU1` reader - EM4 Wake Up Level for EM4WU1 Pin"]
42pub type EM4WU1_R = crate::BitReader<bool>;
43#[doc = "Field `EM4WU1` writer - EM4 Wake Up Level for EM4WU1 Pin"]
44pub type EM4WU1_W<'a> = crate::BitWriter<'a, u32, EXTILEVEL_SPEC, bool, 17>;
45#[doc = "Field `EM4WU4` reader - EM4 Wake Up Level for EM4WU4 Pin"]
46pub type EM4WU4_R = crate::BitReader<bool>;
47#[doc = "Field `EM4WU4` writer - EM4 Wake Up Level for EM4WU4 Pin"]
48pub type EM4WU4_W<'a> = crate::BitWriter<'a, u32, EXTILEVEL_SPEC, bool, 20>;
49#[doc = "Field `EM4WU8` reader - EM4 Wake Up Level for EM4WU8 Pin"]
50pub type EM4WU8_R = crate::BitReader<bool>;
51#[doc = "Field `EM4WU8` writer - EM4 Wake Up Level for EM4WU8 Pin"]
52pub type EM4WU8_W<'a> = crate::BitWriter<'a, u32, EXTILEVEL_SPEC, bool, 24>;
53#[doc = "Field `EM4WU9` reader - EM4 Wake Up Level for EM4WU9 Pin"]
54pub type EM4WU9_R = crate::BitReader<bool>;
55#[doc = "Field `EM4WU9` writer - EM4 Wake Up Level for EM4WU9 Pin"]
56pub type EM4WU9_W<'a> = crate::BitWriter<'a, u32, EXTILEVEL_SPEC, bool, 25>;
57#[doc = "Field `EM4WU12` reader - EM4 Wake Up Level for EM4WU12 Pin"]
58pub type EM4WU12_R = crate::BitReader<bool>;
59#[doc = "Field `EM4WU12` writer - EM4 Wake Up Level for EM4WU12 Pin"]
60pub type EM4WU12_W<'a> = crate::BitWriter<'a, u32, EXTILEVEL_SPEC, bool, 28>;
61impl R {
62 #[doc = "Bit 16 - EM4 Wake Up Level for EM4WU0 Pin"]
63 #[inline(always)]
64 pub fn em4wu0(&self) -> EM4WU0_R {
65 EM4WU0_R::new(((self.bits >> 16) & 1) != 0)
66 }
67 #[doc = "Bit 17 - EM4 Wake Up Level for EM4WU1 Pin"]
68 #[inline(always)]
69 pub fn em4wu1(&self) -> EM4WU1_R {
70 EM4WU1_R::new(((self.bits >> 17) & 1) != 0)
71 }
72 #[doc = "Bit 20 - EM4 Wake Up Level for EM4WU4 Pin"]
73 #[inline(always)]
74 pub fn em4wu4(&self) -> EM4WU4_R {
75 EM4WU4_R::new(((self.bits >> 20) & 1) != 0)
76 }
77 #[doc = "Bit 24 - EM4 Wake Up Level for EM4WU8 Pin"]
78 #[inline(always)]
79 pub fn em4wu8(&self) -> EM4WU8_R {
80 EM4WU8_R::new(((self.bits >> 24) & 1) != 0)
81 }
82 #[doc = "Bit 25 - EM4 Wake Up Level for EM4WU9 Pin"]
83 #[inline(always)]
84 pub fn em4wu9(&self) -> EM4WU9_R {
85 EM4WU9_R::new(((self.bits >> 25) & 1) != 0)
86 }
87 #[doc = "Bit 28 - EM4 Wake Up Level for EM4WU12 Pin"]
88 #[inline(always)]
89 pub fn em4wu12(&self) -> EM4WU12_R {
90 EM4WU12_R::new(((self.bits >> 28) & 1) != 0)
91 }
92}
93impl W {
94 #[doc = "Bit 16 - EM4 Wake Up Level for EM4WU0 Pin"]
95 #[inline(always)]
96 pub fn em4wu0(&mut self) -> EM4WU0_W {
97 EM4WU0_W::new(self)
98 }
99 #[doc = "Bit 17 - EM4 Wake Up Level for EM4WU1 Pin"]
100 #[inline(always)]
101 pub fn em4wu1(&mut self) -> EM4WU1_W {
102 EM4WU1_W::new(self)
103 }
104 #[doc = "Bit 20 - EM4 Wake Up Level for EM4WU4 Pin"]
105 #[inline(always)]
106 pub fn em4wu4(&mut self) -> EM4WU4_W {
107 EM4WU4_W::new(self)
108 }
109 #[doc = "Bit 24 - EM4 Wake Up Level for EM4WU8 Pin"]
110 #[inline(always)]
111 pub fn em4wu8(&mut self) -> EM4WU8_W {
112 EM4WU8_W::new(self)
113 }
114 #[doc = "Bit 25 - EM4 Wake Up Level for EM4WU9 Pin"]
115 #[inline(always)]
116 pub fn em4wu9(&mut self) -> EM4WU9_W {
117 EM4WU9_W::new(self)
118 }
119 #[doc = "Bit 28 - EM4 Wake Up Level for EM4WU12 Pin"]
120 #[inline(always)]
121 pub fn em4wu12(&mut self) -> EM4WU12_W {
122 EM4WU12_W::new(self)
123 }
124 #[doc = "Writes raw bits to the register."]
125 #[inline(always)]
126 pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
127 self.0.bits(bits);
128 self
129 }
130}
131#[doc = "External Interrupt Level Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extilevel](index.html) module"]
132pub struct EXTILEVEL_SPEC;
133impl crate::RegisterSpec for EXTILEVEL_SPEC {
134 type Ux = u32;
135}
136#[doc = "`read()` method returns [extilevel::R](R) reader structure"]
137impl crate::Readable for EXTILEVEL_SPEC {
138 type Reader = R;
139}
140#[doc = "`write(|w| ..)` method takes [extilevel::W](W) writer structure"]
141impl crate::Writable for EXTILEVEL_SPEC {
142 type Writer = W;
143}
144#[doc = "`reset()` method sets EXTILEVEL to value 0"]
145impl crate::Resettable for EXTILEVEL_SPEC {
146 #[inline(always)]
147 fn reset_value() -> Self::Ux {
148 0
149 }
150}