efm32pg1b200_pac/cmu/
lfeclksel.rs

1#[doc = "Register `LFECLKSEL` reader"]
2pub struct R(crate::R<LFECLKSEL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<LFECLKSEL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<LFECLKSEL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<LFECLKSEL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `LFECLKSEL` writer"]
17pub struct W(crate::W<LFECLKSEL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<LFECLKSEL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<LFECLKSEL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<LFECLKSEL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Clock Select for LFE\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum LFE_A {
41    #[doc = "0: LFECLK is disabled"]
42    DISABLED = 0,
43    #[doc = "1: LFRCO selected as LFECLK"]
44    LFRCO = 1,
45    #[doc = "2: LFXO selected as LFECLK"]
46    LFXO = 2,
47    #[doc = "4: ULFRCO selected as LFECLK"]
48    ULFRCO = 4,
49}
50impl From<LFE_A> for u8 {
51    #[inline(always)]
52    fn from(variant: LFE_A) -> Self {
53        variant as _
54    }
55}
56#[doc = "Field `LFE` reader - Clock Select for LFE"]
57pub type LFE_R = crate::FieldReader<u8, LFE_A>;
58impl LFE_R {
59    #[doc = "Get enumerated values variant"]
60    #[inline(always)]
61    pub fn variant(&self) -> Option<LFE_A> {
62        match self.bits {
63            0 => Some(LFE_A::DISABLED),
64            1 => Some(LFE_A::LFRCO),
65            2 => Some(LFE_A::LFXO),
66            4 => Some(LFE_A::ULFRCO),
67            _ => None,
68        }
69    }
70    #[doc = "Checks if the value of the field is `DISABLED`"]
71    #[inline(always)]
72    pub fn is_disabled(&self) -> bool {
73        *self == LFE_A::DISABLED
74    }
75    #[doc = "Checks if the value of the field is `LFRCO`"]
76    #[inline(always)]
77    pub fn is_lfrco(&self) -> bool {
78        *self == LFE_A::LFRCO
79    }
80    #[doc = "Checks if the value of the field is `LFXO`"]
81    #[inline(always)]
82    pub fn is_lfxo(&self) -> bool {
83        *self == LFE_A::LFXO
84    }
85    #[doc = "Checks if the value of the field is `ULFRCO`"]
86    #[inline(always)]
87    pub fn is_ulfrco(&self) -> bool {
88        *self == LFE_A::ULFRCO
89    }
90}
91#[doc = "Field `LFE` writer - Clock Select for LFE"]
92pub type LFE_W<'a> = crate::FieldWriter<'a, u32, LFECLKSEL_SPEC, u8, LFE_A, 3, 0>;
93impl<'a> LFE_W<'a> {
94    #[doc = "LFECLK is disabled"]
95    #[inline(always)]
96    pub fn disabled(self) -> &'a mut W {
97        self.variant(LFE_A::DISABLED)
98    }
99    #[doc = "LFRCO selected as LFECLK"]
100    #[inline(always)]
101    pub fn lfrco(self) -> &'a mut W {
102        self.variant(LFE_A::LFRCO)
103    }
104    #[doc = "LFXO selected as LFECLK"]
105    #[inline(always)]
106    pub fn lfxo(self) -> &'a mut W {
107        self.variant(LFE_A::LFXO)
108    }
109    #[doc = "ULFRCO selected as LFECLK"]
110    #[inline(always)]
111    pub fn ulfrco(self) -> &'a mut W {
112        self.variant(LFE_A::ULFRCO)
113    }
114}
115impl R {
116    #[doc = "Bits 0:2 - Clock Select for LFE"]
117    #[inline(always)]
118    pub fn lfe(&self) -> LFE_R {
119        LFE_R::new((self.bits & 7) as u8)
120    }
121}
122impl W {
123    #[doc = "Bits 0:2 - Clock Select for LFE"]
124    #[inline(always)]
125    pub fn lfe(&mut self) -> LFE_W {
126        LFE_W::new(self)
127    }
128    #[doc = "Writes raw bits to the register."]
129    #[inline(always)]
130    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
131        self.0.bits(bits);
132        self
133    }
134}
135#[doc = "Low Frequency E Clock Select Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfeclksel](index.html) module"]
136pub struct LFECLKSEL_SPEC;
137impl crate::RegisterSpec for LFECLKSEL_SPEC {
138    type Ux = u32;
139}
140#[doc = "`read()` method returns [lfeclksel::R](R) reader structure"]
141impl crate::Readable for LFECLKSEL_SPEC {
142    type Reader = R;
143}
144#[doc = "`write(|w| ..)` method takes [lfeclksel::W](W) writer structure"]
145impl crate::Writable for LFECLKSEL_SPEC {
146    type Writer = W;
147}
148#[doc = "`reset()` method sets LFECLKSEL to value 0"]
149impl crate::Resettable for LFECLKSEL_SPEC {
150    #[inline(always)]
151    fn reset_value() -> Self::Ux {
152        0
153    }
154}
efm32pg1b200_pac/cmu/lfeclksel.rs

efm32pg1b200_pac/cmu/
lfeclksel.rs
