efm32pg1b200_pac/cmu/
hfxosteadystatectrl.rs

1#[doc = "Register `HFXOSTEADYSTATECTRL` reader"]
2pub struct R(crate::R<HFXOSTEADYSTATECTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<HFXOSTEADYSTATECTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<HFXOSTEADYSTATECTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<HFXOSTEADYSTATECTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `HFXOSTEADYSTATECTRL` writer"]
17pub struct W(crate::W<HFXOSTEADYSTATECTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<HFXOSTEADYSTATECTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<HFXOSTEADYSTATECTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<HFXOSTEADYSTATECTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `IBTRIMXOCORE` reader - Sets the Steady State Oscillator Core Bias Current."]
38pub type IBTRIMXOCORE_R = crate::FieldReader<u8, u8>;
39#[doc = "Field `IBTRIMXOCORE` writer - Sets the Steady State Oscillator Core Bias Current."]
40pub type IBTRIMXOCORE_W<'a> = crate::FieldWriter<'a, u32, HFXOSTEADYSTATECTRL_SPEC, u8, u8, 7, 0>;
41#[doc = "Field `REGISH` reader - Sets the Steady State Regulator Output Current Level (shunt Regulator)"]
42pub type REGISH_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `REGISH` writer - Sets the Steady State Regulator Output Current Level (shunt Regulator)"]
44pub type REGISH_W<'a> = crate::FieldWriter<'a, u32, HFXOSTEADYSTATECTRL_SPEC, u8, u8, 4, 7>;
45#[doc = "Field `CTUNE` reader - Sets Oscillator Tuning Capacitance"]
46pub type CTUNE_R = crate::FieldReader<u16, u16>;
47#[doc = "Field `CTUNE` writer - Sets Oscillator Tuning Capacitance"]
48pub type CTUNE_W<'a> = crate::FieldWriter<'a, u32, HFXOSTEADYSTATECTRL_SPEC, u16, u16, 9, 11>;
49#[doc = "Field `REGSELILOW` reader - Controls Regulator Minimum Shunt Current Detection Relative to Nominal"]
50pub type REGSELILOW_R = crate::FieldReader<u8, u8>;
51#[doc = "Field `REGSELILOW` writer - Controls Regulator Minimum Shunt Current Detection Relative to Nominal"]
52pub type REGSELILOW_W<'a> = crate::FieldWriter<'a, u32, HFXOSTEADYSTATECTRL_SPEC, u8, u8, 2, 24>;
53#[doc = "Field `PEAKDETEN` reader - Enables Oscillator Peak Detectors"]
54pub type PEAKDETEN_R = crate::BitReader<bool>;
55#[doc = "Field `PEAKDETEN` writer - Enables Oscillator Peak Detectors"]
56pub type PEAKDETEN_W<'a> = crate::BitWriter<'a, u32, HFXOSTEADYSTATECTRL_SPEC, bool, 26>;
57#[doc = "Field `REGISHUPPER` reader - Set Regulator Output Current Level (shunt Regulator). Ish = 120uA + REGISHUPPER X 120uA"]
58pub type REGISHUPPER_R = crate::FieldReader<u8, u8>;
59#[doc = "Field `REGISHUPPER` writer - Set Regulator Output Current Level (shunt Regulator). Ish = 120uA + REGISHUPPER X 120uA"]
60pub type REGISHUPPER_W<'a> = crate::FieldWriter<'a, u32, HFXOSTEADYSTATECTRL_SPEC, u8, u8, 4, 28>;
61impl R {
62    #[doc = "Bits 0:6 - Sets the Steady State Oscillator Core Bias Current."]
63    #[inline(always)]
64    pub fn ibtrimxocore(&self) -> IBTRIMXOCORE_R {
65        IBTRIMXOCORE_R::new((self.bits & 0x7f) as u8)
66    }
67    #[doc = "Bits 7:10 - Sets the Steady State Regulator Output Current Level (shunt Regulator)"]
68    #[inline(always)]
69    pub fn regish(&self) -> REGISH_R {
70        REGISH_R::new(((self.bits >> 7) & 0x0f) as u8)
71    }
72    #[doc = "Bits 11:19 - Sets Oscillator Tuning Capacitance"]
73    #[inline(always)]
74    pub fn ctune(&self) -> CTUNE_R {
75        CTUNE_R::new(((self.bits >> 11) & 0x01ff) as u16)
76    }
77    #[doc = "Bits 24:25 - Controls Regulator Minimum Shunt Current Detection Relative to Nominal"]
78    #[inline(always)]
79    pub fn regselilow(&self) -> REGSELILOW_R {
80        REGSELILOW_R::new(((self.bits >> 24) & 3) as u8)
81    }
82    #[doc = "Bit 26 - Enables Oscillator Peak Detectors"]
83    #[inline(always)]
84    pub fn peakdeten(&self) -> PEAKDETEN_R {
85        PEAKDETEN_R::new(((self.bits >> 26) & 1) != 0)
86    }
87    #[doc = "Bits 28:31 - Set Regulator Output Current Level (shunt Regulator). Ish = 120uA + REGISHUPPER X 120uA"]
88    #[inline(always)]
89    pub fn regishupper(&self) -> REGISHUPPER_R {
90        REGISHUPPER_R::new(((self.bits >> 28) & 0x0f) as u8)
91    }
92}
93impl W {
94    #[doc = "Bits 0:6 - Sets the Steady State Oscillator Core Bias Current."]
95    #[inline(always)]
96    pub fn ibtrimxocore(&mut self) -> IBTRIMXOCORE_W {
97        IBTRIMXOCORE_W::new(self)
98    }
99    #[doc = "Bits 7:10 - Sets the Steady State Regulator Output Current Level (shunt Regulator)"]
100    #[inline(always)]
101    pub fn regish(&mut self) -> REGISH_W {
102        REGISH_W::new(self)
103    }
104    #[doc = "Bits 11:19 - Sets Oscillator Tuning Capacitance"]
105    #[inline(always)]
106    pub fn ctune(&mut self) -> CTUNE_W {
107        CTUNE_W::new(self)
108    }
109    #[doc = "Bits 24:25 - Controls Regulator Minimum Shunt Current Detection Relative to Nominal"]
110    #[inline(always)]
111    pub fn regselilow(&mut self) -> REGSELILOW_W {
112        REGSELILOW_W::new(self)
113    }
114    #[doc = "Bit 26 - Enables Oscillator Peak Detectors"]
115    #[inline(always)]
116    pub fn peakdeten(&mut self) -> PEAKDETEN_W {
117        PEAKDETEN_W::new(self)
118    }
119    #[doc = "Bits 28:31 - Set Regulator Output Current Level (shunt Regulator). Ish = 120uA + REGISHUPPER X 120uA"]
120    #[inline(always)]
121    pub fn regishupper(&mut self) -> REGISHUPPER_W {
122        REGISHUPPER_W::new(self)
123    }
124    #[doc = "Writes raw bits to the register."]
125    #[inline(always)]
126    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
127        self.0.bits(bits);
128        self
129    }
130}
131#[doc = "HFXO Steady State Control\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfxosteadystatectrl](index.html) module"]
132pub struct HFXOSTEADYSTATECTRL_SPEC;
133impl crate::RegisterSpec for HFXOSTEADYSTATECTRL_SPEC {
134    type Ux = u32;
135}
136#[doc = "`read()` method returns [hfxosteadystatectrl::R](R) reader structure"]
137impl crate::Readable for HFXOSTEADYSTATECTRL_SPEC {
138    type Reader = R;
139}
140#[doc = "`write(|w| ..)` method takes [hfxosteadystatectrl::W](W) writer structure"]
141impl crate::Writable for HFXOSTEADYSTATECTRL_SPEC {
142    type Writer = W;
143}
144#[doc = "`reset()` method sets HFXOSTEADYSTATECTRL to value 0xa30a_ad09"]
145impl crate::Resettable for HFXOSTEADYSTATECTRL_SPEC {
146    #[inline(always)]
147    fn reset_value() -> Self::Ux {
148        0xa30a_ad09
149    }
150}
efm32pg1b200_pac/cmu/hfxosteadystatectrl.rs

efm32pg1b200_pac/cmu/
hfxosteadystatectrl.rs
