efm32pg1b200_pac/adc0/
singlectrlx.rs

1#[doc = "Register `SINGLECTRLX` reader"]
2pub struct R(crate::R<SINGLECTRLX_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<SINGLECTRLX_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<SINGLECTRLX_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<SINGLECTRLX_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `SINGLECTRLX` writer"]
17pub struct W(crate::W<SINGLECTRLX_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<SINGLECTRLX_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<SINGLECTRLX_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<SINGLECTRLX_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Single Channel Reference Selection\n\nValue on reset: 0"]
38#[derive(Clone, Copy, Debug, PartialEq)]
39#[repr(u8)]
40pub enum VREFSEL_A {
41    #[doc = "0: Internal 0.83V Bandgap reference"]
42    VBGR = 0,
43    #[doc = "1: Scaled AVDD: AVDD*(the VREF attenuation factor)"]
44    VDDXWATT = 1,
45    #[doc = "2: Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
46    VREFPWATT = 2,
47    #[doc = "3: Raw single ended external Vref: ADCn_EXTP"]
48    VREFP = 3,
49    #[doc = "4: Special mode used to generate ENTROPY."]
50    VENTROPY = 4,
51    #[doc = "5: Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
52    VREFPNWATT = 5,
53    #[doc = "6: Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
54    VREFPN = 6,
55    #[doc = "7: Internal Bandgap reference at low setting 0.78V"]
56    VBGRLOW = 7,
57}
58impl From<VREFSEL_A> for u8 {
59    #[inline(always)]
60    fn from(variant: VREFSEL_A) -> Self {
61        variant as _
62    }
63}
64#[doc = "Field `VREFSEL` reader - Single Channel Reference Selection"]
65pub type VREFSEL_R = crate::FieldReader<u8, VREFSEL_A>;
66impl VREFSEL_R {
67    #[doc = "Get enumerated values variant"]
68    #[inline(always)]
69    pub fn variant(&self) -> VREFSEL_A {
70        match self.bits {
71            0 => VREFSEL_A::VBGR,
72            1 => VREFSEL_A::VDDXWATT,
73            2 => VREFSEL_A::VREFPWATT,
74            3 => VREFSEL_A::VREFP,
75            4 => VREFSEL_A::VENTROPY,
76            5 => VREFSEL_A::VREFPNWATT,
77            6 => VREFSEL_A::VREFPN,
78            7 => VREFSEL_A::VBGRLOW,
79            _ => unreachable!(),
80        }
81    }
82    #[doc = "Checks if the value of the field is `VBGR`"]
83    #[inline(always)]
84    pub fn is_vbgr(&self) -> bool {
85        *self == VREFSEL_A::VBGR
86    }
87    #[doc = "Checks if the value of the field is `VDDXWATT`"]
88    #[inline(always)]
89    pub fn is_vddxwatt(&self) -> bool {
90        *self == VREFSEL_A::VDDXWATT
91    }
92    #[doc = "Checks if the value of the field is `VREFPWATT`"]
93    #[inline(always)]
94    pub fn is_vrefpwatt(&self) -> bool {
95        *self == VREFSEL_A::VREFPWATT
96    }
97    #[doc = "Checks if the value of the field is `VREFP`"]
98    #[inline(always)]
99    pub fn is_vrefp(&self) -> bool {
100        *self == VREFSEL_A::VREFP
101    }
102    #[doc = "Checks if the value of the field is `VENTROPY`"]
103    #[inline(always)]
104    pub fn is_ventropy(&self) -> bool {
105        *self == VREFSEL_A::VENTROPY
106    }
107    #[doc = "Checks if the value of the field is `VREFPNWATT`"]
108    #[inline(always)]
109    pub fn is_vrefpnwatt(&self) -> bool {
110        *self == VREFSEL_A::VREFPNWATT
111    }
112    #[doc = "Checks if the value of the field is `VREFPN`"]
113    #[inline(always)]
114    pub fn is_vrefpn(&self) -> bool {
115        *self == VREFSEL_A::VREFPN
116    }
117    #[doc = "Checks if the value of the field is `VBGRLOW`"]
118    #[inline(always)]
119    pub fn is_vbgrlow(&self) -> bool {
120        *self == VREFSEL_A::VBGRLOW
121    }
122}
123#[doc = "Field `VREFSEL` writer - Single Channel Reference Selection"]
124pub type VREFSEL_W<'a> = crate::FieldWriterSafe<'a, u32, SINGLECTRLX_SPEC, u8, VREFSEL_A, 3, 0>;
125impl<'a> VREFSEL_W<'a> {
126    #[doc = "Internal 0.83V Bandgap reference"]
127    #[inline(always)]
128    pub fn vbgr(self) -> &'a mut W {
129        self.variant(VREFSEL_A::VBGR)
130    }
131    #[doc = "Scaled AVDD: AVDD*(the VREF attenuation factor)"]
132    #[inline(always)]
133    pub fn vddxwatt(self) -> &'a mut W {
134        self.variant(VREFSEL_A::VDDXWATT)
135    }
136    #[doc = "Scaled singled ended external Vref: ADCn_EXTP*(the VREF attenuation factor)"]
137    #[inline(always)]
138    pub fn vrefpwatt(self) -> &'a mut W {
139        self.variant(VREFSEL_A::VREFPWATT)
140    }
141    #[doc = "Raw single ended external Vref: ADCn_EXTP"]
142    #[inline(always)]
143    pub fn vrefp(self) -> &'a mut W {
144        self.variant(VREFSEL_A::VREFP)
145    }
146    #[doc = "Special mode used to generate ENTROPY."]
147    #[inline(always)]
148    pub fn ventropy(self) -> &'a mut W {
149        self.variant(VREFSEL_A::VENTROPY)
150    }
151    #[doc = "Scaled differential external Vref from : (ADCn_EXTP-ADCn_EXTN)*(the VREF attenuation factor)"]
152    #[inline(always)]
153    pub fn vrefpnwatt(self) -> &'a mut W {
154        self.variant(VREFSEL_A::VREFPNWATT)
155    }
156    #[doc = "Raw differential external Vref from : (ADCn_EXTP-ADCn_EXTN)"]
157    #[inline(always)]
158    pub fn vrefpn(self) -> &'a mut W {
159        self.variant(VREFSEL_A::VREFPN)
160    }
161    #[doc = "Internal Bandgap reference at low setting 0.78V"]
162    #[inline(always)]
163    pub fn vbgrlow(self) -> &'a mut W {
164        self.variant(VREFSEL_A::VBGRLOW)
165    }
166}
167#[doc = "Field `VREFATTFIX` reader - Enable Fixed Scaling on VREF"]
168pub type VREFATTFIX_R = crate::BitReader<bool>;
169#[doc = "Field `VREFATTFIX` writer - Enable Fixed Scaling on VREF"]
170pub type VREFATTFIX_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 3>;
171#[doc = "Field `VREFATT` reader - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
172pub type VREFATT_R = crate::FieldReader<u8, u8>;
173#[doc = "Field `VREFATT` writer - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
174pub type VREFATT_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 4, 4>;
175#[doc = "Field `VINATT` reader - Code for VIN Attenuation Factor"]
176pub type VINATT_R = crate::FieldReader<u8, u8>;
177#[doc = "Field `VINATT` writer - Code for VIN Attenuation Factor"]
178pub type VINATT_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 4, 8>;
179#[doc = "Field `DVL` reader - Single Channel DV Level Select"]
180pub type DVL_R = crate::FieldReader<u8, u8>;
181#[doc = "Field `DVL` writer - Single Channel DV Level Select"]
182pub type DVL_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 2, 12>;
183#[doc = "Field `FIFOOFACT` reader - Single Channel FIFO Overflow Action"]
184pub type FIFOOFACT_R = crate::BitReader<bool>;
185#[doc = "Field `FIFOOFACT` writer - Single Channel FIFO Overflow Action"]
186pub type FIFOOFACT_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 14>;
187#[doc = "Field `PRSMODE` reader - Single Channel PRS Trigger Mode"]
188pub type PRSMODE_R = crate::BitReader<bool>;
189#[doc = "Field `PRSMODE` writer - Single Channel PRS Trigger Mode"]
190pub type PRSMODE_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 16>;
191#[doc = "Single Channel PRS Trigger Select\n\nValue on reset: 0"]
192#[derive(Clone, Copy, Debug, PartialEq)]
193#[repr(u8)]
194pub enum PRSSEL_A {
195    #[doc = "0: PRS ch 0 triggers single channel"]
196    PRSCH0 = 0,
197    #[doc = "1: PRS ch 1 triggers single channel"]
198    PRSCH1 = 1,
199    #[doc = "2: PRS ch 2 triggers single channel"]
200    PRSCH2 = 2,
201    #[doc = "3: PRS ch 3 triggers single channel"]
202    PRSCH3 = 3,
203    #[doc = "4: PRS ch 4 triggers single channel"]
204    PRSCH4 = 4,
205    #[doc = "5: PRS ch 5 triggers single channel"]
206    PRSCH5 = 5,
207    #[doc = "6: PRS ch 6 triggers single channel"]
208    PRSCH6 = 6,
209    #[doc = "7: PRS ch 7 triggers single channel"]
210    PRSCH7 = 7,
211    #[doc = "8: PRS ch 8 triggers single channel"]
212    PRSCH8 = 8,
213    #[doc = "9: PRS ch 9 triggers single channel"]
214    PRSCH9 = 9,
215    #[doc = "10: PRS ch 10 triggers single channel"]
216    PRSCH10 = 10,
217    #[doc = "11: PRS ch 11 triggers single channel"]
218    PRSCH11 = 11,
219}
220impl From<PRSSEL_A> for u8 {
221    #[inline(always)]
222    fn from(variant: PRSSEL_A) -> Self {
223        variant as _
224    }
225}
226#[doc = "Field `PRSSEL` reader - Single Channel PRS Trigger Select"]
227pub type PRSSEL_R = crate::FieldReader<u8, PRSSEL_A>;
228impl PRSSEL_R {
229    #[doc = "Get enumerated values variant"]
230    #[inline(always)]
231    pub fn variant(&self) -> Option<PRSSEL_A> {
232        match self.bits {
233            0 => Some(PRSSEL_A::PRSCH0),
234            1 => Some(PRSSEL_A::PRSCH1),
235            2 => Some(PRSSEL_A::PRSCH2),
236            3 => Some(PRSSEL_A::PRSCH3),
237            4 => Some(PRSSEL_A::PRSCH4),
238            5 => Some(PRSSEL_A::PRSCH5),
239            6 => Some(PRSSEL_A::PRSCH6),
240            7 => Some(PRSSEL_A::PRSCH7),
241            8 => Some(PRSSEL_A::PRSCH8),
242            9 => Some(PRSSEL_A::PRSCH9),
243            10 => Some(PRSSEL_A::PRSCH10),
244            11 => Some(PRSSEL_A::PRSCH11),
245            _ => None,
246        }
247    }
248    #[doc = "Checks if the value of the field is `PRSCH0`"]
249    #[inline(always)]
250    pub fn is_prsch0(&self) -> bool {
251        *self == PRSSEL_A::PRSCH0
252    }
253    #[doc = "Checks if the value of the field is `PRSCH1`"]
254    #[inline(always)]
255    pub fn is_prsch1(&self) -> bool {
256        *self == PRSSEL_A::PRSCH1
257    }
258    #[doc = "Checks if the value of the field is `PRSCH2`"]
259    #[inline(always)]
260    pub fn is_prsch2(&self) -> bool {
261        *self == PRSSEL_A::PRSCH2
262    }
263    #[doc = "Checks if the value of the field is `PRSCH3`"]
264    #[inline(always)]
265    pub fn is_prsch3(&self) -> bool {
266        *self == PRSSEL_A::PRSCH3
267    }
268    #[doc = "Checks if the value of the field is `PRSCH4`"]
269    #[inline(always)]
270    pub fn is_prsch4(&self) -> bool {
271        *self == PRSSEL_A::PRSCH4
272    }
273    #[doc = "Checks if the value of the field is `PRSCH5`"]
274    #[inline(always)]
275    pub fn is_prsch5(&self) -> bool {
276        *self == PRSSEL_A::PRSCH5
277    }
278    #[doc = "Checks if the value of the field is `PRSCH6`"]
279    #[inline(always)]
280    pub fn is_prsch6(&self) -> bool {
281        *self == PRSSEL_A::PRSCH6
282    }
283    #[doc = "Checks if the value of the field is `PRSCH7`"]
284    #[inline(always)]
285    pub fn is_prsch7(&self) -> bool {
286        *self == PRSSEL_A::PRSCH7
287    }
288    #[doc = "Checks if the value of the field is `PRSCH8`"]
289    #[inline(always)]
290    pub fn is_prsch8(&self) -> bool {
291        *self == PRSSEL_A::PRSCH8
292    }
293    #[doc = "Checks if the value of the field is `PRSCH9`"]
294    #[inline(always)]
295    pub fn is_prsch9(&self) -> bool {
296        *self == PRSSEL_A::PRSCH9
297    }
298    #[doc = "Checks if the value of the field is `PRSCH10`"]
299    #[inline(always)]
300    pub fn is_prsch10(&self) -> bool {
301        *self == PRSSEL_A::PRSCH10
302    }
303    #[doc = "Checks if the value of the field is `PRSCH11`"]
304    #[inline(always)]
305    pub fn is_prsch11(&self) -> bool {
306        *self == PRSSEL_A::PRSCH11
307    }
308}
309#[doc = "Field `PRSSEL` writer - Single Channel PRS Trigger Select"]
310pub type PRSSEL_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, PRSSEL_A, 4, 17>;
311impl<'a> PRSSEL_W<'a> {
312    #[doc = "PRS ch 0 triggers single channel"]
313    #[inline(always)]
314    pub fn prsch0(self) -> &'a mut W {
315        self.variant(PRSSEL_A::PRSCH0)
316    }
317    #[doc = "PRS ch 1 triggers single channel"]
318    #[inline(always)]
319    pub fn prsch1(self) -> &'a mut W {
320        self.variant(PRSSEL_A::PRSCH1)
321    }
322    #[doc = "PRS ch 2 triggers single channel"]
323    #[inline(always)]
324    pub fn prsch2(self) -> &'a mut W {
325        self.variant(PRSSEL_A::PRSCH2)
326    }
327    #[doc = "PRS ch 3 triggers single channel"]
328    #[inline(always)]
329    pub fn prsch3(self) -> &'a mut W {
330        self.variant(PRSSEL_A::PRSCH3)
331    }
332    #[doc = "PRS ch 4 triggers single channel"]
333    #[inline(always)]
334    pub fn prsch4(self) -> &'a mut W {
335        self.variant(PRSSEL_A::PRSCH4)
336    }
337    #[doc = "PRS ch 5 triggers single channel"]
338    #[inline(always)]
339    pub fn prsch5(self) -> &'a mut W {
340        self.variant(PRSSEL_A::PRSCH5)
341    }
342    #[doc = "PRS ch 6 triggers single channel"]
343    #[inline(always)]
344    pub fn prsch6(self) -> &'a mut W {
345        self.variant(PRSSEL_A::PRSCH6)
346    }
347    #[doc = "PRS ch 7 triggers single channel"]
348    #[inline(always)]
349    pub fn prsch7(self) -> &'a mut W {
350        self.variant(PRSSEL_A::PRSCH7)
351    }
352    #[doc = "PRS ch 8 triggers single channel"]
353    #[inline(always)]
354    pub fn prsch8(self) -> &'a mut W {
355        self.variant(PRSSEL_A::PRSCH8)
356    }
357    #[doc = "PRS ch 9 triggers single channel"]
358    #[inline(always)]
359    pub fn prsch9(self) -> &'a mut W {
360        self.variant(PRSSEL_A::PRSCH9)
361    }
362    #[doc = "PRS ch 10 triggers single channel"]
363    #[inline(always)]
364    pub fn prsch10(self) -> &'a mut W {
365        self.variant(PRSSEL_A::PRSCH10)
366    }
367    #[doc = "PRS ch 11 triggers single channel"]
368    #[inline(always)]
369    pub fn prsch11(self) -> &'a mut W {
370        self.variant(PRSSEL_A::PRSCH11)
371    }
372}
373#[doc = "Field `CONVSTARTDELAY` reader - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
374pub type CONVSTARTDELAY_R = crate::FieldReader<u8, u8>;
375#[doc = "Field `CONVSTARTDELAY` writer - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
376pub type CONVSTARTDELAY_W<'a> = crate::FieldWriter<'a, u32, SINGLECTRLX_SPEC, u8, u8, 3, 24>;
377#[doc = "Field `CONVSTARTDELAYEN` reader - Enable Delaying Next Conversion Start"]
378pub type CONVSTARTDELAYEN_R = crate::BitReader<bool>;
379#[doc = "Field `CONVSTARTDELAYEN` writer - Enable Delaying Next Conversion Start"]
380pub type CONVSTARTDELAYEN_W<'a> = crate::BitWriter<'a, u32, SINGLECTRLX_SPEC, bool, 27>;
381impl R {
382    #[doc = "Bits 0:2 - Single Channel Reference Selection"]
383    #[inline(always)]
384    pub fn vrefsel(&self) -> VREFSEL_R {
385        VREFSEL_R::new((self.bits & 7) as u8)
386    }
387    #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
388    #[inline(always)]
389    pub fn vrefattfix(&self) -> VREFATTFIX_R {
390        VREFATTFIX_R::new(((self.bits >> 3) & 1) != 0)
391    }
392    #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
393    #[inline(always)]
394    pub fn vrefatt(&self) -> VREFATT_R {
395        VREFATT_R::new(((self.bits >> 4) & 0x0f) as u8)
396    }
397    #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
398    #[inline(always)]
399    pub fn vinatt(&self) -> VINATT_R {
400        VINATT_R::new(((self.bits >> 8) & 0x0f) as u8)
401    }
402    #[doc = "Bits 12:13 - Single Channel DV Level Select"]
403    #[inline(always)]
404    pub fn dvl(&self) -> DVL_R {
405        DVL_R::new(((self.bits >> 12) & 3) as u8)
406    }
407    #[doc = "Bit 14 - Single Channel FIFO Overflow Action"]
408    #[inline(always)]
409    pub fn fifoofact(&self) -> FIFOOFACT_R {
410        FIFOOFACT_R::new(((self.bits >> 14) & 1) != 0)
411    }
412    #[doc = "Bit 16 - Single Channel PRS Trigger Mode"]
413    #[inline(always)]
414    pub fn prsmode(&self) -> PRSMODE_R {
415        PRSMODE_R::new(((self.bits >> 16) & 1) != 0)
416    }
417    #[doc = "Bits 17:20 - Single Channel PRS Trigger Select"]
418    #[inline(always)]
419    pub fn prssel(&self) -> PRSSEL_R {
420        PRSSEL_R::new(((self.bits >> 17) & 0x0f) as u8)
421    }
422    #[doc = "Bits 24:26 - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
423    #[inline(always)]
424    pub fn convstartdelay(&self) -> CONVSTARTDELAY_R {
425        CONVSTARTDELAY_R::new(((self.bits >> 24) & 7) as u8)
426    }
427    #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
428    #[inline(always)]
429    pub fn convstartdelayen(&self) -> CONVSTARTDELAYEN_R {
430        CONVSTARTDELAYEN_R::new(((self.bits >> 27) & 1) != 0)
431    }
432}
433impl W {
434    #[doc = "Bits 0:2 - Single Channel Reference Selection"]
435    #[inline(always)]
436    pub fn vrefsel(&mut self) -> VREFSEL_W {
437        VREFSEL_W::new(self)
438    }
439    #[doc = "Bit 3 - Enable Fixed Scaling on VREF"]
440    #[inline(always)]
441    pub fn vrefattfix(&mut self) -> VREFATTFIX_W {
442        VREFATTFIX_W::new(self)
443    }
444    #[doc = "Bits 4:7 - Code for VREF Attenuation Factor When VREFSEL is 1, 2 or 5"]
445    #[inline(always)]
446    pub fn vrefatt(&mut self) -> VREFATT_W {
447        VREFATT_W::new(self)
448    }
449    #[doc = "Bits 8:11 - Code for VIN Attenuation Factor"]
450    #[inline(always)]
451    pub fn vinatt(&mut self) -> VINATT_W {
452        VINATT_W::new(self)
453    }
454    #[doc = "Bits 12:13 - Single Channel DV Level Select"]
455    #[inline(always)]
456    pub fn dvl(&mut self) -> DVL_W {
457        DVL_W::new(self)
458    }
459    #[doc = "Bit 14 - Single Channel FIFO Overflow Action"]
460    #[inline(always)]
461    pub fn fifoofact(&mut self) -> FIFOOFACT_W {
462        FIFOOFACT_W::new(self)
463    }
464    #[doc = "Bit 16 - Single Channel PRS Trigger Mode"]
465    #[inline(always)]
466    pub fn prsmode(&mut self) -> PRSMODE_W {
467        PRSMODE_W::new(self)
468    }
469    #[doc = "Bits 17:20 - Single Channel PRS Trigger Select"]
470    #[inline(always)]
471    pub fn prssel(&mut self) -> PRSSEL_W {
472        PRSSEL_W::new(self)
473    }
474    #[doc = "Bits 24:26 - Delay Value for Next Conversion Start If CONVSTARTDELAYEN is Set"]
475    #[inline(always)]
476    pub fn convstartdelay(&mut self) -> CONVSTARTDELAY_W {
477        CONVSTARTDELAY_W::new(self)
478    }
479    #[doc = "Bit 27 - Enable Delaying Next Conversion Start"]
480    #[inline(always)]
481    pub fn convstartdelayen(&mut self) -> CONVSTARTDELAYEN_W {
482        CONVSTARTDELAYEN_W::new(self)
483    }
484    #[doc = "Writes raw bits to the register."]
485    #[inline(always)]
486    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
487        self.0.bits(bits);
488        self
489    }
490}
491#[doc = "Single Channel Control Register Continued\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [singlectrlx](index.html) module"]
492pub struct SINGLECTRLX_SPEC;
493impl crate::RegisterSpec for SINGLECTRLX_SPEC {
494    type Ux = u32;
495}
496#[doc = "`read()` method returns [singlectrlx::R](R) reader structure"]
497impl crate::Readable for SINGLECTRLX_SPEC {
498    type Reader = R;
499}
500#[doc = "`write(|w| ..)` method takes [singlectrlx::W](W) writer structure"]
501impl crate::Writable for SINGLECTRLX_SPEC {
502    type Writer = W;
503}
504#[doc = "`reset()` method sets SINGLECTRLX to value 0"]
505impl crate::Resettable for SINGLECTRLX_SPEC {
506    #[inline(always)]
507    fn reset_value() -> Self::Ux {
508        0
509    }
510}
efm32pg1b200_pac/adc0/singlectrlx.rs

efm32pg1b200_pac/adc0/
singlectrlx.rs
