efm32pg1b200_pac/msc/
ifc.rs

1#[doc = "Register `IFC` writer"]
2pub struct W(crate::W<IFC_SPEC>);
3impl core::ops::Deref for W {
4    type Target = crate::W<IFC_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl core::ops::DerefMut for W {
11    #[inline(always)]
12    fn deref_mut(&mut self) -> &mut Self::Target {
13        &mut self.0
14    }
15}
16impl From<crate::W<IFC_SPEC>> for W {
17    #[inline(always)]
18    fn from(writer: crate::W<IFC_SPEC>) -> Self {
19        W(writer)
20    }
21}
22#[doc = "Field `ERASE` writer - Clear ERASE Interrupt Flag"]
23pub type ERASE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 0>;
24#[doc = "Field `WRITE` writer - Clear WRITE Interrupt Flag"]
25pub type WRITE_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 1>;
26#[doc = "Field `CHOF` writer - Clear CHOF Interrupt Flag"]
27pub type CHOF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 2>;
28#[doc = "Field `CMOF` writer - Clear CMOF Interrupt Flag"]
29pub type CMOF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 3>;
30#[doc = "Field `PWRUPF` writer - Clear PWRUPF Interrupt Flag"]
31pub type PWRUPF_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 4>;
32#[doc = "Field `ICACHERR` writer - Clear ICACHERR Interrupt Flag"]
33pub type ICACHERR_W<'a> = crate::BitWriter<'a, u32, IFC_SPEC, bool, 5>;
34impl W {
35    #[doc = "Bit 0 - Clear ERASE Interrupt Flag"]
36    #[inline(always)]
37    pub fn erase(&mut self) -> ERASE_W {
38        ERASE_W::new(self)
39    }
40    #[doc = "Bit 1 - Clear WRITE Interrupt Flag"]
41    #[inline(always)]
42    pub fn write(&mut self) -> WRITE_W {
43        WRITE_W::new(self)
44    }
45    #[doc = "Bit 2 - Clear CHOF Interrupt Flag"]
46    #[inline(always)]
47    pub fn chof(&mut self) -> CHOF_W {
48        CHOF_W::new(self)
49    }
50    #[doc = "Bit 3 - Clear CMOF Interrupt Flag"]
51    #[inline(always)]
52    pub fn cmof(&mut self) -> CMOF_W {
53        CMOF_W::new(self)
54    }
55    #[doc = "Bit 4 - Clear PWRUPF Interrupt Flag"]
56    #[inline(always)]
57    pub fn pwrupf(&mut self) -> PWRUPF_W {
58        PWRUPF_W::new(self)
59    }
60    #[doc = "Bit 5 - Clear ICACHERR Interrupt Flag"]
61    #[inline(always)]
62    pub fn icacherr(&mut self) -> ICACHERR_W {
63        ICACHERR_W::new(self)
64    }
65    #[doc = "Writes raw bits to the register."]
66    #[inline(always)]
67    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
68        self.0.bits(bits);
69        self
70    }
71}
72#[doc = "Interrupt Flag Clear Register\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ifc](index.html) module"]
73pub struct IFC_SPEC;
74impl crate::RegisterSpec for IFC_SPEC {
75    type Ux = u32;
76}
77#[doc = "`write(|w| ..)` method takes [ifc::W](W) writer structure"]
78impl crate::Writable for IFC_SPEC {
79    type Writer = W;
80}
81#[doc = "`reset()` method sets IFC to value 0"]
82impl crate::Resettable for IFC_SPEC {
83    #[inline(always)]
84    fn reset_value() -> Self::Ux {
85        0
86    }
87}
efm32pg1b200_pac/msc/ifc.rs

efm32pg1b200_pac/msc/
ifc.rs
