efm32pg1b200_pac/emu/
dcdcmiscctrl.rs

1#[doc = "Register `DCDCMISCCTRL` reader"]
2pub struct R(crate::R<DCDCMISCCTRL_SPEC>);
3impl core::ops::Deref for R {
4    type Target = crate::R<DCDCMISCCTRL_SPEC>;
5    #[inline(always)]
6    fn deref(&self) -> &Self::Target {
7        &self.0
8    }
9}
10impl From<crate::R<DCDCMISCCTRL_SPEC>> for R {
11    #[inline(always)]
12    fn from(reader: crate::R<DCDCMISCCTRL_SPEC>) -> Self {
13        R(reader)
14    }
15}
16#[doc = "Register `DCDCMISCCTRL` writer"]
17pub struct W(crate::W<DCDCMISCCTRL_SPEC>);
18impl core::ops::Deref for W {
19    type Target = crate::W<DCDCMISCCTRL_SPEC>;
20    #[inline(always)]
21    fn deref(&self) -> &Self::Target {
22        &self.0
23    }
24}
25impl core::ops::DerefMut for W {
26    #[inline(always)]
27    fn deref_mut(&mut self) -> &mut Self::Target {
28        &mut self.0
29    }
30}
31impl From<crate::W<DCDCMISCCTRL_SPEC>> for W {
32    #[inline(always)]
33    fn from(writer: crate::W<DCDCMISCCTRL_SPEC>) -> Self {
34        W(writer)
35    }
36}
37#[doc = "Field `LNFORCECCM` reader - Force DCDC Into CCM Mode in Low Noise Operation"]
38pub type LNFORCECCM_R = crate::BitReader<bool>;
39#[doc = "Field `LNFORCECCM` writer - Force DCDC Into CCM Mode in Low Noise Operation"]
40pub type LNFORCECCM_W<'a> = crate::BitWriter<'a, u32, DCDCMISCCTRL_SPEC, bool, 0>;
41#[doc = "Field `PFETCNT` reader - PFET Switch Number Selection"]
42pub type PFETCNT_R = crate::FieldReader<u8, u8>;
43#[doc = "Field `PFETCNT` writer - PFET Switch Number Selection"]
44pub type PFETCNT_W<'a> = crate::FieldWriter<'a, u32, DCDCMISCCTRL_SPEC, u8, u8, 4, 8>;
45#[doc = "Field `NFETCNT` reader - NFET Switch Number Selection"]
46pub type NFETCNT_R = crate::FieldReader<u8, u8>;
47#[doc = "Field `NFETCNT` writer - NFET Switch Number Selection"]
48pub type NFETCNT_W<'a> = crate::FieldWriter<'a, u32, DCDCMISCCTRL_SPEC, u8, u8, 4, 12>;
49#[doc = "Field `BYPLIMSEL` reader - Current Limit in Bypass Mode"]
50pub type BYPLIMSEL_R = crate::FieldReader<u8, u8>;
51#[doc = "Field `BYPLIMSEL` writer - Current Limit in Bypass Mode"]
52pub type BYPLIMSEL_W<'a> = crate::FieldWriter<'a, u32, DCDCMISCCTRL_SPEC, u8, u8, 4, 16>;
53#[doc = "Field `LPCLIMILIMSEL` reader - Current Limit Level Selection for Current Limiter in LP Mode"]
54pub type LPCLIMILIMSEL_R = crate::FieldReader<u8, u8>;
55#[doc = "Field `LPCLIMILIMSEL` writer - Current Limit Level Selection for Current Limiter in LP Mode"]
56pub type LPCLIMILIMSEL_W<'a> = crate::FieldWriter<'a, u32, DCDCMISCCTRL_SPEC, u8, u8, 3, 20>;
57#[doc = "Field `LNCLIMILIMSEL` reader - Current Limit Level Selection for Current Limiter in LN Mode"]
58pub type LNCLIMILIMSEL_R = crate::FieldReader<u8, u8>;
59#[doc = "Field `LNCLIMILIMSEL` writer - Current Limit Level Selection for Current Limiter in LN Mode"]
60pub type LNCLIMILIMSEL_W<'a> = crate::FieldWriter<'a, u32, DCDCMISCCTRL_SPEC, u8, u8, 3, 24>;
61#[doc = "LP Mode Comparator Bias Selection\n\nValue on reset: 3"]
62#[derive(Clone, Copy, Debug, PartialEq)]
63#[repr(u8)]
64pub enum LPCMPBIAS_A {
65    #[doc = "0: Maximum load current less than 75uA."]
66    BIAS0 = 0,
67    #[doc = "1: Maximum load current less than 500uA."]
68    BIAS1 = 1,
69    #[doc = "2: Maximum load current less than 2.5mA."]
70    BIAS2 = 2,
71    #[doc = "3: Maximum load current less than 10mA."]
72    BIAS3 = 3,
73}
74impl From<LPCMPBIAS_A> for u8 {
75    #[inline(always)]
76    fn from(variant: LPCMPBIAS_A) -> Self {
77        variant as _
78    }
79}
80#[doc = "Field `LPCMPBIAS` reader - LP Mode Comparator Bias Selection"]
81pub type LPCMPBIAS_R = crate::FieldReader<u8, LPCMPBIAS_A>;
82impl LPCMPBIAS_R {
83    #[doc = "Get enumerated values variant"]
84    #[inline(always)]
85    pub fn variant(&self) -> LPCMPBIAS_A {
86        match self.bits {
87            0 => LPCMPBIAS_A::BIAS0,
88            1 => LPCMPBIAS_A::BIAS1,
89            2 => LPCMPBIAS_A::BIAS2,
90            3 => LPCMPBIAS_A::BIAS3,
91            _ => unreachable!(),
92        }
93    }
94    #[doc = "Checks if the value of the field is `BIAS0`"]
95    #[inline(always)]
96    pub fn is_bias0(&self) -> bool {
97        *self == LPCMPBIAS_A::BIAS0
98    }
99    #[doc = "Checks if the value of the field is `BIAS1`"]
100    #[inline(always)]
101    pub fn is_bias1(&self) -> bool {
102        *self == LPCMPBIAS_A::BIAS1
103    }
104    #[doc = "Checks if the value of the field is `BIAS2`"]
105    #[inline(always)]
106    pub fn is_bias2(&self) -> bool {
107        *self == LPCMPBIAS_A::BIAS2
108    }
109    #[doc = "Checks if the value of the field is `BIAS3`"]
110    #[inline(always)]
111    pub fn is_bias3(&self) -> bool {
112        *self == LPCMPBIAS_A::BIAS3
113    }
114}
115#[doc = "Field `LPCMPBIAS` writer - LP Mode Comparator Bias Selection"]
116pub type LPCMPBIAS_W<'a> =
117    crate::FieldWriterSafe<'a, u32, DCDCMISCCTRL_SPEC, u8, LPCMPBIAS_A, 2, 28>;
118impl<'a> LPCMPBIAS_W<'a> {
119    #[doc = "Maximum load current less than 75uA."]
120    #[inline(always)]
121    pub fn bias0(self) -> &'a mut W {
122        self.variant(LPCMPBIAS_A::BIAS0)
123    }
124    #[doc = "Maximum load current less than 500uA."]
125    #[inline(always)]
126    pub fn bias1(self) -> &'a mut W {
127        self.variant(LPCMPBIAS_A::BIAS1)
128    }
129    #[doc = "Maximum load current less than 2.5mA."]
130    #[inline(always)]
131    pub fn bias2(self) -> &'a mut W {
132        self.variant(LPCMPBIAS_A::BIAS2)
133    }
134    #[doc = "Maximum load current less than 10mA."]
135    #[inline(always)]
136    pub fn bias3(self) -> &'a mut W {
137        self.variant(LPCMPBIAS_A::BIAS3)
138    }
139}
140impl R {
141    #[doc = "Bit 0 - Force DCDC Into CCM Mode in Low Noise Operation"]
142    #[inline(always)]
143    pub fn lnforceccm(&self) -> LNFORCECCM_R {
144        LNFORCECCM_R::new((self.bits & 1) != 0)
145    }
146    #[doc = "Bits 8:11 - PFET Switch Number Selection"]
147    #[inline(always)]
148    pub fn pfetcnt(&self) -> PFETCNT_R {
149        PFETCNT_R::new(((self.bits >> 8) & 0x0f) as u8)
150    }
151    #[doc = "Bits 12:15 - NFET Switch Number Selection"]
152    #[inline(always)]
153    pub fn nfetcnt(&self) -> NFETCNT_R {
154        NFETCNT_R::new(((self.bits >> 12) & 0x0f) as u8)
155    }
156    #[doc = "Bits 16:19 - Current Limit in Bypass Mode"]
157    #[inline(always)]
158    pub fn byplimsel(&self) -> BYPLIMSEL_R {
159        BYPLIMSEL_R::new(((self.bits >> 16) & 0x0f) as u8)
160    }
161    #[doc = "Bits 20:22 - Current Limit Level Selection for Current Limiter in LP Mode"]
162    #[inline(always)]
163    pub fn lpclimilimsel(&self) -> LPCLIMILIMSEL_R {
164        LPCLIMILIMSEL_R::new(((self.bits >> 20) & 7) as u8)
165    }
166    #[doc = "Bits 24:26 - Current Limit Level Selection for Current Limiter in LN Mode"]
167    #[inline(always)]
168    pub fn lnclimilimsel(&self) -> LNCLIMILIMSEL_R {
169        LNCLIMILIMSEL_R::new(((self.bits >> 24) & 7) as u8)
170    }
171    #[doc = "Bits 28:29 - LP Mode Comparator Bias Selection"]
172    #[inline(always)]
173    pub fn lpcmpbias(&self) -> LPCMPBIAS_R {
174        LPCMPBIAS_R::new(((self.bits >> 28) & 3) as u8)
175    }
176}
177impl W {
178    #[doc = "Bit 0 - Force DCDC Into CCM Mode in Low Noise Operation"]
179    #[inline(always)]
180    pub fn lnforceccm(&mut self) -> LNFORCECCM_W {
181        LNFORCECCM_W::new(self)
182    }
183    #[doc = "Bits 8:11 - PFET Switch Number Selection"]
184    #[inline(always)]
185    pub fn pfetcnt(&mut self) -> PFETCNT_W {
186        PFETCNT_W::new(self)
187    }
188    #[doc = "Bits 12:15 - NFET Switch Number Selection"]
189    #[inline(always)]
190    pub fn nfetcnt(&mut self) -> NFETCNT_W {
191        NFETCNT_W::new(self)
192    }
193    #[doc = "Bits 16:19 - Current Limit in Bypass Mode"]
194    #[inline(always)]
195    pub fn byplimsel(&mut self) -> BYPLIMSEL_W {
196        BYPLIMSEL_W::new(self)
197    }
198    #[doc = "Bits 20:22 - Current Limit Level Selection for Current Limiter in LP Mode"]
199    #[inline(always)]
200    pub fn lpclimilimsel(&mut self) -> LPCLIMILIMSEL_W {
201        LPCLIMILIMSEL_W::new(self)
202    }
203    #[doc = "Bits 24:26 - Current Limit Level Selection for Current Limiter in LN Mode"]
204    #[inline(always)]
205    pub fn lnclimilimsel(&mut self) -> LNCLIMILIMSEL_W {
206        LNCLIMILIMSEL_W::new(self)
207    }
208    #[doc = "Bits 28:29 - LP Mode Comparator Bias Selection"]
209    #[inline(always)]
210    pub fn lpcmpbias(&mut self) -> LPCMPBIAS_W {
211        LPCMPBIAS_W::new(self)
212    }
213    #[doc = "Writes raw bits to the register."]
214    #[inline(always)]
215    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
216        self.0.bits(bits);
217        self
218    }
219}
220#[doc = "DCDC Miscellaneous Control Register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [dcdcmiscctrl](index.html) module"]
221pub struct DCDCMISCCTRL_SPEC;
222impl crate::RegisterSpec for DCDCMISCCTRL_SPEC {
223    type Ux = u32;
224}
225#[doc = "`read()` method returns [dcdcmiscctrl::R](R) reader structure"]
226impl crate::Readable for DCDCMISCCTRL_SPEC {
227    type Reader = R;
228}
229#[doc = "`write(|w| ..)` method takes [dcdcmiscctrl::W](W) writer structure"]
230impl crate::Writable for DCDCMISCCTRL_SPEC {
231    type Writer = W;
232}
233#[doc = "`reset()` method sets DCDCMISCCTRL to value 0x3330_7700"]
234impl crate::Resettable for DCDCMISCCTRL_SPEC {
235    #[inline(always)]
236    fn reset_value() -> Self::Ux {
237        0x3330_7700
238    }
239}
efm32pg1b200_pac/emu/dcdcmiscctrl.rs

efm32pg1b200_pac/emu/
dcdcmiscctrl.rs
